IRF IRF840LCS

PD- 93766
IRF840LCS
IRF840LCL
HEXFET® Power MOSFET
l
l
l
l
l
l
Ultra Low Gate Charge
Reduced Gate Drive Requirement
Enhanced 30V VGS Rating
Reduced CISS, COSS, CRSS
Extremely High Frequency Operation
Repetitive Avalanche Rated
D
VDSS = 500V
RDS(on) = 0.85Ω
G
Description
ID = 8.0A
S
This new series of low charge HEXFET® power MOSFETs
achieve significant lower gate charge over conventional
MOSFETs. Utilizing the new LCDMOS (low charge
device MOSFETs) technology, the device improvements
are achieved without added product cost, allowing for
reduce gate drive requirements and total system savings.
In addition, reduced switching losses and improved
efficiency and achievable in a variety of high frequency
applications. Frequencies of a few MHz at high current
are possible using the new low charge MOSFETs.
These device improvements combined with the proven
ruggedness and reliability that characterize of HEXFET
power MOSFETs offer the designer a new power
transistor standard for switching applications.
D2Pak
IRF840LCS
TO-262
IRF840LCL
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V…
Continuous Drain Current, VGS @ 10V…
Pulsed Drain Current …
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy‚…
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ƒ…
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
8.0
5.1
28
3.1
125
1.0
± 30
510
8.0
13
3.5
-55 to + 150
Units
A
W
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case)
Thermal Resistance
Parameter
RθJC
RθJA
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Junction-to-Case
Junction-to-Ambient (PCB Mounted,steady-state)**
Typ.
Max.
Units
–––
–––
1.0
40
°C/W
1
1/3/2000
IRF840LCS/LCL
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
Drain-to-Source Breakdown Voltage
500
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient –––
RDS(on)
Static Drain-to-Source On-Resistance –––
VGS(th)
Gate Threshold Voltage
2.0
gfs
Forward Transconductance
4.0
–––
IDSS
Drain-to-Source Leakage Current
–––
Gate-to-Source Forward Leakage
–––
IGSS
Gate-to-Source Reverse Leakage
–––
Qg
Total Gate Charge
–––
Q gs
Gate-to-Source Charge
–––
Qgd
Gate-to-Drain ("Miller") Charge
–––
td(on)
Turn-On Delay Time
–––
tr
Rise Time
–––
td(off)
Turn-Off Delay Time
–––
tf
Fall Time
–––
V(BR)DSS
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
Typ.
–––
0.63
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
12
25
27
19
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA…
0.85
Ω
VGS = 10V, ID = 4.8A „
4.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 50V, ID = 4.8A„
25
VDS = 500V, VGS = 0V
µA
250
VDS = 400V, VGS = 0V, TJ = 125°C
100
VGS = 20V
nA
-100
VGS = -20V
39
ID = 8.0A
10
nC VDS = 400V
19
VGS = 10V, See Fig. 6 and 13 „…
–––
VDD = 250V
–––
ID = 8.0A
ns
–––
RG = 9.1Ω
–––
RD = 30Ω, See Fig. 10 „…
Between lead,
nH
7.5 –––
and center of die contact
1100 –––
VGS = 0V
170 –––
pF
VDS = 25V
18 –––
ƒ = 1.0MHz, See Fig. 5…
Source-Drain Ratings and Characteristics
IS
I SM
VSD
t rr
Q rr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) …
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 8.0
showing the
A
G
integral reverse
28
––– –––
S
p-n junction diode.
––– ––– 2.0
V
TJ = 25°C, IS = 8.0A, VGS = 0V „
––– 490 740
ns
TJ = 25°C, IF = 8.0A
––– 3.0 4.5
µC di/dt = 100A/µs „…
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
‚ Starting TJ = 25°C, L = 14mH
… Uses IRF840LC data and test conditions
RG = 25Ω, IAS = 8.0A. (See Figure 12)
ƒ ISD ≤ 8.0A, di/dt ≤ 100A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
** When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended soldering techniques refer to application note #AN-994.
2
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IRF840LCS/LCL
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
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Fig 2. Typical Output Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRF840LCS/LCL
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
4
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 8. Maximum Safe Operating Area
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IRF840LCS/LCL
VDS
VGS
RD
D.U.T.
RG
+
-V DD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
VDS
90%
Fig 9. Maximum Drain Current Vs.
Case Temperature
10%
VGS
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF840LCS/LCL
1 5V
L
VDS
D .U .T
RG
IA S
20V
D R IV E R
+
V
- DD
A
0 .0 1 Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Current Regulator
Same Type as D.U.T.
Fig 12b. Unclamped Inductive Waveforms
50KΩ
QG
12V
.2µF
.3µF
10 V
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRF840LCS/LCL
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

•
•
•
•
RG
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D=
Period
-
V DD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRF840LCS/LCL
D2Pak Package Outline
1 0.54 (.4 15)
1 0.29 (.4 05)
1.4 0 (.055 )
M AX.
-A-
1.3 2 (.05 2)
1.2 2 (.04 8)
2
1.7 8 (.07 0)
1.2 7 (.05 0)
1
1 0.16 (.4 00 )
RE F.
-B -
4.69 (.1 85)
4.20 (.1 65)
6.47 (.2 55 )
6.18 (.2 43 )
3
15 .4 9 (.6 10)
14 .7 3 (.5 80)
2.7 9 (.110 )
2.2 9 (.090 )
2.61 (.1 03 )
2.32 (.0 91 )
5 .28 (.20 8)
4 .78 (.18 8)
3X
1.40 (.0 55)
1.14 (.0 45)
5 .08 (.20 0)
0.5 5 (.022 )
0.4 6 (.018 )
0 .93 (.03 7 )
3X
0 .69 (.02 7 )
0 .25 (.01 0 )
M
8.8 9 (.3 50 )
R E F.
1.3 9 (.0 5 5)
1.1 4 (.0 4 5)
B A M
M IN IM U M R E CO M M E ND E D F O O TP R IN T
1 1.43 (.4 50 )
NO TE S:
1 D IM EN S IO N S A FTER SO L D ER D IP.
2 D IM EN S IO N IN G & TO LE RA N C IN G PE R A N S I Y1 4.5M , 198 2.
3 C O N TRO L LIN G D IM EN SIO N : IN C H .
4 H E ATSINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S.
LE A D A SS IG N M E N TS
1 - G A TE
2 - D R AIN
3 - S O U RC E
8.89 (.3 50 )
17 .78 (.70 0)
3 .8 1 (.15 0)
2 .08 (.08 2)
2X
2.5 4 (.100 )
2X
D2Pak Part Marking Information
IN TE R N A TIO N A L
R E C T IF IE R
LO G O
A S S E M B LY
LO T C O D E
8
A
PART NUM BER
F530S
9 24 6
9B
1M
DATE CODE
(Y YW W )
YY = Y E A R
W W = W EEK
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IRF840LCS/LCL
TO-262 Package Outline
TO-262 Part Marking Information
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9
IRF840LCS/LCL
D2Pak Tape & Reel Information
TR R
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
4 .1 0 (.1 6 1 )
3 .9 0 (.1 5 3 )
F E E D D IRE CTIO N 1 .8 5 (.0 7 3 )
1 .6 5 (.0 6 5 )
1 .60 (.06 3)
1 .50 (.05 9)
1 1 .6 0 (.4 5 7 )
1 1 .4 0 (.4 4 9 )
0 .3 68 (.0 1 4 5 )
0 .3 42 (.0 1 3 5 )
1 5 .4 2 (.6 0 9 )
1 5 .2 2 (.6 0 1 )
2 4 .3 0 (.9 5 7 )
2 3 .9 0 (.9 4 1 )
TR L
10 .9 0 (.42 9)
10 .7 0 (.42 1)
1 .75 (.06 9 )
1 .25 (.04 9 )
4 .7 2 (.1 3 6)
4 .5 2 (.1 7 8)
16 .10 (.63 4 )
15 .90 (.62 6 )
F E E D D IRE C TIO N
13.50 (.532 )
12.80 (.504 )
2 7.4 0 (1.079)
2 3.9 0 (.9 41)
4
33 0.00
(1 4.1 73)
MA X.
NO TES :
1. C O M F O R M S TO E IA -4 18.
2. C O N TR O LLIN G D IM E N S IO N : M ILL IM ET ER .
3. D IM E N S IO N ME A S U R E D @ H U B .
4. IN C LU D E S F LA N G E D IS TO R T IO N @ O U T E R E D G E .
60.00 (2.3 62)
MIN .
26 .40 (1.03 9)
24 .40 (.961 )
3
3 0.40 (1.1 97)
MAX.
4
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Data and specifications subject to change without notice. 1/2000
10
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