INFINEON TLD5085EJ

Infineon® Power LED Driver
TLD5085EJ
1.8A DC/DC Step-Down Converter
Datasheet
Rev. 1.1, 2009-12-16
Automotive Power
1.8A DC/DC Step-Down Converter
1
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TLD5085EJ
Overview
Wide Input Voltage Range from 4.75V to 45V
Constant Current or Constant Voltage Regulation
Drives LEDs in Buck Topology
Very low shutdown current consumption (typ. 0.1µA)
370 kHz switching frequency
PWM Dimming
Integrated power-switch (output current up to 1.8A)
Internal Soft-Start function
± 2% output current tolerance (± 4% for full load current range)
Small thermally enhanced exposed heatslug package
Over Temperature Shutdown
AEC Qualified
Green Product (RoHS Compliant)
PG-DSO-8 (e-Pad)
Description
The TLD5085EJ is a smart LED buck converter with an integrated power-switch, capable of driving up to 1.8A load
current with excellent line and load regulation. The main function of this device is to step-down the input voltage
and regulating a constant LED current. The constant current regulation is especially beneficial for LED color
accuracy and longer lifetime. The TLD5085EJ also has a PWM input which can be used for LED dimming. The
switching frequency of 370kHz allows to use small and inexpensive passive components. An Enable function is
implemented to reduce the shut-down current consumption to typ. 0.1µA. This IC is suited for use in the harsh
automotive environments and provides protection functions such as current limitation and overtemperature
shutdown. The integrated soft-start feature avoids a current and voltage overshot at the output during start-up of
the device.
Applications
•
•
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Automotive Lighting (Reading Light, Dome Light, Dashboard Backlighting)
High Power LED Applications
Constant Current and Voltage Source
Type
Package
Marking
TLD5085EJ
PG-DSO-8 (e-Pad)
TLD5085
Datasheet
2
Rev. 1.1, 2009-12-16
TLD5085EJ
Block Diagram
2
Block Diagram
7
EN
8
VS
Enable
Charge Pump
Over
Temperature
Shutdown
5
BDS
Feedforward
COMP
PWMI
3
Buck
Converter
6
BUO
1
Oscillator
4
Bandgap
Reference
FB
Soft start ramp
generator
TLD5085
2
Figure 1
Datasheet
GND
Block Diagram
3
Rev. 1.1, 2009-12-16
TLD5085EJ
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
TLD5085
8
VS
2
7
EN
COMP
3
6
BUO
FB
4
5
BDS
PWMI
1
GND
EP
S08_Pinout _TLD5085 .vsd
Figure 2
Pin Configuration
3.2
Pin Definitions and Functions
Pin
Symbol Function
1
PWMI
PWM Input for;
Provides LED dimming option. If not used connect to VS.
2
GND
Ground;
Connect to system ground.
3
COMP
Compensation Input;
Frequency compensation for regulation loop stability.
Connect R and C network to pin for stability.
4
FB
Feedback Input;
Connect a defined power resistor (RFB=0.6V/ILED) to get the needed LED output current.
For adjustable output voltages connect this pin via a voltage divider in parallel to the output
capacitor.
5
BDS
Buck Driver Supply Input;
Connect the bootstrap capacitor between this pin and pin BUO.
6
BUO
Buck Switch Output;
Source of the integrated power-switch. Connect directly to the cathode of external freewheeling
diode and the buck circuit inductance.
7
EN
Enable Input;
Apply logic high signal to enable the device. A pull down resistor is integrated.
8
VS
Supply Voltage Input;
Connect to supply voltage source.
EP
Datasheet
Exposed Pad;
Connect to heatsink area and GND by low inductance wiring.
4
Rev. 1.1, 2009-12-16
TLD5085EJ
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Absolute Maximum Ratings 1)
Tj = -40 °C to +150 °C; all voltages with respect to ground (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Conditions
Voltages
4.1.1
PWMI (Pin1)
PWM Input
VPWMI
-0.3
45
V
–
4.1.2
COMP (Pin 3)
Compensation Input
VCOMP
-0.3
5.5
V
–
6.2
V
t < 10s2)
4.1.4
FB (Pin 4)
Feedback Input
VFB
-0.3
5.5
V
–
4.1.5
BDS (Pin 5)
Buck Driver Supply Input
VBDS
VBUO
VBUO
V
–
- 0.3
+ 5.5
4.1.6
BUO (Pin 6)
Buck Switch Output
VBUO
-2.0
VVS + 0.3
V
–
4.1.7
EN (Pin 7)
Enable Input
VEN
-40
45
V
–
4.1.8
VS (Pin 8)
Supply Voltage Input
VS
-0.3
45
V
–
Tj
Tstg
-40
150
°C
–
-55
150
°C
–
VESD
-2
2
kV
HBM 3)
4.1.3
Temperatures
4.1.9
Junction Temperature
4.1.10
Storage Temperature
ESD Susceptibility
4.1.11
ESD Resistivity all Pins to GND
1) Not subject to production test, specified by design
2) Exposure to those absolute maximum ratings for extended periods of time (t > 10s) may affect device reliability
3) ESD susceptibility HBM according to EIA/JESD 22-A 114B (1.5kΩ,100pF).
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Datasheet
5
Rev. 1.1, 2009-12-16
TLD5085EJ
General Product Characteristics
4.2
Functional Range
Pos.
Parameter
Symbol
4.2.1
Supply Voltage
4.2.2
Output Voltage adjust range
4.2.3
External buck inductor
4.2.4
External buck capacitor
4.2.5
External buck capacitor ESR
4.2.6
Junction Temperature
VS
VCC
LBU
CBU1
ESRBU1
Tj
Limit Values
Unit
Conditions
Min.
Max.
4.75
45
V
–
0.60
16
V
see Figure 5
18
56
µH
33
120
µF
see Figure 5 and
Figure 6
–
0.3
Ω
– 1)
-40
150
°C
–
1) See section ““Application Information” on Page 11” for loop compensation requirements.
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards.
For more information, go to www.jedec.org.
Pos.
Parameter
4.3.1
Junction to Case
4.3.2
Junction to Ambient (2s2p)
Symbol
RthJC
RthJA
Limit Values
Unit
Conditions
Min.
Typ.
Max.
–
–
10
K/W
1) 2)
–
42
–
K/W
1) 3)
1) Not subject to production test, specified by design.
2) Specified RthJC value is simulated at natural convection on a cold plate setup (all pins and the exposed pad are fixed to
ambient temperature). Ta=25°C, power-switch is dissipating 1W.
3) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
According to JESD51-5 a thermal via array under the exposed pad contacted the first inner copper layer. Ta=25°C, powerswitch is dissipating 1W.
Datasheet
6
Rev. 1.1, 2009-12-16
TLD5085EJ
Buck Regulator
5
Buck Regulator
5.1
Description
The gate of the power-switch is driven by the Gate driver which is supplied by the external capacitor connected to
pin BDS (Buck Driver Supply) using the bootstrap principle.
BDS is the supply pin for the integrated gate driver of the internal power-switch. The power-switch has to be in the
RDSon region. If VGS is not high enough, the power-switch can not operate in the RDSON region, which means high
power dissipation. An integrated under voltage lockout function (BDS UV-Comparator) supervising the ’bootstrap’
capacitor voltage ensures that the device is always driven with a sufficient bootstrap voltage in order to prevent
from extensive heat up of the power-switch.
An integrated charge pump supports the gate driver in case of low input supply voltage, small differential voltage
between input supply and output voltage at low current and during startup. In order to minimize emission, the
charge pump is switched off if the input voltage is sufficient for supplying the bootstrap.
The soft start function generates a defined ramp of the reference voltage during the first 0.5 ms (typ.) after device
initialization and if the Device is autorestarting after a thermal shutdown. This function is disabled during the
dimming operation via the PWMI-pin.
VS
COMP
8
Charge
Pump
Overcurrent
Comp.
3
BDS
Charger
5
BDS
6
BUO
Clock
Feedback
Error Amp.
4
Gate
Driver
+
FB
PWM
Comp.
Power
Switch
Logic
Soft Start
Ramp
Temp.
Sensor
Ramp Generator
=
Figure 3
Datasheet
BDS
UV Comp.
VREF =0.6V
2
1
GND
PWMI
Block Diagram Buck Regulator
7
Rev. 1.1, 2009-12-16
TLD5085EJ
Buck Regulator
5.2
Electrical Characteristics
Electrical Characteristics: Buck Regulator
VS = 6.0 V to 40 V, Tj = -40 °C to +150 °C, all voltages with respect to ground (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
5.2.1
FB input voltage
5.2.2
5.2.3
FB input current
5.2.4
Power-Switch on-resistance
5.2.5
Current transition rise/fall time
5.2.6
Buck peak over current limit
5.2.7
Bootstrap under voltage lockout,
turn-off threshold
Unit
Conditions
Typ.
Max.
VFB
0.588 0.60
0.612
V
VFB
0.576 0.60
0.624
V
IFB
RDS(ON)
-1
-0.1
0
µA
–
–
500
mΩ
tr
IBUOC
VBDS,off
–
50
–
ns
VEN = VS;
VS = 12V
0.1A < ICC < 1.0A
VEN = VS;
VS = 12V
1mA < ICC < 1.8A
VFB = 0.6V
ICC=300 mA;
TJ = 150 °C max.
ICC=1 A 1)
2.2
–
3.6
A
–
–
V
Bootstrap voltage
decreasing
VS = 12V;
VBUO = VBDS = GND
(VBDS - VBUO) increasing
VBUO –
+3.3
5.2.8
Charge pump current
ICP
2
–
–
mA
5.2.9
Charge pump switch-off threshold
–
–
5
V
5.2.10
Maximum duty cycle
–
–
100
%
1) 2)
5.2.11
Soft start ramp
VBDS VBUO
Dmax
tstart
350
500
750
µs
5.2.12
Input under voltage shutdown
threshold
VS,off
3.75
–
–
V
VFB rising from 5% to
95% of VFB,nom
VS decreasing
5.2.13
Input voltage startup threshold
–
–
4.75
V
VS increasing
5.2.14
Input under voltage shutdown
hysteresis
VS,on
VS,hyst
150
–
–
mV
1)
1) Not subject to production test; specified by design.
2) Consider “Chapter 4.2, Functional Range”
Datasheet
8
Rev. 1.1, 2009-12-16
TLD5085EJ
Enable, Thermal Shutdown and PWM Dimming Function
6
Enable, Thermal Shutdown and PWM Dimming Function
6.1
Description
Enable Function: With the enable pin (EN) the device can be set in off-state reducing the current consumption to
typ. 0.1µA. The enable function features an integrated pull down resistor which ensures that the IC is shut down
and the power-switch is off in case the pin EN is not connected.
Device Wake Up Behavior: The device initialization is triggered either by the EN voltage level crossing the turnon threshold, rising supply voltage (during EN=H), and also when the device restarts after a thermal shutdown.
The softstart ramp starts after the BDS external capacitor is charged.
Overtemperature Behavior: The integrated thermal shutdown function turns the power-switch off in case of
overtemperature. The typ. junction shutdown temperature is 175°C, with a min. of 150°C. After cooling down the
IC will automatically restart operation. The thermal shutdown is an integrated protection function designed to
prevent IC destruction when operating under fault conditions. It must not be used for normal operation.
PWM Dimming Function: The PWMI signal directly controls the gate driver of the integrated power-switch by
overriding the internal control signals.
6.2
Electrical Characteristics Enable, Bias, Thermal Shutdown and PWM Dimming
Electrical Characteristics: Enable, Bias and Thermal Shutdown
VS = 6.0 V to 40 V, Tj = -40 °C to +150 °C, all voltages with respect to ground (unless otherwise specified)
Pos.
6.2.1
Parameter
Current Consumption,
shut down mode
Symbol
Iq,OFF
Limit Values
Min.
Typ.
Max.
–
0.1
2
Unit
Conditions
µA
VEN = 0.8V;
Tj < 105°C; VS = 16V
1)
6.2.2
Current Consumption,
active mode
Iq,ON
–
–
7
mA
6.2.3
Current Consumption,
active mode
Iq,ON
–
–
10
mA
VEN = 5.0V; ICC = 0mA;
VS = 16V
VEN = 5.0V; ICC = 1.8A;
VS = 16V
1)
6.2.4
6.2.5
6.2.6
6.2.7
6.2.8
6.2.9
6.2.10
6.2.11
6.2.12
6.2.13
6.2.14
VEN,hi
VEN,lo
Enable hysteresis
VEN,HY
Enable high input current
IEN,hi
Enable low input current
IEN,lo
PWMI high threshold
VPWMI,hi
PWMI low threshold
VPWMI,lo
PWMI turn-on delay
tPWM,ON
PWMI turn-off delay
tPWM,OFF
Over temperature shutdown Tj,sd
Over temperature shutdown Tj,sd_hyst
Enable high signal valid
3
–
–
V
–
Enable low signal valid
–
–
0.8
V
–
50
200
400
mV
1)
–
–
30
µA
–
0.1
1
µA
VEN = 16V
VEN = 0.5V
3
–
–
V
–
–
–
0.8
V
–
–
–
5
µs
2)
–
–
5
µs
–
150
175
190
°C
1)
–
15
–
K
1)
hysteresis
1) Specified by design. Not subject to production test.
2) At startup current flowing in CBU1, recommended max. PWM frequency 1kHz@370kHz fsw
Datasheet
9
Rev. 1.1, 2009-12-16
TLD5085EJ
Oscillator
7
Oscillator
7.1
Description
The oscillator turns on the power-switch with a constant frequency while the buck regulating circuit turns the
power-switch off in every cycle with an appropriate time gap depending on the output and input voltage.
The internal sawtooth signal used for the PWM generation has an amplitude proportional to the input supply
voltage (feedforward).
7.2
Electrical Characteristics Oscillator
Electrical Characteristics: Buck Regulator
VS = 6.0 V to 40 V, Tj = -40 °C to +150 °C, all voltages with respect to ground (unless otherwise specified)
Pos.
7.2.1
Parameter
Oscillator frequency
Datasheet
Symbol
fosc
Limit Values
Min.
Typ.
Max.
330
370
420
10
Unit
Conditions
kHz
–
Rev. 1.1, 2009-12-16
TLD5085EJ
Application Information
8
Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device.
8.1
Frequency Compensation
The stability of the output voltage can be achieved with a simple RC connected between pin COMP and GND. The
standard configuration using the switching frequency of the internal oscillator is a ceramic capacitor CCOMP = 22nF
and RCOMP = 22kΩ. By slight modifications to the compensation network the stability can be optimized for different
types of buck capacitors (ceramic or tantalum).
The compensation network is essential for the control loop stability. Leaving pin COMP open might lead to an
instable operation.
8.2
Compensating a tantalum buck capacitor CBU1
The TLD5085EJ control loop is optimized for ceramic buck capacitors CBU. In order to maintain stability also for
tantalum capacitors with ESR up to 300mΩ, an additional compensation capacitance CCOMP2 at pin COMP to GND
is required. It’s value calculates:
CCOMP2 = CBU * ESR(CBU) / RCOMP ,
whereas CCOMP2 needs to stay below 5nF.
Application _C-COMP2.vsd
COMP
3
TLD5085
CCOMP
CCOMP2
2
RCOMP
GND
Figure 4
High-ESR buck capacitor compensation
8.3
Freewheeling Diode
In order to minimize losses and for fast recovery, a schottky freewheeling diode is required. Disconnecting the
freewheeling diode during operation might lead to destruction of the IC.
Datasheet
11
Rev. 1.1, 2009-12-16
TLD5085EJ
Application Information
8.4
Constant Output Voltage Mode for LED applications
VBatt
L1
DRV
C1
8
C2
TLD5085
VS
CS
Cbootstrap
BDS
5
LBU
Ignition Key
Terminal 15
7
PWM Dimming
1
EN
BUO
6
R balance1
DBU
PWMI
CBU1
R1
3
CCOMP
COMP
FB
4
GND
VFB
2
R balance2
CBU2
VCC
R2
RCOMP
SPIDER-LS
Optional
Parts
Figure 5
TLE7240 SL
Application Diagram (constant voltage mode)
Note: This is a very simplified example of an application circuit. The function must be verified in the real application
The output voltage of the TLD5085EJ can be programmed by a voltage divider connected to the feedback pin FB.
The divider cross current should be 300 µA at minimum, therefore the maximum R2 calculates:
R2 ≤ VFB / IR2 --> R2 ≤ 0.6V / 300 µA = 2 kΩ
For the desired output voltage level VCC, R1 calculates then (neglecting the small FB input current):
V CC 
R 1 = R 2  --------- – 1 .
V
FB
Datasheet
12
Rev. 1.1, 2009-12-16
TLD5085EJ
Application Information
8.5
Constant current mode for LED applications
VBatt
L1
DRV
C1
8
C2
TLD5085
VS
CS
Cbootstrap
BDS
5
LBU
Ignition Key
Terminal 15
PWM Dimming
BUO
7
EN
1
PWMI
6
DBU
CBU1
2 x High Brightness
White LEDs
3
COMP
FB
4
GND
CCOMP
2
RCOMP
RFB =
0.6V
I LED
Optional
Parts
Figure 6
Application Diagram TLD5085 as LED Driver (constant current mode)
Note: This is a very simplified example of an application circuit. The function must be verified in the real application.
Datasheet
13
Rev. 1.1, 2009-12-16
TLD5085EJ
Package Outlines
9
Package Outlines
0.35 x 45˚
1.27
0.41±0.09 2)
0.2
M
0.19 +0.06
0.08 C
Seating Plane
C A-B D 8x
0.64 ±0.25
D
0.2
6 ±0.2
8˚ MAX.
C
0.1 C D 2x
1.7 MAX.
Stand Off
(1.45)
0.1+0
-0.1
3.9 ±0.11)
M
D 8x
Bottom View
8
1
5
1
4
8
4
5
2.65 ±0.2
3 ±0.2
A
B
4.9 ±0.11)
0.1 C A-B 2x
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Dambar protrusion shall be maximum 0.1 mm total in excess of lead width
3) JEDEC reference MS-012 variation BA
Figure 7
PG-DSO-8-27-PO V01
Outline PG-DSO-8 (e-Pad)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further package information, please visit our website:
http://www.infineon.com/packages.
Datasheet
14
Dimensions in mm
Rev. 1.1, 2009-12-16
TLD5085EJ
Revision History
10
Revision History
Version
Date
Rev. 1.1
2009-12-16 •
•
Rev. 1.0
2009-06-04 Initial Datasheet for TLD5085EJ
Datasheet
Changes
Cover sheet updated
Package name updated
15
Rev. 1.1, 2009-12-16
Edition 2009-12-16
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2009 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
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Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
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