TPS61500 www.ti.com ........................................................................................................................................................................................... SLVS893 – DECEMBER 2008 3A Boost Converter for High Brightness LED Driver with Multiple Dimming Methods FEATURES 1 • • • • • 2.9-V to 18-V Input Voltage Range 3-A, 40-V Internal Power Switch – Four 3-W LEDs from 5-V input – Eight 3-W LEDs from 12-V input High Efficiency Power Conversion: Up to 93% Frequency Set by External Resistor: 200-kHz to 2.2-MHz User Defined Soft Start into Full Load • • • Programmable over voltage protection Analog and Pure PWM Brightness Dimming 14-pin HTSSOP Package with PowerPad APPLICATIONS • • Monitor backlight 1-W or 3-W high brightness LED DESCRIPTION The TPS61500 is a monolithic switching regulator with integrated 3-A, 40-V power switch. It is an ideal driver for high brightness 1-W or 3-W LED. The device has a wide input voltage range to support application with input voltage from multi-cell batteries or regulated 5-V, 12-V power rails. The LED current is set with an external sensor resistor R3, and the feedback voltage that is regulated to 200-mV by current mode PWM (pulse width modulation) control loop, as shown in the typical application. The device supports analog and pure PWM dimming methods for LED brightness control. Connecting a capacitor to the DIMC pin configures the device to be used for analog dimming, and the LED current varies proportional to the duty cycle of an external PWM signal. Floating the DIMC pin configures the IC for pure PWM dimming with the average LED current being the PWM signal's duty cycle times a set LED current. The device features a programmable soft-start function to limit inrush current during start-up, and has built-in other protection features, such as pulse-by-pulse over current limit, over voltage protection and thermal shutdown. The TPS61500 is available in 14-pin HTSSOP package with PowerPad. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008, Texas Instruments Incorporated TPS61500 SLVS893 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. TYPICAL APPLICATION D1 L1 Vin 5 V C1 R1 TPS61500 VIN SW EN SW DL1 3W LED C2 DL2 PWM COMP C4 R2 OVP DIMC FB FREQ PGND SS PGND AGND PGND DL3 DL4 C5 R4 C3 R3 Figure 1. Analog Dimming Method Vin 5 V D1 L1 DL1 3W LED 1k C1 TPS61500 VIN PWM SW COMP C4 C3 R1 C2 SW EN R4 Q2 DL2 1k R2 DL3 OVP DIMC FB FREQ PGND SS PGND AGND PGND PWM Q1 DL4 R3 Figure 2. Pure PWM Dimming Method ORDERING INFORMATION (1) (2) (1) (2) 2 TA PART NUMBER PACKAGE PACKAGE MARKING –40°C to 85°C TPS61500 HTSSOP-14 TPS61500PWP For the most current package and ordering information, see the TI WEB site at www.ti.com The PWP package is available in tape and reel. Add R suffix (TPS61500PWPR) to order quantities of 2000 parts per reel. Without suffix, the TPS61500PWP is shipped in tubes with 90 parts per tube. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS61500 TPS61500 www.ti.com ........................................................................................................................................................................................... SLVS893 – DECEMBER 2008 ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VALUE UNIT Supply voltages on pin VIN (2) –0.3 to 20 V Voltages on pins EN (2) –0.3 to 20 V Voltage on pin FB, FREQ and COMP, OVP (2) –0.3 to 3 V Voltage on pin DIMC, SS (2) –0.3 to 7 V Voltage on pin SW (2) –0.3 to 40 V Continuous power dissipation See Dissipation Rating Table Operating junction temperature range –40 to 150 °C Storage temperature range –65 to 150 °C 260 °C Lead temperature (soldering, 10 sec) (1) (2) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. DISSIPATION RATINGS (1) PACKAGE THERMAL RESISTANCE RθJA TA ≤ 25°C POWER RATING TA = 85°C POWER RATING 14 pin PWP (1) 44.5 °C/W 2.25W 0.9W Rating based on JEDEC high thermal conductivity (High K) board with 2x2 array of thermal vias. See Texas Instruments application report (SLMA002) regarding thermal characteristics of the PowerPAD package. RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT VIN Input voltage range 2.9 18 V VO Output voltage range VIN 38 V L Inductor 4.7 47 µH CI Input Capacitor 4.7 -- µF CO Output Capacitor 4.7 10 µF Cdim Analog dimming capacitor (2) 0.1 -- µF (1) (3) PWM Analog and PWM dimming frequency 200 1000 Hz TA Operating ambient temperature –40 85 °C TJ Operating junction temperature –40 125 °C (1) (2) (3) The inductance value depends on the switching frequency and end applications. While larger values may be used, values between 4.7µH and 47µH have been successfully tested in various appliations. Refer to the Inductor Selection for detail. The Cdim with the internal resistor (25kΩ TYP) forms a RC filter that generates the FB reference voltage according to the duty cycle of PWM signal. To optimize the RC filter and reduce the output ripple, the value larger than 0.1µF of Cdim is recommended. When analog dimming, the max PWM frequency is set by on the RC filter to optimize the output ripple. When PWM dimming, the PWM frequency is set by the IC loop response. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS61500 3 TPS61500 SLVS893 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS FSW = 1.2MHz(Rfreq=80kΩ), Vin=3.6V, CRTL=Vin, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY CURRENT VIN Input voltage range IQ Operating quiescent current into Vin Device PWM switching without load,Vin =3.6V 2.9 ISD Shutdown current EN = GND, Vin = 3.6 V VUVLO Under-voltage lockout threshold VIN falling Vhys Under-voltage lockout hysteresis 2.5 18 V 3.5 mA 1.5 µA 2.7 V 130 mV ENABLE AND REFERENCE CONTROL Venh EN logic high voltage Vin = 2.9 V to 18 V Venl EN logic low voltage Vin = 2.9 V to 18 V Ren EN pull down resistor Toff Shutdown delay, SS discharge 1.2 0.4 400 EN high to low V 800 1600 10 V kΩ ms VOLTAGE AND CURRENT CONTROL VREF Voltage feedback regulation voltage IFB Voltage feedback input bias current 195 VEA_OFF Error amplifier offset Isink Comp pin sink current VFB = VREF+200 mV, VCOMP = 1 V 40 µA Isource Comp pin source current VFB = VREF –200 mV, VCOMP = 1 V 40 µA VCCLP Comp pin Clamp Voltage High Clamp Low Clamp 3 0.75 V VCTH Comp pin threshold Duty cycle = 0% Gea Error amplifier transconductance Rea Error amplifier output resistance fea Error amplifier crossover frequency -10 200 0 205 nA 10 mV 0.95 240 340 mV 200 V 440 µmho 10 MΩ 500 kHz FREQUENCY fS Oscillator frequency Rfreq = 480 kΩ Rfreq = 80 kΩ Rfreq = 40 kΩ 0.16 1.0 1.76 Dmax Maximum duty cycle Rfreq = 80 kΩ 89% VFREQ FREQ pin voltage Tmin_on Minimum on pulse width Rdim_fil Dimming filter resistance 0.21 1.2 2.2 0.26 1.4 2.64 93% 1.229 Rfreq = 80 kΩ MHz V 60 ns 25 kΩ POWER SWITCH RDS(ON) N-channel MOSFET on-resistance VIN = VGS = 3.6 V 0.13 VIN = VGS = 3.0 V ILN_NFET N-channel leakage current 0.25 Ω 0.3 VDS = 40 V, TA = 25°C 1 µA OC, OVP and SS ILIM N-Channel MOSFET current limit D = Dmax ISS Soft start bias current Vss = 0 V VOVP Over voltage protection threshold VOVP_hys Over voltage protection hysteresis 3 3.8 5 1.192 1.229 A µA 6 1.266 V 40 mV 160 °C 15 °C THERMAL SHUTDOWN Tshutdown Thermal shutdown threshold T hysteresis Thermal shutdown threshold hysteresis 4 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS61500 TPS61500 www.ti.com ........................................................................................................................................................................................... SLVS893 – DECEMBER 2008 DEVICE INFORMATION PIN ASSIGNMENTS TSSOP 14-PIN (TOP VIEW) SW SW VIN EN SS DIMC AGND 1 2 3 4 5 6 7 PGND PGND PGND OVP FREQ FB COMP 14 13 12 11 10 9 8 PIN FUNCTIONS PIN NAME NO. I/O DESCRIPTION VIN 3 I The input pin to the IC. Connect VIN to a supply voltage between 2.9V and 18V. It is acceptable for the voltage on the pin to be different from the boost power stage input for applications requiring voltage beyond VIN range. SW 1,2 I This is the switching node of the IC. Connect SW to the switched side of the inductor. FB 9 I Feedback pin for positive voltage regulation. A resistor connects to this pin to program LED current. EN 4 I Enable pin. When the voltage of this pin falls below the enable threshold for more than 10ms, the IC turns off. This pin is also used for PWM signal input for LED brightness dimming. Comp 8 O Output of the transconductance error amplifier. An external RC network is connected to this pin. SS 5 O Soft start programming pin. A capacitor between the SS pin and GND pin programs soft start timing. See application section for information on how to size the SS capacitor FREQ 10 O Switch frequency program pin. An external resistor is connected to this pin. See application section for information on how to size the FREQ resistor. AGND 7 I Signal ground of the IC PGND 12–14 I Power ground of the IC. It is connected to the source of the PWM switch. OVP 11 I Over voltage protection for LED driver. The voltage is 1.229. Using a resistor divider can program the threshold of OVP. DIMC 6 I Analog and PWM dimming method option pin. A capacitor connected to the pin to set the time constant of reference for analog dimming. Float this pin for PWM dimming. Thermal Pad The thermal pad should be soldered to the analog ground. If possible, use thermal via to connect to top and internal ground plane layers for ideal power dissipation. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS61500 5 TPS61500 SLVS893 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com FUNCTIONAL BLOCK DIAGRAM OVP SW VIN FB EN 1.229 V Ref. DIMC 200 mV Ref. and Dimming EA Gate Dirver COMP PWM Control Ramp Generator Current Sensor + Oscillator SS FREQ PGND AGND TYPICAL CHARACTERISTICS TABLE OF GRAPHS Circuit of Figure 1; L1 = D104C2-10µH; D1 = SS3P6L-E3/86A, R4 = 80kΩ, C4 = 470nF, C2 = 10µF, LED = OSRAM LCW W5SM, ILED=400mA; unless otherwise noted FIGURE Efficiency VIN = 5 V, 4 LEDs, 8 LEDs, 10 LEDs 3 Efficiency VIN = 5 V, 12 V; Vout = 8 LEDs 4 FB voltage accuracy vs Temperature 5 Switch current limit vs Duty cycle 6 Switch current limit vs Temperature 7 PWM dimming VIN = 5 V, 4 LEDs 8 C5 = 1µF, VIN = 5 V, 4 LEDs 10 PWM dimming linearity Analog dimming 9 Analog dimming linearity 11 PWM dimming start-up C3 = 47 nF, C5 = Float, 200 Hz with 90% duty cycle 12 Analog dimming start-up C3 = 47 nF, C5 = 1 µF, 5k PWM with 90% duty cycle 13 6 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS61500 TPS61500 www.ti.com ........................................................................................................................................................................................... SLVS893 – DECEMBER 2008 Efficiency Efficiency 100 100 VI = 5 V VI = 12 V 4 LEDs 90 90 VI = 5 V Efficiency - % Efficiency - % 8 LEDs 80 10 LEDs 70 80 70 8 LEDs 60 60 50 50 0 0.2 0.4 0.6 0.8 IO - Output Current - A 1 0 1.2 0.2 0.4 0.6 0.8 IO - Output Current - A Figure 3. FB Voltage Accuracy Switch Current Limit 5 205 4.5 Overcurrent Limit - A FB Voltage - mV 1.2 Figure 4. 210 200 195 190 -40 1 4 3.5 -20 0 20 40 60 80 TA - Free-Air Temperature - °C 100 120 3 0.2 0.4 0.6 Duty Cycle - % Figure 5. Figure 6. Switch Current Limit PWM Dimming 0.8 1 4 EN 5 V/div Overcurrent Limit - A 3.9 3.8 VOUT 200 mV/div AC 3.7 ILED 500 mA/div 3.6 3.5 -40 -20 0 80 60 20 40 TA - Free-Air Temperature - °C 100 120 Figure 7. t - 200 ms/div Figure 8. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS61500 7 TPS61500 SLVS893 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com PWM Dimming Linearity Analog Dimming 450 PWM Frequency 200 Hz, 600 Hz, 1000 Hz 400 EN 5 V/div LED Current - mA 350 300 VOUT 50 mV/div AC 250 200 150 ILED 100 mA/div 100 50 0 0 20 40 60 Duty Cycle - % 80 t - 200 ms/div 100 Figure 9. Figure 10. Analog Dimming Linearity PWM Dimming Start-up 210 PWM Frequency 200 Hz, 5 kHz, 40 kHz 180 EN 5 V/div FB Voltage - mV 150 VOUT 5 V/div 120 90 60 ILED 500 mA/div 30 0 0 20 40 60 Duty Cycle - % 80 t - 4 ms/div 100 Figure 11. Figure 12. Analog Dimming Start-up EN 5 V/div VOUT 5 V/div IL 500 mA/div t - 4 ms/div Figure 13. 8 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS61500 TPS61500 www.ti.com ........................................................................................................................................................................................... SLVS893 – DECEMBER 2008 DETAILED DESCRIPTION OPERATION The TPS61500 integrates a 3-A/40-V low side switch FET for driving up to 10 high brightness LEDs in series. The device regulates the FB pin voltage at 200-mV with current mode PWM (pulse width modulation) control, and the LED current is sensed through a low value resistor in series with LEDs. The PWM control circuitry turns on the switch at the beginning of each switching cycle. The input voltage is applied across the inductor and stores the energy as inductor current ramps up. During this portion of the switching cycle, the load current is provided by the output capacitor. When the inductor current rises to the threshold set by the error amplifier output, the power switch turns off and the external Schottky diode is forward biased. The inductor transfers stored energy to replenish the output capacitor and supply the load current. This operation repeats each switching cycle. As shown in the block diagram, the duty cycle of the converter is determined by the PWM control comparator which compares the error amplifier output and the current signal. The switching frequency is programmed by the external resistor. A ramp signal from the oscillator is added to the current ramp. This slope compensation is necessary to avoid sub-harmonic oscillation that is intrinsic to the current mode control at duty cycle higher than 50%. The feedback loop regulates the FB pin to a reference voltage through an error amplifier. The output of the error amplifier is connected to the COMP pin. An external compensation network is connected to the COMP pin to optimize the feedback loop for stability and transient response. SWITCHING FREQUENCY The switch frequency is determined by a resistor connected to the FREQ pin of the TPS61500. Do not leave this pin open. A resistor must always be connected for proper operation. See Table 1 and Figure 14 for resistor values and corresponding frequencies. Table 1. Switching Frequency vs External Resistor R4 (kΩ) fSW (kHz) 443 240 256 400 176 600 80 1200 51 2000 3500 3000 f - Frequency - kHz 2500 2000 1500 1000 500 0 10 100 R4 - kW 1000 Figure 14. Switching Frequency vs External Resistor Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS61500 9 TPS61500 SLVS893 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com Increasing switching frequency reduces the value of external capacitors and inductors, but also reduces the power conversion efficiency. The user should set the frequency for compromise between efficiency and solution size. SOFT START The TPS61500 has a built-in soft start circuit which significantly reduces the start-up current spike and output voltage overshoot. When the IC is enabled, an internal bias current (6-µA typically) charges a capacitor (C3) on the SS pin. The voltage at the capacitor clamps the output of the internal error amplifier that determines the duty cycle of PWM control, thereby the input inrush current is eliminated. Once the capacitor reaches 1.8-V, the soft start cycle is completed and the soft start voltage no longer clamps the error amplifier output. Refer to Figure 12 and Figure 13 for the soft start waveform. A 47-nF capacitor eliminates the output overshoot and reduces the peak inductor current for most applications. When the EN is pulled low for 10-ms, the IC enters shutdown and the SS capacitor discharges through a 5kΩ resistor for the next soft start. ENABLE AND THERMAL SHUTDOWN The TPS61500 enters shutdown when the EN voltage is less than 0.4-V for more than 10-ms. In shutdown, the input supply current for the device is less than 1.5µA (max). The EN pin has an internal 800-kΩ pull down resistor to disable the device when it is floating. An internal thermal shutdown turns off the device when the typical junction temperature of 160°C is exceeded. The IC restarts when the junction temperature drops by 15°C. UNDER VOLTAGE LOCKOUT (UVLO) An under voltage lockout prevents mis-operation of the device at input voltages below typical 2.5V. When the input voltage is below the under voltage threshold, the device remains off and the internal switch FET is turned off. The under voltage lockout threshold is set below minimum operating voltage of 2.9V to avoid any transient VIN dip triggering the UVLO and causing the device to reset. For the input voltages between UVLO threshold and 2.9V, the device maintains its operation, but the specifications are not ensured. OVER VOLTAGE PROTECTION When the FB pin is shorted to ground or an LED fails open circuit, the output voltage can increase to potentially damaging voltages. To present the IC and the output capacitor from exceeding the maximum voltage rating, utilize the OVP pin with an external resistor divider to program an OVP threshold, as shown in the typical application. The OVP pin is set at 1.229-V, and the OVP threshold should be higher than the normal operating output voltage. 10 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS61500 TPS61500 www.ti.com ........................................................................................................................................................................................... SLVS893 – DECEMBER 2008 APPLICATION INFORMATION PROGRAMMING THE OVERVOLTAGLE PROTECTION Select the values of R1 and R2 according to Equation 1. æ R1 ö VOVP = 1.229 V ´ ç + 1÷ è R2 ø (1) For example, the total forward voltage of four 3-W LED is 14V, then use R1 of 120k and R2 of 10k to program the threshold of 16V. In the OVP mode, IC regulates the output voltage at the OVP threshold. When the fault is clear and the OVP pin voltage falls 40-mV below 1.229V, IC resumes the output regulation for LED current. PROGRAMMING THE LED CURRENT LED current can be determined by the value of the feedback resistor R3 and the FB pin regulation voltage of 200-mV as shown in Equation 2: V ILED = FB R3 (2) The output current tolerance depends on the FB accuracy and the current sensor resistor accuracy. IMPLEMENTING DIMMING Two LED current dimming methods are provided. 1. Floating the DIMC pin, an external PWM signal via the EN pin, providing pure PWM dimming method. 2. Connecting a capacitor larger than 100-nF to the DIMC pin, an external PWM signal via the EN pin, providing analog dimming. PWM Dimming Method LED brightness is controlled by peak LED current and duty cycle of external PWM signal. See Figure 2, Figure 8 and Figure 9 for the PWM dimming operating and linearity. Additional external switch FETs connect/disconnect LED string during PWM on/off period, shown in the typical application. Simultaneously, the TPS61500 samples and holds the COMP voltage to speed up LED current regulation during the on period. As the IC and the external switch FETs need several hundred microseconds to regulate the LED current, the frequency and minimum duty cycle of the PWM signal are application dependent. For example, 2% is the minimum duty cycle for a 200Hz PWM signal. The PWM dimming method offers better control of color because current through LED is kept constant each cycle. Analog Dimming Method When capacitor C5 is connected to the DIMC pin, the FB regulation voltage is scaled proportional to the external PWM signal's duty cycle; therefore, it achieves LED brightness change, shown in Figure 1. The relationship between the duty cycle and LED current is given by Equation 3: V ILED = FB ´ Duty R3 (3) where, duty is the duty cycle of the PWM signal. The IC chops up the internal 200mV reference voltage at the duty cycle of the PWM signal. The pulsed reference voltage is then filtered by a low pass filter that is composed of an internal 25-kΩ resistor and the external capacitor C5. The output of the filter is connected to the error amplifier as the reference voltage for the FB pin. Therefore, although a PWM signal is used for brightness dimming, only the LED DC current is modulated. This eliminates the audible noise which often occurs when the LED current is pulsed during PWM dimming. Unlike other methods for filtering the PWM signal, the TPS61500's analog dimming method is independent of the PWM logic voltage level which often has large variations. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS61500 11 TPS61500 SLVS893 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com For optimum performance, the value of C5 is recommended as large as possible to provide adequate filtering for the PWM frequency. For example, when the PWM frequency is 5-kHz, C5 equal to 1-µF is sufficient. COMPUTING THE MAXIMUM OUTPUT CURRENT The over-current limit in a boost converter limits the maximum input current and thus maximum input power for a given input voltage. Maximum output power is less than maximum input power due to power conversion losses. Therefore, the current limit setting, input voltage, output voltage and efficiency can all change maximum current output. The current limit clamps the peak inductor current, therefore the ripple has to be subtracted to derive maximum DC current. The ripple current is a function of switching frequency, inductor value and duty cycle. The following equations take into account of all the above factors for maximum output current calculation. 1 Ip = é 1 1 öù æ + êL ´ Fs ´ ç ÷ú Vin ø û è Vout + V ¦ - Vin ë (4) Where Ip = inductor peak to peak ripple L = inductor value Vƒ = Schottky diode forward voltage Fs= switching frequency Vout= output voltage = Σ VLEDs + VREF ILED_max = ( Vin × Ilim - Ip /2 )´ h Vout (5) Where ILED_max = maxium LED current from the boost converter Ilim = over current limit VLED = LED forward voltage at ILED η = efficiency estimate based on similar applications For instance, when VIN is 12-V, 8 LEDs output is equivalent to Vout of 24V, the inductor is 10-µH, the Schottky forward voltage is 0.4-V and the switching frequency is 1.2-MHz; then the maximum output current is around 1-A in typical condition. SELECTING THE INDUCTOR The selection of the inductor affects steady state operation as well as transient behavior and loop stability. These factors make it the most important component in power regulator design. There are three important inductor specifications, inductor value, DC resistance and saturation current. Considering inductor value alone is not enough. Inductor values can have ±20% tolerance with no current bias. When the inductor current approaches saturation level, its inductance can falls to some percentage of its 0-A value depending on how the inductor vendor defines saturation current. Using an inductor with a smaller inductance value forces discontinuous PWM where the inductor current ramps down to zero before the end of each switching cycle. This reduces the boost converter’s maximum output current, causes large input voltage ripple and reduces efficiency. In general, large inductance value provides much more output and higher conversion efficiency. Small inductance value can give better the load transient response. For these reasons, a 4.7µH to 22µH inductor value range is recommended. Table 2 lists the recommended inductor for the TPS61500. Meanwhile, the TPS61500 can program the switching frequency. Normally, small inductance value is suitable for high frequency and vice versa. The device has built-in slope compensation to avoid sub-harmonic oscillation associated with current mode control. If the inductor value is lower than 4.7µH, the slope compensation may not be adequate, and the loop can be unstable. Therefore, customers need to verify the inductor in their application if it is different from the recommended values. 12 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS61500 TPS61500 www.ti.com ........................................................................................................................................................................................... SLVS893 – DECEMBER 2008 Table 2. Recommended Inductors for TPS61500 Part Number L (µH) DCR Max (mΩ) Saturation Current (A) Size (L × W × H mm) VENDOR TOKO D104C2 10 44 3.6 10.4 × 10.4 × 4.8 VLF10040 15 42 3.1 10.0 × 9.7 × 4.0 TDK CDRH105RNP 22 61 2.9 10.5 × 10.3 × 5.1 Sumida MSS1038 15 50 3.8 10.0 × 10.2 × 3.8 Coilcraft SELECTING THE SCHOTTKY DIODE The high switching frequency of the TPS61500 demands a high-speed rectification for optimum efficiency. Ensure that the diode’s average and peak current rating exceed the average output current and peak inductor current. In addition, the diode’s reverse breakdown voltage must exceed the switch FET rating voltage of 40V. So, the VISHAY SS3P6L-E3/86A is recommended for TPS61500. The power dissipation of the diode's package must be larger thant the IOUT(max) x VD SELECTING THE COMPENSATION CAPACITOR AND RESISTOR The TPS61500 has an external compensation, COMP pin, which allows the loop response to be optimized for each application. The COMP pin is the output of the internal error amplifier. An external ceramic capacitors C4 are connected to COMP pin to stabilize the feedback loop. Use 470-nF for C4. SELECTING THE INPUT AND OUTPUT CAPACITOR The output capacitor is mainly selected to meet the requirements for the output ripple and loop stability. This ripple voltage is related to the capacitor’s capacitance and its equivalent series resistance (ESR). Assuming a capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated by (Vout - Vin )Iout Cout = Vout ´ Fs ´ Vripple (6) where, Vripple = peak to peak output ripple. The additional output ripple component caused by ESR is calculated using: Vripple_ESR = Iout ´ RESR (7) Due to its low ESR, Vripple_ESR can be neglected for ceramic capacitors, but must be considered if tantalum or electrolytic capacitors are used. Care must be taken when evaluating a ceramic capacitor’s derating under dc bias, aging and AC signal. For example, larger form factor capacitors (in 1206 size) have their self resonant frequencies in the range of the switching frequency. So the effective capacitance is significantly lower. The DC bias can also significantly reduce capacitance. Ceramic capacitors can loss as much as 50% of its capacitance at its rated voltage. Therefore, almost leave margin on the voltage rating to ensure adequate capacitance at the required output voltage. The capacitor in the range of 1uF to 4.7µF is recommended for input side. The output requires a capacitor in the range of 1µF to 10µF. The output capacitor affects the loop stability of the boost regulator. If the output capacitor is below the range, the boost regulator can potentially become unstable. The popular vendors for high value ceramic capacitors are: TDK (http://www.component.tdk.com/components.php) Murata (http://www.murata.com/cap/index.html) Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS61500 13 TPS61500 SLVS893 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com LAYOUT CONSIDERATIONS As for all switching power supplies, especially those running at high switching frequency and high currents, layout is an important design step. If layout is not carefully done, the regulator could suffer from instability as well as noise problems. To maximize efficiency, switch rise and fall times are very fast. To prevent radiation of high frequency noise (eg. EMI), proper layout of the high frequency switching path is essential. Minimize the length and area of all traces connected to the SW pin and always use a ground plane under the switching regulator to minimize interplane coupling. The high current path including the switch, Schottky diode, and output capacitor, contains nanosecond rise and fall times and should be kept as short as possible. The input capacitor needs not only to be close to the VIN pin, but also to the GND pin in order to reduce the Iinput supply ripple. VIN INPUT CAPACITOR VOUT INDUCTOR SCHOTTKEY OUTPUT CAPACITOR SW LED String Minimize the area of SW trace SW PGND SW PGND VIN PGND PGND Thermal Pad EN OVP FREQ SS DMIC FB FEEDBACK AGND COMP COMPENSATION Place enough VIAs around thermal pad to enhance thermal performance AGND THERMAL CONSIDERATIONS As mentioned before, the maximum IC junction temperature should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation of the TPS61500. Calculate the maximum allowable dissipation, PD(max), and keep the actual dissipation less than or equal to PD(max). The maximum-power-dissipation limit is determined using the following equation: PD(max) = 125°C - TA RθJA (8) where, TA is the maximum ambient temperature for the application. RθJA is the thermal resistance junction-to-ambient given in Power Dissipation Table. The TPS61500 comes in a thermally enhanced TSSOP package. This package includes a thermal pad that improves the thermal capabilities of the package. The RθJA of the TSSOP package greatly depends on the PCB layout. 14 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS61500 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS61500PWP ACTIVE HTSSOP PWP 14 TPS61500PWPR ACTIVE HTSSOP PWP 14 90 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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