Data Sheet, Rev. 1.0, July 2008 BTM7750GP TrilithIC Automotive Power BTM7750GP Table of Contents Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 2.1 2.2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 4.1 4.2 4.3 4.4 4.5 4.6 Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Overtemperature Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Undervoltage Lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Status Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5.1 5.2 5.3 5.4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Data Sheet 2 8 8 8 8 8 8 8 10 10 11 11 12 Rev. 1.0, 2008-07-07 TrilithIC 1 BTM7750GP Overview Features • • • • • • • • • • • • • • • Quad D-MOS switch driver Free configurable as bridge or quad-switch Optimized for DC motor management applications Low RDS ON High side: 70 mΩ typ. @ 25°C,165 mΩ max. @ 110°C Low side: 45 mΩ typ. @ 25°C, 100 mΩ max. @ 110°C Maximum peak current: typ. 12 A @ 25 °C Very low quiescent current: typ. 5 μA @ 25 °C Small outline, enhanced power PG-DSO-package Operates up to 40 V Status flag diagnosis Short-circuit-protection Overtemperature shut down with hysteresis Internal clamp diodes Under-voltage detection with hysteresis Green Product (RoHS compliant) AEC Qualified P-TO263-15-1 Description The BTM7750GP is part of the TrilithIC family containing three dies in one package: One double high-side switch and two low-side switches. The drains of these three vertical DMOS chips are mounted on separated lead frames. The sources are connected to individual pins, so the BTM7750GP can be used in H-bridge- as well as in any other configuration. The double high-side switch is manufactured in SMART SIPMOS® technology which combines low RDS ON vertical DMOS power stages with CMOS circuitry for control, protection and diagnosis. To achieve low RDS ON and fast switching performance, the low-side switches are manufactured in S-FET logic level technology. Type Package Marking BTM7750GP P-TO263-15-1 BTM7750GP Data Sheet 3 Rev. 1.0, 2008-07-07 BTM7750GP 2 Pin Configuration 2.1 Pin Assignment Molding Compound IL1 1 Heat-Slug 1 NC 2 18 SL1 3 NC 4 SH1 5 DL1 Heat-Slug 2 GND 6 IH1 7 DHVS 8 ST 9 IH2 10 SH2 11 NC 12 17 DHVS Heat-Slug 3 IL2 13 16 Figure 1 Data Sheet NC 14 SL2 15 DL2 Pin Assignment BTM7750GP (Top View) 4 Rev. 1.0, 2008-07-07 BTM7750GP Table 1 Pin No. Pin Definitions and Functions Symbol Function 1 IL1 Analog input of low-side switch 1 2 NC Not connected 3 SL1 Source of low-side switch 1 4 NC Not connected 5 SH1 Source of high-side switch 1 6 GND Ground of high-side switches 7 IH1 Digital input of high-side switch 1 8 DHVS Drain of high-side switches and power supply voltage 9 ST Status; open Drain output 10 IH2 Digital input of high-side switch 2 11 SH2 Source of high-side switch 2 12 NC Not connected 13 IL2 Analog input of low-side switch 2 14 NC Not connected 15 SL2 Source of low-side switch 2 16 DL2 Drain of low-side switch 2 Heat-Slug 3 or Heat-Dissipator 17 DHVS Drain of high-side switches and power supply voltage Heat-Slug 2 or Heat-Dissipator 18 DL1 Drain of low-side switch 1 Heat-Slug 1 or Heat-Dissipator Pins written in bold type need power wiring. Data Sheet 5 Rev. 1.0, 2008-07-07 BTM7750GP 2.2 Terms IS VS=12V CL 100µF CS 470nF IFH1,2 DHVS IST LK IST 8, 17 ST 9 Diagnosis VST IIH1 VSTL IH1 7 IIH1 IH2 10 VIH2 RO2 Gate Driver 11 16 IGND 5 18 Protection IL1 SH2 ISH2 DL2 IDL2 IDL LK 2 VUVON SH1 ISH1 VUVOFF DL1 IDL1 6 ILKCL IIL1 1 -VFH1 Biasing and Protection RO1 GND VDSH1 -VFH2 Gate Driver VSTZ VIH1 VDSH2 IDL LK 1 Gate Driver Protection IIL2 VIL1 IL2 13 Gate Driver VIL th 1 VIL2 3 VIL th 2 Figure 2 15 VDSL1 VDSL2 -VFL1 -VFL2 SL1 SL2 ISCP L 1 ISCP L 2 ISL1 ISL2 Terms BTM7750GP Table 2 HS-Source-Current Named during Short Circuit Named during Leakage-Cond. ISH1,2 ISCP H IDL LK Data Sheet 6 Rev. 1.0, 2008-07-07 BTM7750GP 3 Block Diagram DHVS 8, 17 9 ST Diagnosis IH1 IH2 7 10 Biasing and Protection Driver IN OUT 0 0 L L 0 1 L H 1 0 H L 1 1 H H RO1 RO2 11 16 SH2 DL2 6 GND 5 18 Protection 1 IL1 SH1 DL1 Gate Driver Protection 13 Gate Driver IL2 3 SL1 Figure 3 Data Sheet 15 SL2 Block Diagram BTM7750GP 7 Rev. 1.0, 2008-07-07 BTM7750GP 4 Circuit Description 4.1 Input Circuit The control inputs IH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into the necessary form for driving the power output stages. The inputs are protected by ESD clamp-diodes. The inputs IL1 and IL2 are connected to the internal gate-driving units of the N-channel vertical power-MOS-FETs. 4.2 Output Stages The output stages consist of an low RDSON Power-MOS H-bridge. In H-bridge configuration, the D-MOS body diodes can be used for freewheeling when communicating inductive loads. If the high-side switches are used as single switches, positive and negative voltage spikes which occur when driving inductive loads are limited by integrated power clamp diodes. 4.3 Short Circuit Protection The outputs are protected against – output short circuit to ground – output short circuit to the supply voltage, and – overload (load short circuit). An internal OP-Amp controls the Drain-Source-Voltage by comparing the DS-Voltage-Drop with an internal reference voltage. Above this trip point the OP-Amp reduces the output current depending on the junction temperature and the drop voltage. 4.4 Overtemperature Protection The high-side and the low-side switches also incorporate an over temperature protection circuit with hysteresis which switches off the output transistors. In the case of the high-side switches, the status output is set to low. 4.5 Undervoltage Lockout When VS reaches the switch-on voltage VUVON the IC becomes active with a hysteresis. The High-Side output transistors are switched off if the supply voltage VS drops below the switch off value VUVOFF. 4.6 Status Flag The status flag output is an open drain output with zener-diode which requires a pull-up resistor, as shown in the application circuit in Figure 4 “Application Example BTM7750GP” on Page 15. Various errors as listed in the table “Diagnosis” are reported by switching the open drain output ST to low. Data Sheet 8 Rev. 1.0, 2008-07-07 BTM7750GP Table 3 Truth table and Diagnosis (valid only for the High-Side-Switches) Flag IH1 IH2 Inputs Normal operation; identical with functional truth table Overtemperature high-side switch1 Overtemperature high-side switch2 Overtemperature both high-side switches Under voltage SH1 SH2 ST Remarks Outputs stand-by mode switch2 active switch1 active both switches active 0 0 1 1 0 1 0 1 L L H H L H L H 1 1 1 1 0 1 X X L L X X 1 0 detected X X 0 1 X X L L 1 0 detected 0 X 1 0 1 X L L L L L L 1 0 0 detected detected X X L L 1 not detected Inputs: Outputs: Status: 0 = Logic LOW Z = Output in tristate condition 1 = No error 1 = Logic HIGH L = Output in sink condition 0 = Error X = don’t care H = Output in source condition X = Voltage level undefined Data Sheet 9 Rev. 1.0, 2008-07-07 BTM7750GP 5 Electrical Characteristics 5.1 Absolute Maximum Ratings Absolute Maximum Ratings1) – 40 °C < Tj < 110 °C Pos. Parameter Symbol Limit Values Unit Remarks min. max. VS VS(SCP) – 0.3 42 V – 28 V IS IIH VIH – 10 3) A TA = 25°C; tP < 100 msj –5 5 mA Pin IH1 and IH2 – 10 16 V Pin IH1 and IH2 VST IST – 0.3 5.4 V –5 5 mA Pin ST VDSL 42 – V VIL = 0 V; ID ≤ 1 mA; High-Side-Switches (Pins DHVS, IH1,2 and SH1,2) 5.1.1 Supply voltage 5.1.2 Supply voltage for full short circuit protection 5.1.3 HS-drain current2) 5.1.4 HS-input current 5.1.5 HS-input voltage – Status Output ST 5.1.6 Status pull up voltage 5.1.7 Status Output current Low-Side-Switches (Pins DL1,2, IL1,2 and SL1,2) 5.1.8 Drain-Source-Clamp voltage Tj = 25°C 5.1.9 Supply voltage for short circuit protection VDSL(SCP) – 36 V – 20 V IDL VIL – 12 3) A VIL = 5 V VIL = 10 V TA = 25°C; tP < 100 ms – 0.3 10 V – Tj Tstg – 40 110 °C – – 55 150 °C – VESD VESD VESD VESD – 2 kV – 1 kV – 2 kV – 8 kV 5.1.10 5.1.11 LS-drain current2) 5.1.12 LS-input voltage Temperatures 5.1.13 Junction temperature 5.1.14 Storage temperature 4) ESD Protection 5.1.15 Input LS-Switch 5.1.16 Input HS-Switch 5.1.17 Status HS-Switch 5.1.18 Output LS and HS-Switch 1) 2) 3) 4) all other pins connected to Ground Not subject to production test; specified by design Single pulse Internally limited ESD susceptibility HBM according to EIA/JESD22-A114-B (1.5kΩ, 100pF) Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Data Sheet 10 Rev. 1.0, 2008-07-07 BTM7750GP 5.2 Pos. Functional Range Parameter Symbol Limit Values min. max. Unit Remarks 5.2.19 Supply voltage VS VUVOFF 42 V After VS rising above VUVON 5.2.20 Input voltage HS – 0.3 15 V – 5.2.21 Input voltage LS – 0.3 10 V – 5.2.22 Status output current 0 2 mA – 5.2.23 Junction temperature VIH VIL IST Tj – 40 110 °C – Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table 5.3 Pos. Thermal Resistance Parameter Symbol 5.3.24 LS-junction to soldering point1) 5.3.25 1) 5.3.26 HS-junction to soldering point 1) Junction to Ambient RthJA = Tj(HS) / (P(HS)+ P(LS)) RthJSP RthJSP RthJA Limit Values Unit Min. Typ. Max. – – 1.7 K/W – – 1.7 K/W – 16 – K/W Conditions 2) 1) Not subject to production test, specified by design. 2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. Data Sheet 11 Rev. 1.0, 2008-07-07 BTM7750GP 5.4 Electrical Characteristics ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 110 °C; 8 V < VS < 18 V unless otherwise specified Pos. Parameter Symbol Limit Values Unit Test Condition min. typ. max. – 5 9 μA IH1 = IH2 = 0 V Tj = 25 °C – – 12 μA IH1 = IH2 = 0 V1) Current Consumption HS-switch 5.4.27 Quiescent current IS 5.4.28 Supply current; one HS-switch active IS – 1.65 3.3 mA IH1 or IH2 = 5 V VS = 12 V 5.4.29 Supply current; both HS-switches active IS – 3.3 6.6 mA IH1 and IH2 = 5 V VS = 12 V 5.4.30 Leakage current of high-side switch ISH LK – – 6 μA 5.4.31 Leakage current through logic GND in free wheeling condition ILKCL = IFH + – ISH – 10 mA VIH = VSH = 0 V VS = 12 V IFH = 3 A VS = 12 V IIL – 8 30 μA VIL = 5 V; normal operation – 160 300 μA VIL = 5 V; IDL LK – 2 10 μA VIL = 0 V VDSL = 18 V VUVON VUVOFF VUVHY – – 4.8 V 1.8 – 3.5 V – 1 – V VS increasing VS decreasing VUVON – VUVOFF Current Consumption LS-switch 5.4.32 Input current failure mode 5.4.33 Leakage current of low-side switch Under Voltage Lockout HS-switch 5.4.34 Switch-ON voltage 5.4.35 Switch-OFF voltage 5.4.36 Switch ON/OFF hysteresis Output stages 5.4.37 Inverse diode of high-side switch; Forward-voltage VFH – 0.8 1.2 V IFH = 3 A 5.4.38 Inverse diode of low-side switch; Forward-voltage VFL – 0.8 1.2 V IFL = 3 A 5.4.39 Static drain-source on-resistance of high-side switch RDS ON H – 70 – mΩ – 110 165 mΩ – 45 – mΩ – 65 100 mΩ ISH = 1 A; VS = 12 V Tj = 25 °C ISH = 1 A; VS = 12 V Tj = 110 °C1) ISL = 1 A; VIL = 5 V Tj = 25 °C ISL = 1 A; VIL = 5 V Tj = 110 °C1) 5.4.40 Static drain-source on-resistance of low-side switch Data Sheet RDS ON L 12 Rev. 1.0, 2008-07-07 BTM7750GP ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 110 °C; 8 V < VS < 18 V unless otherwise specified Pos. Parameter Symbol Limit Values Unit Test Condition min. typ. max. 13 15 18 A Tj = – 40 °C – 12 – A Tj = + 25 °C 8 10 12 A Tj = + 110 °C1) RO 8 15 35 kΩ VDSL = 3 V ISCP L 21 28 34 A Tj = – 40 °C – 22 – A Tj = 25 °C 13 17 21 A Tj = 110 °C1) Short Circuit of high-side switch to GND 5.4.41 Initial peak SC current tdel = 100 µs; VS = 12 V; VDSH = 12V ISCP H Short Circuit of high-side switch to VS 5.4.42 Output pull-down-resistor Short Circuit of low-side switch to VS 5.4.43 Initial peak SC current VDSL = 12V; VIL = 5V; tdel = 250 µs Thermal Shutdown1) 5.4.44 Thermal shutdown junction temperature Tj SD 155 180 190 °C – 5.4.45 Thermal switch-on junction temperature Tj SO 150 170 180 °C – 5.4.46 Temperature hysteresis ΔΤ – 10 – °C ΔΤ = TjSD – TjSO VST L IST LK VST Z – 0.2 0.6 V IST = 1.6 mA – – 10 μA VST = 5 V 5.4 – – V IST = 1.6 mA Status Flag Output ST of high-side switch 5.4.47 Low output voltage 5.4.48 Leakage current 5.4.49 Zener-limit-voltage Data Sheet 13 Rev. 1.0, 2008-07-07 BTM7750GP ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 110 °C; 8 V < VS < 18 V unless otherwise specified Pos. Parameter Symbol Limit Values Unit Test Condition min. typ. max. tON tOFF dV/dtON -dV/dtOFF – 85 180 μs – 80 180 μs – – 1.2 V/μs – – 1.6 V/μs – 60 150 μs – 60 150 μs 1) Switching times of high-side switch 5.4.50 Turn-ON-time to 90% VSH 5.4.51 Turn-OFF-time to 10% VSH 5.4.52 Slew rate on 10 to 30% VSH 5.4.53 Slew rate off 70 to 40% VSH RLoad = 12 Ω VS = 12 V 1) Switching times of low-side switch RLoad = 10 Ω VS = 12 V VIL = 0 to 5 V 5.4.54 Turn-ON-time to 10% VDL 5.4.55 Turn-OFF-time to 90% VDL tON tOFF 5.4.56 Slew rate on 70 to 50% VDL -dV/dtON – 1 1.5 5.4.57 Slew rate off 50 to 70% VDL dV/dtOFF – 1 1.5 V/μs RLoad = 4.7 Ω V/μs VS = 12 V VIL = 0 to 5 V VIH High VIH Low VIH HY IIH High IIH Low RI VIH Z – – 2.5 V – 1 – – V – – 0.3 – V – 15 30 60 μA 5 – 20 μA VIH = 5 V VIH = 0.4 V 2.7 4 5.5 kΩ – 5.4 – – V IIH = 1.6 mA VIL th 0.9 1.7 2.2 V IDL = 2 mA Control Inputs of high-side switches IH 1, 2 5.4.58 H-input voltage 5.4.59 L-input voltage 5.4.60 Input voltage hysteresis 5.4.61 H-input current 5.4.62 L-input current 5.4.63 Input series resistance 5.4.64 Zener limit voltage Control Inputs IL1, 2 5.4.65 Gate-threshold-voltage 1) Not subject to production test; specified by design Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specified mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and the given supply voltage. Data Sheet 14 Rev. 1.0, 2008-07-07 BTM7750GP 6 Application Information Note: The following simplified application examples are given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. The function of the described circuits must be verified in the real application Watchdog Reset Q RQ 100 kΩ WD R TLE 4278G I VS=12V D CQ 22µF CS 10µF D01 Z39 CD 47nF VCC DHVS 8, 17 RS ST 9 10 kΩ Diagnosis IH1 7 IH2 10 GND 6 Biasing and Protection Gate Driver RO1 XC866 µP RO2 Gate Driver 11 DL2 16 5 18 Protection IL1 1 SH2 SH1 M DL1 Gate Driver Protection IL2 13 Gate Driver GND 3 15 SL1 SL2 In case of VDSL<-0.6V or reverse battery the current into the µC might be limited by external resitors to protect the µC Figure 4 Data Sheet Application Example BTM7750GP 15 Rev. 1.0, 2008-07-07 BTM7750GP 7 Package Outlines 21.6 ±0.2 8.3 1) 4.4 5.56 ±0.15 1.27 ±0.1 B 0.1 4.8 1) 0.05 2.4 4.7 ±0.5 8.41) 8.21) A 9.25 ±0.2 (15) 1±0.3 8.18 ±0.15 2.7 ±0.3 1±0.2 0...0.15 14x1.4 0.5 ±0.1 0.8 ±0.1 8˚ max. 0.25 1) M A B 0.1 Typical All metal surfaces tin plated, except area of cut. GPT09151 Footprint 21.6 8.4 4 16 9.5 0.8 0.4 Figure 5 1 P-TO263-15-1 (Plastic Transistor Single Outline Package) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Data Sheet 16 Dimensions in mm Rev. 1.0, 2008-07-07 BTM7750GP 8 Revision History Rev. Date Changes 1.0 2008-07-07 Initial Version Data Sheet 17 Rev. 1.0, 2008-07-07 Edition 2008-07-07 Published by Infineon Technologies AG 81726 Munich, Germany © 7/10/08 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. 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