INFINEON BTS770G

TrilithIC
BTS 770 G
Overview
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Quad switch driver
Free configurable as bridge or quad-switch
Optimized for DC motor management applications
Ultra low RDS ON @ 25 °C:
High-side switch: typ.165 mΩ,
P-DSO-28-9
Low-side switch: typ. 55 mΩ
Very high peak current capability
Very low quiescent current
Space- and thermal optimized power P-DSO-Package
Load and GND-short-circuit-protected
Operates up to 40 V
Status flag diagnosis
Overtemperature shut down with hysteresis
Short-circuit detection and diagnosis
Open-load detection and diagnosis
C-MOS compatible inputs
Internal clamp diodes
Isolated sources for external current sensing
Over- and under-voltage detection with hysteresis
Type
Ordering Code
Package
BTS 770 G
Q67007-A9254
P-DSO-28-9
Description
The BTS 770 G is a TrilithIC contains one double high-side switch and two low-side
switches in one P-DSO-28-9 -Package.
“Silicon instead of heatsink”
becomes true
The ultra low RDS ON of this device avoids powerdissipation. It saves costs in mechanical
construction and mounting and increases the efficiency.
The high-side switches are produced in the SIEMENS SMART SIPMOS® technology. It
is fully protected and contains the signal conditioning circuitry for diagnosis. (The
comparable standard high-side product is the BTS 611L1.)
Semiconductor Group
1
1999-01-07
BTS 770 G
For minimized RDS ON the two low-side switches are produced in the SIEMENS Millifet
logic level technology (The comparable standard product is the BUZ 101AL).
Each drain of these three chips is mounted on separated leadframes (see P-DSO-28-9
pin configuration). The sources of all four power transistors are connected to separate
pins.
So the BTS 770 G can be used in H-Bridge configuration as well as in any other switch
configuration.
Moreover, it is possible to add current sense resistors.
All these features open a broad range of automotive and industrial applications.
Semiconductor Group
2
1999-01-07
BTS 770 G
DL1
1
28 DL1
GL1
2
27 SL1
DL1
3
N.C.
4
25 DL1
DHVS
5
24 DHVS
GND
6
23 SH1
GH1
7
LS-Lead Frame 1
26 SL1
22 SH1
HS-Lead Frame
ST
8
21 SH2
GH2
9
20 SH2
DHVS 10
19 DHVS
N.C.
11
18 DL2
DL2
12
GL2
13
16 SL2
DL2
14
15 DL2
LS-Lead Frame 2
17
SL2
AEP02071
Figure 1
Pin Configuration (top view)
Semiconductor Group
3
1999-01-07
BTS 770 G
Pin Definitions and Functions
Pin No.
Symbol
Function
1, 3, 25, 28
DL1
Drain of low-side switch1
Leadframe 1 1)
2
GL1
Gate of low-side switch1
4
N.C.
not connected
5, 10, 19, 24
DHVS
Drain of high-side switches and power supply voltage
Leadframe 2 1)
6
GND
Ground
7
GH1
Gate of high-side switch1
8
ST
Status of high-side switches; open Drain output
9
GH2
Gate of high-side switch2
11
N.C.
not connected
12, 14, 15, 18
DL2
Drain of low-side switch2
Leadframe 3 1)
13
GL2
Gate of low-side switch2
16, 17
SL2
Source of low-side switch2
20, 21
SH2
Source of high-side switch2
22, 23
SH1
Source of high-side switch1
26, 27
SL1
Source of low-side switch1
1)
To reduce the thermal resistance these pins are direct connected via metal bridges to the leadframe.
Bold type: Pin needs power wiring
Semiconductor Group
4
1999-01-07
BTS 770 G
DHVS
5, 10, 19, 24
ST
8
DST
C6V1
GH1
GH2
GND
7
R I1
3.5 k Ω
9
R I2
3.5 k Ω
6
Diagnosis
Biasing and Protection
Driver
IN OUT
1
2 1 2
DI1
C6V1 0 0 L L
0 1 L H
1 0 H L
1 1 H H
DI2
C6V1
R O1
R O2
10 k Ω
10 k Ω
20, 21
12, 14, 15, 18
22, 23
1, 3, 25, 28
GL1
GL2
SH2
DL2
SH1
DL1
2
13
26, 27
SL1
16, 17
SL2
AEB02072
Figure 2
Block Diagram
Semiconductor Group
5
1999-01-07
BTS 770 G
Circuit Description
Input Circuit
The control inputs GH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with
hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into
the necessary form for driving the power output stages.
The inputs GH1 and GH2 are connected to a standard N-channel logic level power-MOS
gate.
Output Stages
The output stages consist of an ultra low RDS ON Power-MOS H-Bridge. Protective circuits
make the outputs short circuit proof to ground and load short circuit proof. Positive and
negative voltage spikes, which occur when driving inductive loads, are limited by
integrated power clamp diodes.
Short Circuit Protection (valid only for the high-side switches)
The outputs are protected against
– output short circuit to ground, and
– overload (load short circuit).
An internal OP-Amp controls the Drain-Source-Voltage of the HS-Switches by
comparing the DS-Voltage-Drop with an internal reference voltage. Above this trippoint
the OP-Amp reduces the output current depending on the junction temperature and the
drop voltage.
In the case of overloaded high-side switches the status output is set to low.
If the HS-Switches are in OFF-state-Condition internal resistors RO1,2 from SH1,2 to GND
pull the voltage at SH1,2 to low values. On each output pin SH1 and SH2 an output
examiner circuit compares the output voltages with the internal reference voltage VEO.
This results in switching the status output to low. In H-Bridge condition this feature can
be used to protect the low-side switches against short circuit during the OFF-period.
Overtemperature Protection (valid only for the high-side-switches)
The chip also incorporates an overtemperature protection circuit with hysteresis which
switches off the output transistors and sets the status output to low.
Undervoltage-Lockout (UVLO)
When VS reaches the switch-on voltage VUVON the IC becomes active with a hysteresis.
The High-Side output transistors are switched off if the supply voltage VS drops below
the switch off value VUVOFF.
Semiconductor Group
6
1999-01-07
BTS 770 G
Overvoltage-Lockout (OVLO)
When VS reaches the switch-off voltage VOVOFF the High-Side output transistors are
switched off with a hysteresis. The IC becomes active if the supply voltage VS drops
below the switch-on value VOVON.
Open Load Detection
Open load is detected by current measurement. If the output current drops below an
internal fixed level the error flag is set with a delay.
Status Flag
Various errors as listed in the table “Diagnosis” are detected by switching the open drain
output ST to low.
Semiconductor Group
7
1999-01-07
BTS 770 G
Truthtable and Diagnosis (valid only for the High-Side-Switches)
Flag
GH1
GH2
SH1
Inputs
Normal operation;
identical with functional truth table
Open load at high-side switch1
Open load at high-side switch2
Short circuit to DHVS at high-side switch1
Short circuit to DHVS at high-side switch2
Overtemperature high-side switch1
Overtemperature high-side switch2
Overtemperature both high-side switch
Over- and Under-Voltage
SH2
ST Remarks
Outputs
0
0
1
1
0
1
0
1
L
L
H
H
L
H
L
H
1
1
1
1
0
0
1
0
1
X
0
1
X
0
0
1
Z
Z
H
L
H
X
L
H
X
Z
Z
H
1
1
0
1
1
0
0
0
1
0
1
X
0
1
X
0
0
1
H
H
H
L
H
X
L
H
X
H
H
H
0
1
1
0
1
1
0
1
X
X
L
L
X
X
1
0
detected
X
X
0
1
X
X
L
L
1
0
detected
0
X
1
0
1
X
L
L
L
L
L
L
1
0
0
detected
detected
X
X
L
L
1
not detected
Inputs:
Outputs:
Status:
0 = Logic LOW
Z = Output in tristate condition
1 = No error
1 = Logic HIGH
L = Output in sink condition
0 = Error
X = don’t care
H = Output in source condition
stand-by mode
switch2 active
switch1 active
both switches
active
detected
detected
detected
detected
X = Voltage level undefined
Semiconductor Group
8
1999-01-07
BTS 770 G
Electrical Characteristics
Absolute Maximum Ratings
– 40 °C < Tj < 150 °C
Parameter
Symbol
Limit Values
min.
Unit Remarks
max.
High-Side-Switches (Pins DHVS, GH1,2 and SH1,2)
Supply voltage
HS-drain current
HS-input current
HS-input voltage
VS
IDHS
IGH
VGH
– 0.3
43
V
–
–8
*
A
* internally limited
–2
2
mA
Pin GH1 and GH2
– 10
16
V
Pin GH1 and GH2
IST
–5
5
mA
Pin ST
Status Output ST
Status Output current
Low-Side-Switches (Pins DL1,2, GL1,2 and SL1,2)
Break-down voltage
LS-drain current
LS-drain current
LS-drain current
lS-input voltage
V(BR)DSS
IDLS
IDLS
IDLS
VGL
50
–
V
VGS = 0 V; ID <= 1 mA
–
10
A
–
–
20
A
–
30
A
t < 1 ms; ν < 0.1
t < 0.1 ms; ν < 0.1
– 10
14
V
Pin GL1 and GL2
Tj
Tstg
– 40
150
°C
–
– 50
150
°C
–
–
20
K/W measured to pin3 or 12
–
20
K/W measured to pin19
–
60
K/W –
Temperatures
Junction temperature
Storage temperature
Thermal Resistances (one HS-LS-Path active)
LS-junction case
HS-junction case
Junction ambient
RthjCLS
RthjCHS
Rthja
Note: Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
Semiconductor Group
9
1999-01-07
BTS 770 G
Operating Range
Parameter
Symbol
Limit Values
min.
Unit
Remarks
max.
Supply voltage
VS
VUVOFF 34
V
After VS rising
above VUVON
Input voltages
VGH
VGL
IST
TjHS
TjLS
– 0.3
15
V
–
–9
13
V
–
0
2
mA
–
– 40
150
°C
–
– 40
150
°C
–
Input voltages
Output current
HS-junction temperature
LS-junction temperature
Note: In the operating range the functions given in the circuit description are fulfilled.
Semiconductor Group
10
1999-01-07
BTS 770 G
Electrical Characteristics
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V > VS > 18 V
unless otherwise specified
Parameter
Symbol
Limit Values
min.
typ.
max.
–
16
30
Unit Test Condition
Current Consumption
Quiescent current
IS
µA
GH1 = GH2 = L
VS = 13.2 V
Tj = 25 °C
Quiescent current
IS
–
–
35
µA
GH1 = GH2 = L
VS = 13.2 V
Supply current
IS
IS
–
2
3.5
mA
GH1 or GH2 = H
–
4
7
mA
GH1 and GH2 = H
–
5.4
7
V
3.5
4.3
–
V
–
1.1
–
V
VS increasing
VS decreasing
VUVON – VUVOFF
36
38
43
V
35
37.3
–
V
–
0.7
–
V
8
10
13
A
6.5
8.5
11
A
3.9
5
7
A
Supply current
Under Voltage Lockout (UVLO)
VUVON
Switch-OFF voltage
VUVOFF
Switch ON/OFF hysteresis VUVHY
Switch-ON voltage
Over Voltage Lockout (OVLO)
VOVOFF
Switch-ON voltage
VOVON
Switch OFF/ON hysteresis VOVHY
Switch-OFF voltage
VS increasing
VS decreasing
VOVOFF – VOVON
Short Circuit of Highside Switch to GND
Initial peak SC current
Initial peak SC current
Initial peak SC current
Semiconductor Group
ISCP
ISCP
ISCP
11
Tj = – 40 °C
Tj = 25 °C
Tj = 150 °C
1999-01-07
BTS 770 G
Electrical Characteristics (cont’d)
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V > VS > 18 V
unless otherwise specified
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit Test Condition
Short Circuit of Highside Switch to VS
OFF-state
examiner-voltage
VEO
2
3
4
V
VGH = 0 V
Output pull-down-resistor
RO
4
11
30
kΩ
–
10
90
200
mA
–
Open Circuit Detection of Highside Switch
Detection current
IOCD
Switching Times of Highside Switch
Switch-ON-time;
to 90% VSH
tON_H
–
0.2
0.4
ms
resistive load
ISH = 1 A; VS = 12 V
Switch-OFF-time;
to 10% VSH
tOFF_H
–
0.15
0.4
ms
resistive load
ISH = 1 A; VS = 12 V
Control Inputs of Highside Switches GH 1, 2
H-input voltage
L-input voltage
Input voltage hysterese
H-input current
L-input current
Input series resistance
Zener limit voltage
VGHH
VGHL
VGHHY
IGHH
IGHL
RI
VGHZ
–
2.8
3.5
V
–
1.5
2.3
–
V
–
–
0.5
–
V
–
20
60
90
µA
1
25
50
µA
VGH = 5 V
VGH = 0.4 V
2.5
3.5
6
kΩ
–
5.4
–
–
V
IGH = 1.6 mA
–
0.25
0.6
V
–
0.5
10
µA
5.4
–
–
V
IST = 1.6 mA
VST = 5 V
IST = 1.6 mA
Status Flag Output ST of Highside Switch
Low output voltage
Leakage current
Zener-limit-voltage
Semiconductor Group
VSTL
ISTLK
VSTZ
12
1999-01-07
BTS 770 G
Electrical Characteristics (cont’d)
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V > VS > 18 V
unless otherwise specified
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit Test Condition
Control Inputs of Lowside Switches GL1, 2
Gate-threshold-voltage
VGL(th)
0.8
1.6
2.5
V
Transconductance
gfs
–
5
–
S
VGL = VDSL;
IDL = 1 mA
VDSL = 20 V;
IDL = 20 A
Switching Times of Lowside Switch
Switch-ON delay time;
VGS = 5 V; RGS = 50Ω
td_ON_L
–
25
40
ns
resistive load
ISL = 1 A; VS = 12 V
Switch-ON time;
VGS = 5 V; RGS = 50Ω
tON_L
–
95
140
ns
resistive load
ISL = 1 A; VS = 12 V
Switch-OFF delay time;
VGS = 5 V; RGS = 50Ω
td_OFF_L
–
140
190
ns
resistive load
ISL = 1 A; VS = 12 V
Switch-OFF time;
VGS = 5 V; RGS = 50Ω
tOFF_L
–
85
115
ns
resistive load
ISL = 1 A; VS = 12 V
Thermal shutdown junction TjSD
temperature
155
–
190
°C
–
Thermal switch-on junction TjSO
temperature
150
–
180
°C
–
–
10
–
°C
∆T = TjSD – TjSO
Thermal Shutdown
Temperature hysteresis
Semiconductor Group
∆T
13
1999-01-07
BTS 770 G
Electrical Characteristics (cont’d)
ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V > VS > 18 V
unless otherwise specified
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit Test Condition
Output Stages
Leakage current
of highside switch
IHSLK
–
5
12
µA
VGH = VSH = 0 V
Leakage current
of lowside switch
ILSLK
–
20
100
µA
Clamp-diode
of highside switch;
Forward-Voltage
VFH
–
0.8
1.5
V
VGL = 0 V
VDS = 18 V
IFH = 3 A
Clamp-diode leakagecurrent (IFH + ISH)
of highside switch
ILKCL
–
2
10
mA
IFH = 3 A
Clamp-diode
of lowside switch;
forward-voltage
VFL
–
0.8
1.5
V
IFL = 3 A
Static drain-source
on-resistance
of highside switch
RDS ON H
–
165
220
mΩ
ISH = 1 A
Tj = 25 °C
Static drain-source
on-resistance
of lowside switch
RDS ON L
–
45
65
mΩ
ISL = 1 A;
VGL = 5 V
Tj = 25 °C
Static path on-resistance
RDS ON
–
–
500
mΩ
RDS ON H + RDS ON L;
ISH = 1 A
Note: The listed characteristics are ensured over the operating range of the integrated
circuit. Typical characteristics specify mean values expected over the production
spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and
the given supply voltage.
Semiconductor Group
14
1999-01-07
BTS 770 G
ΙS
CS
470 nF
Ι FH1, 2
Ι ST , Ι STLK
DHVS
5, 10, 19, 24
ST 8
DST
C6V1
Ι GH1
VST
VSTL
VSTZ
GH1 7
R I1
3.5 k Ω
Ι GH2
VGH1
GH2 9
R I2
3.5 k Ω
VGH2
+ VS
CL
100 µF
GND 6
Diagnosis
VDSH2
- VFH2
Biasing and Protection
Driver
IN OUT
1 2 1 2
DI1
C6V1 0 0 L L
0 1 L H
1 0 H L
1 1 H H
DI2
C6V1
R O1
R O2
10 kΩ
10 k Ω
VDSH1
- VFH1
20 SH2 Ι SH2
21
VUVON
VUVOFF
VOVON
VOVOFF
12, 14, 15, 18 DL2 Ι DL2
Ι LKL
22, 23 SH1 Ι SH1
Ι GND
Ι LKCL1, 2
1, 3, DL1 Ι DL1
25, 28
Ι LKL
GL1 2
VGL1
VGL(th)1
GL2 13
VGL2
VGL(th)2
RDSONH =
VDSH
Ι SH
Figure 3
RDSONL =
26, 27
SL1
Ι SL1
16, 17
SL2
Ι SL2
VEO1
VDSL1
- VFL1
VDSL
Ι SL
VEO2
VDSL2
- VFL2
AES02079
Test Circuit
HS-Source-Current Named during
Short Circuit
Named during
Open Circuit
Named during
Leakage-Cond.
ISH1,2
IOCD
IHSLK
Semiconductor Group
ISCP
15
1999-01-07
BTS 770 G
Watchdog
Reset
Q
RQ
100 k Ω
WD
R VCC
RS
CQ
22 F
TLE 4268G
I
VS = 12 V
DO1
D
CD
100 nF
GND
CS
22 µ F
DHVS
5, 10, 19, 24
ST 8
10 k Ω
DST
C6V1
GH1 7
R I1
3.5 k Ω
GH2 9
µP
R I2
3.5 k Ω
GND 6
Diagnosis
Driver
IN OUT
1
2 1 2
DI1
0
0
L L
C6V1
0 1 L H
1 0 H L
1 1 H H
DI2
C6V1
Biasing and Protection
R O1
10 k Ω
R O2
20 SH2
21
10 k Ω
12, 14, 15, 18 DL2
22, 23 SH1
M1
1, 3, DL1
25, 28
GL1 2
GL2 13
26, 27
SL1
Figure 4
16, 17
SL2
AES02074
Application Circuit
Semiconductor Group
16
1999-01-07
BTS 770 G
Package Outlines
0.35 x 45˚
7.6 -0.2 1)
0.23 +0.0
9
8˚ ma
x
2.65 max
2.45 -0.2
0.2 -0.1
P-DSO-28-9
(Plastic Dual Small Outline Package)
0.4 +0.8
1.27
0.35 +0.15 2)
0.1
0.2 28x
28
1
10.3 ±0.3
15
18.1 -0.4 1)
14
Index Marking
1) Does not include plastic or metal protrusions of 0.15 max rer side
2) Does not include dambar protrusion of 0.05 max per side
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
SMD = Surface Mounted Device
Semiconductor Group
17
GPS05123
Dimensions in mm
1999-01-07