INFINEON TLE7188F

D a t a S h e e t , V 2. 1 , 2 0 0 7 - 0 6
TLE7188F
3 - P h a s e B r i d g e D r i v er I C
A u to m o t i v e P o w e r
TLE7188F
Table of Contents
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
3.1
3.2
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Assignment TLE7188F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
4.1
4.2
4.3
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Default State of Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5
5.1
5.1.1
5.1.2
5.1.3
5.1.4
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
5.2.7
5.2.8
5.2.9
5.3
5.3.1
Description and Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MOSFET Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operation at Vs<12V - Integrated Charge Pumps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protection and Diagnostic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short Circuit Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Over current Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Dead Time and Shoot Through Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Under voltage Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Over voltage Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Over temperature Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VCC1 Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ERR Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Shunt Signal Conditioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
6.1
6.2
Application Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Layout Guide Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Data Sheet
2
11
11
11
12
12
13
16
16
16
16
16
17
17
17
17
18
21
22
V2.1, 2007-06-20
3-Phase Bridge Driver IC
1
TLE7188F
Overview
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Compatible to very low ohmic normal level input N-Channel MOSFETs
Separate input for each MOSFET
PWM frequency up to 25kHz
Fulfils specification down to 5.5V supply voltage
Low EMC sensitivity and emission
VQFN-48 package with exposed heat slug
Control inputs with TTL characteristics
Separate source connection for each MOSFET
Integrated minimum dead time
Shoot through protection
Short circuit protection with fixed detection level
Disable function and sleep mode
Detailed diagnosis
Thermal overload warning for driver IC
Integrated over current warning
Integrated current sense amplifier
0 to 100% duty cycle
Green Product (RoHS compliant)
AEC Qualified
VQFN-48
Description
The TLE7188F is a driver IC dedicated to control the 6 to 12 external MOSFETs forming the converter for high
current 3 phase motor drives in the automotive sector. It incorporates features like short circuit detection, diagnosis
and high output performance and combines it with typical automotive specific requirements like full functionality
even at low battery voltages. Its 3 high side and 3 low side output stages are powerful enough to drive MOSFETs
with 400nC gate charge with approx. 150 ns fall and rise times.
Typical applications are cooling fan, water pump, electro-hydraulic and electric power steering. The TLE7188F is
designed for 12 V power net.
Type
Package
Marking
TLE7188F
VQFN-48
TLE7188F
Data Sheet
3
V2.1, 2007-06-20
TLE7188F
Block Diagram
2
Block Diagram
Figure 1
Block Diagram
Data Sheet
4
V2.1, 2007-06-20
TLE7188F
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment TLE7188F
6/
*/
9'+
&%
*1'
&/
96
&/
&+
&+
(55 (55
*1'
,+
6+
,/
*+
,+
&%
,/
*/
,+
6/
,/
*+
(1$
6+
6&'/
*+
97+2&
6+
,1+
*1'
$*1'
*/
,63
7/()
7RSYLHZ
6/ 96B2$ 92
Figure 2
Data Sheet
,61
,63
95,
952
92
,61
,63
92
,61
Pin Configuration
5
V2.1, 2007-06-20
TLE7188F
Pin Configuration
3.2
Pin Definitions and Functions
Pin
Symbol
Function
1
SL3
Connection to source low side switch 3
2
VS_OA
Voltage supply I-DC Link OpAmps and voltage reference buffer
3
VO1
Output of OpAmp 1 for shunt signal amplification
4
ISN1
- Input of OpAmp 1 for shunt signal amplification
5
ISP1
+ Input of OpAmp 1 for shunt signal amplification
6
VRI
Input of bias reference amplifier
7
VRO
Output of bias reference amplifier
8
VO2
Output of OpAmp 2 for shunt signal amplification
9
ISN2
- Input of OpAmp 2 for shunt signal amplification
10
ISP2
+ Input of OpAmp 2 for shunt signal amplification
11
VO3
Output of OpAmp 3 for shunt signal amplification
12
ISN3
- Input of OpAmp 3 for shunt signal amplification
13
ISP3
+ Input of OpAmp 3 for shunt signal amplification
14
AGND
Analog ground especially for the current sense OpAmps
15
INH
Inhibit pin (active low)
16
VTHOC
Threshold voltage for overcurrent detection
17
SCDL
Input pin to adjust short circuit detection level
18
ENA
Enable pin (active high)
19
IL3
Input for low side switch 3 (active high)
20
IH3
Input for high side switch 3 (active low)
21
IL1
Input for low side switch 1 (active high)
22
IH1
Input for high side switch 1 (active low)
23
IL2
Input for low side switch 2 (active high)
24
IH2
Input for high side switch 2 (active low)
25
ERR1
Error signal 1
26
ERR2
Error signal 2
27
CH2
+ terminal for pump capacitor of charge pump 2
28
CH1
+ terminal for pump capacitor of charge pump 1
29
CL1
- terminal for pump capacitor of charge pump 1
30
VS
Voltage supply
31
CL2
- terminal for pump capacitor of charge pump 2
32
GND3
Logic and power ground
33
CB1
Buffer capacitor for charge pump 1
34
VDH
Connection to drain of high side switches for short circuit detection
35
GL1
Output to gate low side switch 1
36
SL1
Connection to source low side switch 1
37
GND1
Logic and power ground
38
SH1
Connection to source high side switch 1
39
GH1
Output to gate high side switch 1
40
CB2
Buffer capacitor for charge pump 2
Data Sheet
6
V2.1, 2007-06-20
TLE7188F
Pin Configuration
Pin
Symbol
Function
41
GL2
Output to gate low side switch 2
42
SL2
Connection to source low side switch 2
43
GH2
Output to gate high side switch 2
44
SH2
Connection to source high side switch 2
45
GH3
Output to gate high side switch 3
46
SH3
Connection to source high side switch 3
47
GND2
Logic and power ground
48
GL3
Output to gate low side switch 3
Data Sheet
7
V2.1, 2007-06-20
TLE7188F
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Absolute Maximum Ratings 1)
-40 °C ≤ Tj ≤ 150 °C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Conditions
Voltages
4.1.1
Supply voltage
VS
-4.0
45
V
with 10Ohm and
1µF
4.1.2
Supply voltage
-0.3
45
V
–
4.1.3
Supply voltage
-0.3
47
V
tp<200ms
4.1.4
Voltage range at IHx,ILx,ERRx, VOx,
VTHOC, ENA, VRI, VRO, SCDL
VS
VS
VDP
-0.3
6.0
V
–
4.1.5
Voltage range at INH
-0.3
18.0
V
–
4.1.6
Voltage range at VS_OA
-0.3
18.0
V
–
4.1.7
Voltage range at SLx
-7
7
V
–
4.1.8
Voltage range at SHx
-7
45
V
–
4.1.9
Voltage range at GLx
-7
18
V
–
4.1.10
Voltage range at GHx
-7
55
V
–
4.1.11
Voltage difference Gxx-Sxx
-0.3
15
V
–
4.1.12
Voltage range at VDH
-0.3
55
V
4.1.13
Voltage range at VDH
VINH
VVS_OA
VSL
VSH
VGL
VGH
VGS
VVDH
VVDH
-4.0
55
V
VINH=high
VINH=high;
with RVDH >70Ω;
200ms, 5x
4.1.14
Voltage range at VDH
4.1.15
Voltage range at VDH
VVDH
VVDH
-0.3
28
V
-4.0
28
V
VINH=low
VINH=low;
with RVDH >70Ω;
200ms, 5x
4.1.16
Voltage range at CL1
4.1.17
Voltage range at CH1, CB1
4.1.18
Voltage difference CH1-CL1
4.1.19
Voltage range at CL2
4.1.20
Voltage range at CH2, CB2
4.1.21
Voltage difference CH2-CL2
4.1.22
Voltage range at ISPx, ISNx
4.1.23
Output current range at VOx
4.1.24
Gate resistor
VCL1
VCH1,VCB1
VDC1
VCL2
VCH2,VCB2
VCP2
VISI
IVOx
RGate
-0.3
25
V
–
-0.3
25
V
–
-0.3
25
V
–
-0.3
25
V
–
-0.3
55
V
–
-0.3
25
V
–
-5
5
V
–
-10
10
mA
–
2
–
Ω
–
Tj
Tstg
-40
150
°C
–
-55
150
°C
–
Temperatures
4.1.25
Junction temperature
4.1.26
Storage temperature
Thermal Resistance
Data Sheet
8
V2.1, 2007-06-20
TLE7188F
General Product Characteristics
Absolute Maximum Ratings (cont’d)1)
-40 °C ≤ Tj ≤ 150 °C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified)
Pos.
4.1.27
Parameter
Symbol
Junction to case
Limit Values
Unit
Conditions
Min.
Max.
RthJC
–
5
K/W
–
Ptot
–
2
W
–
VESD
VESD
VESD
–
2
kV
Gxx excluded
–
1
kV
–
750
V
Power Dissipation
4.1.28
Power Dissipation (DC) @
TCASE=125°C
ESD Susceptibility
4.1.29
ESD Resistivity2)
4.1.30
4.1.31
3)
ESD Resistivity (charge device model)
1) Not subject to production test, specified by design.
2) ESD susceptibility HBM according to EIA/JESD 22-A 114B
3) ESD susceptibility CDM according to EIA/JESD 22-C 101
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
4.2
Pos.
4.2.1
Functional Range
Parameter
Symbol
1) 2)
Supply voltage
4.2.2
Duty cycle3)
4.2.3
PWM frequency
4.2.4
Quiescent current4)
4.2.5
Quiescent current into VDH
Limit Values
Unit
Conditions
Min.
Max.
VS
5.5
5.5
20
28
V
D
fPWM
0
100
%
–
0
25
kHz
Total gate charge
400nC
IQ
IQ_VDH
–
30
µA
–
30
µA
VS,VDH<20 V
VDH<20V;
DC
TA=25°C; t<1min
VS pin open
4.2.6
Supply current at Vs
IVs
mA
–
–
–
–
110
110
90
90
fPWM=20kHz
QG=170nC:
VS = 5.5V
VS = 14V
VS = 18V
VS = 20V
4.2.7
Supply current at Vs (device
disabled by ENA)
IVs(o)
–
–
60
50
mA
Vs=5.5V ... 18V
Vs=18V ... 20V
4.2.8
Supply current at VS_OA
–
30
mA
VS_OA=5.5 ... 6.5V
4.2.9
Voltage difference CB2-VDH
-0.3
20
V
Operation mode
4.2.10
Junction temperature
IVs_OA
VCB2-VDH
Tj
-40
150
°C
1) max ratings for Tj has to be considered as well
Data Sheet
9
V2.1, 2007-06-20
TLE7188F
General Product Characteristics
2) For proper start up minimum Vs=6.5V is required
3) Duty cycle is referred to the high side input command (IHx); The duty cycles can be driven continuously and fully operational
4) total current consumption from power net (Vs and VDH)
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
Note: If the voltage difference between CB2 and SHx is smaller than 2V during normal operation, there is a risk
that the high side output can switch on and off without a corresponding input signal. As soon as this supply
voltage recovers and the input signal changes, the output stage is automatically aligned to the input again.
4.3
Default State of Inputs
Table 1
Default State of Inputs
Characteristic
State
Remark
Default state of ILx (if ILx left open)
Low
Low side MOSFETs off
Default state of IHx (if IHx left open)
High
High side MOSFETs off
Default state of ENA (if ENA left open)
Low
Device/outputs disabled
Default state of INH (if INH left open)
Low
Sleep mode, IQ < 30 µA
Default State of sense amplifier output VOX Zero ampere equivalent
(ISPx=ISNx=0V)
–
Status of the device and the outputs when Device active and outputs functional
ENA=INH='1'
Vs=5.5 ... 28V
Pull up or pull down integrated resistors
Ixx, ENA
30kΩ +/-40%
–
Pull down integrated resistor INH
45kΩ +/-40%
–
Note: The load condition “C=22nF; RLoad=1Ω” in the paragraph “Electrical characteristics / Dynamic characteristic” means that
RLoad is connected between the output Gxx and the positive terminal of the C. The negative terminal of the C is connected
to GND and the corresponding Sxx. The voltage is measured at the positive terminal of the C
Data Sheet
10
V2.1, 2007-06-20
TLE7188F
Description and Electrical Characteristics
5
Description and Electrical Characteristics
5.1
MOSFET Driver
5.1.1
Output Stages
The 3 low side and 3 high side powerful push-pull output stages of the TLE7188F are all floating blocks, each with
its own source pin. This allows the direct connection of the output stage to the source of each single MOSFET,
allowing a perfect control of each gate-source voltage even when 200A are driven in the bridge with rise and fall
times clearly below 1µs.
All 6 output stages have the same output power and thanks to the used charge pump principle they can be
switched all up to 25kHz.
Its output stages are powerful enough to drive 6 MOSFETs with 400nC gate charge each or even to run 12
MOSFETs with 200nC each.
Maximum allowed power dissipation, max. junction temperature and the capabilities of the charge pump limit the
use for higher frequencies.
Each output stage has its own short circuit detection block. For more details about short circuit detection see
Chapter 5.2.1.
VS
INH
CL1 CH1
CB1 CL2 CH2
Charge pump 1
To Vs
VDH
CB2
CB2
Charge pump 2
SCD
UVLO
ERR1
+5V
ERR2
ENA
Error logic
Reset
Power On Reset
Under voltage
Over voltage
Over temperature
Short circuit+disable
Over current
R1
Under voltage lock out
+
GHx
VSCP
SCD
Level
shifter
Floating HS driver 3x
SCD
SCD
SCDL
SHx
CB1
SCD
lock / unlock
R2
short circuit filter
IH1
IL1
IH2
IL2
IH3
IL3
+
Input logic
ON / OFF
dead time
GLx
-
shoot through
protection
VSCP
Level
shifter
ON / OFF
Floating LS driver 3x
SLx
Shuntx
GND
P-GND
Figure 3
Data Sheet
Block Diagram of Driver Stages including Short Circuit Detection
11
V2.1, 2007-06-20
TLE7188F
Description and Electrical Characteristics
5.1.2
Operation at Vs<12V - Integrated Charge Pumps
The TLE7188F provides a feature tailored to the requirements in 12V automotive applications. Often the operation
of an application has to be assured even at 9V supply voltage or lower. Normally bridge driver ICs provide in such
conditions clearly less than 9V to the gate of the external MOSFETs, increasing their RDSon and the associated
power dissipation.
The TLE7188F has two charge pump circuitries for external capacitors.
The operation of the charge pumps is independent upon the pulse pattern of the MOSFETs.
The output of the charge pumps are regulated. The first charge pump doubles the supply voltage as long as it is
below 8V. At 8V supply voltage and above, charge pump 1 regulates its output to 15V typically. Above 15V supply
voltage, the output voltage of charge pump 1 will increase linearly.Yet, the output will not exceed 25V.
Charge pump 2 is regulated as well but it is pumped to the voltage on Vs. Normally VDH and Vs are in the same
voltage range. The driver is not designed to have significant higher voltages at VDH compared to Vs. This would
lead to reduced supply voltages for the high side output stages.
Charge pump 1 supplies the low side MOSFETS and output stages for the low side MOSFETs with sufficient
voltage to assure 10V at the MOSFETs´ gate even if the supply voltage is below 10V. Charge pump 2 supplies
the output stages for the high side MOSFETs with sufficient voltage to assure 10V at the MOSFETs´ gate. In
addition, the charge pump 1 supplies most of the internal circuits of the driver IC, including charge pump 2. Output
of charge pump 1 is the buffer capacitor CB1 which is referenced to GND.
Charge pump 2 supplies the high side MOSFETs and the output stages for the high side MOSFETs with sufficient
voltage to assure 10V at the high side MOSFET gate. Output of charge pump 2 is buffer capacitor CB2 which is
referenced to VDH.
This concept allows to drive all external MOSFETs in the complete duty cycle range of 0 to 100% without taking
care about recharging of any bootstrap capacitors.
This simplifies the use in all applications especially in motor drives with block wise commutation.
The charge pumps are only deactivated when the device is put into sleep mode via INH.
During Start Up of the TLE7188F the external MOSFETs should be kept off until the charge pumps have ramped
up to their final values. Hence, following procedure is recommended for Start Up:
- keep ENA = low (output stages disabled, all MOSFETs off, signals on IHx and ILx don´t care) or
ENA = high (output stages enabled) and IHx = high and ILx = low (all MOSFETs off)
- apply the supply voltage to the TLE7188F and pull INH = high (the order does not matter)
- wait until the charge pump capacitors are fully charged (pls. see “Wake up time”)
- the TLE7188F is now ready for normal operation (pull ENA = high and apply the PWM patterns to IHx and ILx)
The size of the charge pump capacitors (pump capacitors CPx as well as buffer capacitors CBx) can be varied
between 1 µF and 4.7 µF. Yet, larger capacitor values result in higher charge pump voltages and less voltage
ripple on the charge pump buffer capacitors CBx (which supply the internal circuits as well as the external
MOSFETs, pls. see above). Besides the capacitance values the ESR of the buffer capacitors CBx determines the
voltage ripple as well. It is recommended to use buffer capacitors CBx that have small ESR.
Pls. see also Chapter 5.1.3 for capacitor selection.
5.1.3
Sleep Mode
When the INH pin is set to low, the driver will be set to sleep mode. The INH pin switches off the complete supply
structure of the device and leads finally to an intervillage shut down of the complete driver. Enabling the device
with the INH pin means to switch on the supply structure. The device will run through power on reset during wake
up. It is recommended to perform a Reset by ENA after Wake up to remove possible ERR signals; Reset is
performed by keeping ENA pin low until the charge pump voltages have ramped up.
Enabling and disabling with the INH pin is not very fast. For fast enable / disable the ENA pin is recommended.
Data Sheet
12
V2.1, 2007-06-20
TLE7188F
Description and Electrical Characteristics
When the TLE7188F is in INH mode (INH is low) or when the supply voltage is not available on the Vs pin, then
the driver IC is not supplied, the charge pumps are inactive and the charge pump capacitors are discharged. Pin
CB2 (+ terminal of buffer capacitor 2) will decay to GND. When the battery voltage is still applied to VDH (- terminal
of buffer capacitor 2) the buffer capacitor 2 will slowly charged to battery voltage, yet with reversed polarity
compared to the polarity during regular operation. Hence, it is important to use a buffer capacitor 2 (CB2) that can
withstand both, +25 V during operation mode and -VBAT during INH mode, e.g. a ceramic capacitor. In case of load
dump during INH mode, the negative voltage across CB2 will be clamped to -31 V (CB2 referenced to VDH).
5.1.4
Electrical Characteristics
Electrical Characteristics MOSFET drivers - DC Characteristics
VS = 5.5 to 20V, Tj = -40 to +150°C, fPWM < 25kHz, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
–
–
0.2
V
I=30mA
5.1.2
VG_LL
High level output voltage, Low Side VG_HL
7.5
–
13
V
Vs=5.5..8V;
I=-2mA
5.1.3
High level output voltage, High Side VG_HL
6.5
–
13
V
Vs=5.5..8V;
I=-2mA
5.1.4
High level output voltage
VG_HL
9
–
13
V
Vs=8..20V;
I=-2mA
5.1.5
High level output voltage difference dVG_H
–
–
1.0
V
I=-100mA; Vs=20V
5.1.6
Gate drive output voltage
VGS1_D
–
–
0.2
V
Disabled;
5.5V<Vs<28V;
I=10mA
5.1.7
Gate drive output voltage
Tj=-40°C
Tj=25°C
Tj=150°C
VGS2_5
V
UVLO; Vs<=5.5V
–
–
–
–
–
–
1.4
1.2
1.0
V
Over voltage
–
–
–
–
–
–
–
1.4
1.2
1.0
–
–
0.2
V
Over voltage
–
–
1.0
V
–
2.0
–
–
V
–
–
–
0.75
V
–
2.1
–
–
V
–
50
–
–-
mV
Vs=5.5..8V
100
200
–-
mV
Vs=8..20V
-1.6
-1.0
-0.3
mA
Vs=5.5..20V;
VSHx=0..(Vs+1);
VILx=low; VIHx=high
-1.6
-1.0
-0.3
mA
Vs=5.5..20V;
VSLx=0..7V;
VILx=low; VIHx=high
5.1.1
5.1.8
Low level output voltage
Gate drive output voltage high side VGS3_5
Tj=-40°C
Tj=25°C
Tj=150°C
5.1.16
VGS_5
Low level input voltage of Ixx, ENA VI_LL
High level input voltage of Ixx, ENA VI_HL
Low level input voltage of INH
VI_LL
High level input voltage of INH
VI_HL
Input hysteresis of IHx, ILx, ENA
dVI
Input hysteresis of IHx, ILx, ENA
dVI
ISHx
Output bias current SHx
5.1.17
Output bias current SLx
5.1.9
5.1.10
5.1.11
5.1.12
5.1.13
5.1.14
5.1.15
Gate drive output voltage low side
Data Sheet
ISLx
13
V2.1, 2007-06-20
TLE7188F
Description and Electrical Characteristics
Electrical Characteristics MOSFET drivers - Dynamic Characteristics
VS = 5.5 to 20V, Tj = -40 to +150°C, FPWM < 25kHz, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
50
–
200
ns
–
–
-0.8
–
A
VGxx-VSxx=0V;
Vs=5.5..8V;
C=22nF;
RLoad=1Ω
5.1.18
Fixed internal dead time
5.1.19
Turn on current, peak
tDT
IG(on)
5.1.20
Turn on current, peak
IG(on)
–
-1.5
–
A
VGxx-VSxx=0V;
Vs=8..20V;
C=22nF;
RLoad=1Ω
5.1.21
Turn off current, peak
IG(off)
–
1.5
–
A
VGxx-VSxx=10V;
Vs=8..20V;
C=22nF;
RLoad=1Ω
5.1.22
Rise time (20-80%)
Tj = -40°C
Tj = 25°C
Tj = 150°C
tG_rise
–
ns
C=22nF; RLoad=1Ω
150
400
400
700
Fall time (20-80%)
Tj = -40°C
Tj = 25°C
Tj = 150°C
tG_fall
ns
C=22nF; RLoad=1Ω;
150
230
230
500
5.1.24
Input propagation time (low on)
90
190
290
ns
C=22nF; RLoad=1Ω
5.1.25
Input propagation time (low off)
0
100
200
ns
C=22nF; RLoad=1Ω
5.1.26
Input propagation time (high on)
90
190
290
ns
C=22nF; RLoad=1Ω
5.1.27
Input propagation time (high off)
0
100
200
ns
C=22nF; RLoad=1Ω
5.1.28
Absolute input propagation time
difference (all channels turn on)
tP(ILN)
tP(ILF)
tP(IHN)
tP(IHF)
tP(an)
–
–
70
ns
C=22nF; RLoad=1Ω
5.1.29
Absolute input propagation time
difference (all channels turn off)
tP(af)
–
–
50
ns
C=22nF; RLoad=1Ω
5.1.30
Absolute input propagation time
difference (1channel high off - low
on)
tP(1hfln)
–
–
180
ns
C=22nF; RLoad=1Ω
5.1.31
Absolute input propagation time
difference (1channel low off - high
on)
tP(1lfhn)
–
–
180
ns
C=22nF; RLoad=1Ω
5.1.32
tP(ahfln)
Absolute input propagation time
difference (all channel high off - low
on)
–
–
180
ns
C=22nF; RLoad=1Ω
5.1.33
tP(alfhn)
Absolute input propagation time
difference (all channel low off - high
on)
–
–
180
ns
C=22nF; RLoad=1Ω
5.1.23
Data Sheet
–
14
V2.1, 2007-06-20
TLE7188F
Description and Electrical Characteristics
Electrical Characteristics MOSFET drivers - Dynamic Characteristics
VS = 5.5 to 20V, Tj = -40 to +150°C, FPWM < 25kHz, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Unit
Conditions
Min.
Typ.
Max.
5.1.34
Wake up time; INH low to high
tINH_Pen
–
–
20
ms
Driver fully
functional;
Vs=6.5..8V;
VENAx=low;
CPx=CBx=4,7µF
5.1.35
Wake up time; INH low to high
tINH_Pen
–
–
10
ms
Driver fully
functional;
Vs=8..20V;
VENAx=low;
CPx=CBx=4,7µF
5.1.36
Wake up time logic functions; INH
low to high
tINH_log
–
–
10
ms
Driver fully
functional;
Vs=6.5..8V;
VENAx=low;
CPx=CBx=4,7µF
5.1.37
Wake up time logic functions; INH
low to high
tINH_log
–
–
5
ms
Driver fully
functional;
Vs=8..20V;
VENAx=low;
CPx=CBx=4,7µF
5.1.38
INH propagation time to disable the tINH_Pdi
output stages
–
–
10
µs
Vs=5.5..8V
5.1.39
INH propagation time to disable the tINH_Pdi
output stages
–
–
8
µs
Vs=8..20V
5.1.40
INH propagation time to disable the tINH_Pdi
entire driver IC
–
–
300
µs
–
5.1.41
Supply voltage Vs for Wake up
VVsWU
6.5
–
–
V
diagnostic, OpAmp
working
5.1.42
Charge pump frequency
fCP
38
55
72
kHz
–
Data Sheet
Limit Values
15
V2.1, 2007-06-20
TLE7188F
Protection and Diagnostic Functions
5.2
Protection and Diagnostic Functions
5.2.1
Short Circuit Protection
The TLE7188F provides a short circuit protection for the external MOSFETs. It is a monitoring of the drain-source
voltage of the external MOSFETs. As soon as this voltage is higher than the short circuit detection limit, a capacitor
will be charged. The high side and the low side output stage of the same half bridge use the same capacitor (see
Figure 3 ). This capacitor is discharged permanently with a current which is smaller than the charging current. This
charge and discharge ratio is specified by means of duty cycles at which a short circuit is detected or not detected.
After a delay of about 12 µs all external MOSFETs will be switched off until the driver is reset by the ENA pin. The
error flag is set.
The drain-source voltage monitoring of the short circuit detection for a certain external MOSFET is active as soon
as the corresponding input is set to "on" and the dead time is expired.
The short circuit detection level is adjustable in an analogue manner by the voltage setting at the SCDL pin. There
is a 1:1 translation between the voltage applied to the SCDL pin and the drain-source voltage limit. For instance
to trigger the SCD circuit at 1 V drain-source voltage, the SCDL pin must be set to 1 V as well. The drain-source
voltage limit can be chosen between 0.5 ... 2.5 V.
A setting of 5 V at the SCDL pin will disable the short circuit protection function. Disabling the short circuit
protection function has no impact on the overcurrent warning (see next chapter).
5.2.2
Over current Warning
The TLE7188F offers the possibility to shut down the output stages if a current threshold is reached (see Figure 4 ).
The output of the current sense OpAmp is connected to an integrated comparator, comparing the amplified current
sense signal with an external adjustable threshold value. After the comparator a blanking time (1.5 µs typ.) is
implemented to avoid false triggering caused by overswing of the current sense signal.
If the overcurrent situation is detected, only an error signal is given. During overcurrent the driver IC works
normally. The error signal disappears as soon as the current decreases below the overcurrent limit set on the
VTHOC pin. The error signal disappears as well when the current commutates from the low side MOSFET to the
associated high side MOSFET (no current through the shunt resistor).
It is the decision of the user to react on the over current signal by modifying the Ixx patterns to lower the current.
The overcurrent warning can be disabled by connecting the overcurrent threshold pin to GND (VTHOC = 0 V).
5.2.3
Dead Time and Shoot Through Protection
In bridge applications it has to be assured that the external high side and low side MOSFETs are not "on" at the
same time, connecting directly the battery voltage to GND. The dead time generated in the TLE7188F is fixed to
a minimum value. This function assures a minimum dead time if the input signals coming from the µC are faulty.
The exact dead time of the bridge is usually controlled by the PWM generation unit of the µC.
In addition to this dead time, the TLE7188F provides a locking mechanism, avoiding that both external MOSFETs
of one half bridge can be switched on at the same time. This functionality is called shoot through protection.
If the command to switch on both high and low side switches in the same half bridge is given at the input pins, the
command will be ignored.
5.2.4
Under voltage Shut Down
The TLE7188F has an integrated under voltage shut down, to assure that the behavior of the device is predictable
in all voltage ranges.
Data Sheet
16
V2.1, 2007-06-20
TLE7188F
Protection and Diagnostic Functions
If the voltage of a charge pump buffer capacitors CBx reaches the under voltage shut down level for a minimum
specified filter time, the gate-source voltage of all external MOSFETs will be actively pulled to low. In this situation
the short circuit detection of this output stage is deactivated to avoid a latching shut down of the driver.
As soon as the charge pump buffer voltage recovers, the output stage condition will be aligned to the input patterns
automatically.This allows to continue operation of the motor in case of under voltage shut down without a reset by
the µC.
Under voltage shut down will not occur when VS > 6 V, QG < 250 nC, fPWM < 25 kHz, and the charge pump
capacitors Cxx = 4.7 µF.
5.2.5
Over voltage Shut Down
The TLE7188F has an integrated over voltage shut down to avoid destruction of the IC at high supply voltages.The
voltage is measured at the Vs and the VDH pin. When one of them or all of them exceed the over voltage shut
down level for more than the specified filter time then the external MOSFETs are switched off. In addition, over
voltage will shut down the charge pumps and will discharge the charge pump capacitors. This results in an under
voltage condition which will be indicated on the ERRx pins. During over voltage shut down the external MOSFETs
and the charge pumps remain off until a reset is performed.
5.2.6
Over temperature Warning
If the junction temperature is exceeding typ. 170°C an error signal is given as warning. The driver IC will continue
to operate in order not to disturb the application.
The warning is removed automatically when the junction temperature is cooling down.
It is in the responsibility of the user to protect the device against over temperature destruction.
5.2.7
VCC1 Check
To assure a high level of system safety, the TLE7188F provides an VCC1 check.
The 5.0V supply for the I/O of the µC is checked by internally monitoring the voltage applied to the ENA pin.
The VCC1 check is active when the signal on the ENA pin is high and is triggered by the ENA signal going high.
The VCC1 check is inactive when no ENA signal is applied or the ENA signal is low (= driver IC disabled). As the
ENA pin is a digital input, a low pass filter (< 1 MHz) is integrated to avoid faulty triggering. The filtered ENA signal
is then supervised in terms of under voltage and over voltage as a measure of the VCC1 voltage.
In case of under- or over voltage at VCC1, the driver IC is disabled and latched. To restart the output stages, a
reset has to be performed with the ENA pin.
5.2.8
ERR Pins
The TLE7188F has two status pins to provide diagnostic feedback to the µC. The outputs of these pins are 5V
push pull stages, they are either High or Low.
Table 2
Overview of error conditions
ERR1
ERR2
Driver conditions
Low
Low
Under voltage or VCC1 check error
Low
High
Over temperature or over voltage
High
Low
Short circuit detection or over current
High
High
No errors
Data Sheet
17
V2.1, 2007-06-20
TLE7188F
Protection and Diagnostic Functions
Table 3
Behaviour at different error conditions
Error condition
restart behavior
Shuts down...
Short circuit detection
Latch, reset must be performed at ENA pin All external Power -MOSFETs
Over current warning
Self clearing
Nothing
Under voltage
Auto restart
All external Power -MOSFETs
Over voltage
Latch, reset must be performed at ENA pin All external Power -MOSFETs
Over temperature warning Self clearing
VCC1 check
Nothing
Latch, reset must be performed at ENA pin All external Power -MOSFETs
Note: All errors do NOT lead to sleep mode. Sleep mode is only initiated with the INH pin. The latch and restart
behaviour allows to distinguish between the different error types combined at the ERR signals.
Table 4
Prioritization of Errors
Priority
Error
1
VCC1 check
2
Short circuit detection
3
Under voltage detection
4
Over voltage detection
5
Over temperature
Over current
Reset of ERROR registers and Disable
The TLE7188F can be reset with the help of the enable pin ENA. If the ENA pin is pulled to low for a specified
minimum time, the error registers are cleared and the external MOSFETs are switched off actively.
During disable only the errors under voltage shut down and over temperature warning are shown. Other errors are
not displayed.
5.2.9
Electrical Characteristics
Electrical Characteristics - Protection and diagnostic functions
VS = 5.5 to 20V, Tj = -40 to +150°C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
Over temperature
5.2.1
Over temperature warning1)
Tj(OW)
150
170
190
°C
5.2.2
Hysteresis for over temperature
warning1)
dTj(OW)
–
20
–
°C
Over current warning
5.2.3
Over current threshold
VTHOC
2
–
4.5
V
Vs=5.5..8V
5.2.4
Over current threshold
VTHOC
2
–
4.8
V
Vs=8..20V
5.2.5
Over current disabled
VTHOC
–
–
1
V
–
Data Sheet
18
V2.1, 2007-06-20
TLE7188F
Protection and Diagnostic Functions
Electrical Characteristics - Protection and diagnostic functions (cont’d)
VS = 5.5 to 20V, Tj = -40 to +150°C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
50
mV
–
–
5
mV
–
Min.
Typ.
Max.
VIO
VIO
-50
–
-50
5.2.6
Input offset voltage of OC Comp
5.2.7
Input offset voltage temperature
drift of OC Comp1)
5.2.8
Over current threshold hysteresis
dVTHOC
25
–
–
mV
Vs=5.5..8V
5.2.9
Over current threshold hysteresis
dVTHOC
50
80
–
mV
Vs=8..20V
5.2.10
Blanking time of overcurrent
tbtOC
1.0
1.5
3.0
µs
–
Short circuit detection
5.2.11
Filter time of short circuit protection tSCP(off)
–
6.8
–
µs
On request
5.2.12
Filter time of short circuit protection tSCP(off)
8
12
16
µs
Default
DySCDmax
–
–
6
%
fPWM=20kHz at IHx
or ILx and at static
applied SC
2)
5.2.13
Maximum duty cycle for no SCD
5.2.14
Minimum duty cycle for periodic
SCD2)
DySCDmin
13
–
–
%
fPWM=20kHz at IHx
or ILx and at static
applied SC
5.2.15
Voltage range on VSCD pin to
adjust the Vds limit
VSCDL(off)
0.5
–
2.5
V
Short circuit
detection is active
5.2.16
Short circuit disable voltage at
VSCD pin
VSCDL(dis) 4.5
–
5.5
V
Short circuit
detection is
disabled
5.2.17
Accuracy of SCD
(VSCDL /VDS(off))
ASC(off)
–
1.15
–
Accuracy of SCD
(VSCDL /VDS(off))
ASC(off)
5.2.18
0.85
VSCDL(off) set to 1..
2.5V
0.7
–
1.3
–
VSCDL(off) set to 0.5..
1V
ERR pins
5.2.19
High level output voltage of ERRx
5.2.20
Low level output voltage of ERRx
VOHERR
VOLERR
4.0
–
5.2
V
I= -0.2mA
-0.1
–
0.4
V
I= 0.2mA
VOV(off)
tOV
VUV1
VUV2
VHUV1,2
28
–
33
V
–
30
–
65
µs
–
7.4
8.2
9.0
V
CB1 to GND
4.2
–
6.2
V
CB2 to VDH
–
1.0
–
V
–
tRes1
2.0
–
–
µs
–
Over- and under voltage
5.2.21
Over voltage shut down
5.2.22
Over voltage filter time
5.2.23
Under voltage shut down CB1
5.2.24
Under voltage shut down CB2
5.2.25
Hysteresis of under voltage shut
down on CB1 and CB2
Enable and reset
5.2.26
Reset time to clear ERR registers
Data Sheet
19
V2.1, 2007-06-20
TLE7188F
Protection and Diagnostic Functions
Electrical Characteristics - Protection and diagnostic functions (cont’d)
VS = 5.5 to 20V, Tj = -40 to +150°C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
tRes0
Limit Values
Unit
Conditions
0.5
µs
–
Min.
Typ.
Max.
–
–
5.2.27
Low time of ENA signal without
reset
5.2.28
ENA propagation time (for enable / tPENA
disable)
–
–
1.0
µs
–
5.2.29
Return time to normal operation at tAR
auto-restart
–
–
1.0
µs
–
4.0
–
4.5
V
–
5.5
–
6.0
V
–
–
–
0.1
µs
Voltage drop at
ENA to 3.5V
VCC1 Check
5.2.30
Under voltage detection level
5.2.31
Over voltage detection level
5.2.32
Under voltage filter time
VVCU
VVCO
tVC
5.2.33
Over voltage filter time
tVC
–
–
0.15
µs
Voltage overshoot
at ENA to 6V
5.2.34
Rise time on ENA (to avoid Vcc1
check error)
tENA_r
–
–
2
µs
VENA=1..4.5V
1) Not subject to production test; specified by design
2) Parameters describe the behaviour of the internal SCD circuit. Therefore only internal delay times are considered. In
application dead-/ delay times determined by application circuit (switching times of MOSFETs, adjusted dead time) have
to be considered as well.
Data Sheet
20
V2.1, 2007-06-20
TLE7188F
Shunt Signal Conditioning
5.3
Shunt Signal Conditioning
The TLE7188F incorporates three fast and precise operational amplifiers for conditioning and amplification of the
shunt signals sensed in the three phases. Additionally, one reference bias buffer is integrated to provide an
adjustable bias reference for the three OpAmps. The voltage divider on the VRI pin should be less than 50 kOhm,
the filtering capacitor less than 1.2 µF - if needed at all. The gain of the OpAmps is adjustable by external resistors
within a range of 5 to 15.
When V(ISP) = V(ISN), VO provides the reference voltage VRO. VRO is normally half of the regulated voltage
provided from an external voltage regulator for the ADC used to read the current sense signal. The additional
buffer allows bi-directional current sensing and permits the adaptation of the reference bias to different µC I/O
voltages. The reference buffer assures a stable reference voltage even in the high frequency range.
The reference bias buffer is used for all of the OpAmps. The OpAmps of the TLE7188F demonstrate low offset
voltages and very little drift over temperature, thus allowing accurate phase current measurements.
5V
Adjustable
bias
reference
RVRI
VRI
TLE7188F
VRO
Reference
-
Rfb
to Error
logic
Rfb
Rfb
ISP1
-
OC
Comp
I-DC Link
OpAmp1
Rs
Shunt 1
Rs
+
-
blanking
time
1.5µs
+
Over
current
CVRI
RVRI
+ Bias
ISN1
VIN1
Rfb
Rs
I-DC Link
OpAmp2
-
OC
Comp
Shunt 2
Rs
-
+
blanking
time
1.5µs
+
Over
current
ISP2
ISN2
Rs
I-DC Link
OpAmp3
-
OC
Comp
-
+
blanking
time
1.5µs
+
Over
current
ISP3
Rs
Shunt 3
ISN3
5V
VTHOC
VO3 VO2
RVRI < 50 kOhm
CVRI < 1.2 µF (if needed)
to ADCs
Figure 4
VO1
Adjustable over current limit
(VTHOC = 0
OC disabled)
Shunt Signal Conditioning Block Diagram and Over Current Limitation
Over current warning see Chapter 5.2.2.
Data Sheet
21
V2.1, 2007-06-20
TLE7188F
Shunt Signal Conditioning
5.3.1
Electrical Characteristics
Electrical Characteristics - Current sense signal conditioning
VS = 5.5 to 20V, Tj = -40 to +150°C, FPWM < 25kHz, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
RS
Rfb
100
500
1000
Ω
–
2000
7500
–
Ω
–
Rfb/RS
VIN(ss)
5
–
15
–
–
-400
–
400
mV
–
5.3.1
Series resistors
5.3.2
Feedback resistor
Limited by the output voltage
dynamic range
5.3.3
Resistor ratio (gain ratio)
5.3.4
Steady state differential input
voltage range across VIN1)
5.3.5
Input differential voltage (ISPx ISNx)
VIDR
-800
–
800
mV
–
5.3.6
Input voltage (Both Inputs - GND)
(ISP - GND) or (ISN -GND)
VLL
-800
–
2000
mV
–
5.3.7
Input voltage (Both Inputs - GND)
(ISP - GND) or (ISN -GND)
VLL
-800
–
1500
mV
Vs=5.5V
5.3.8
Absolute input offset voltage of the VIO
I-DC link OpAmp, including drift
over temperature range
–
–
2
mV
RS=500Ω; VCM=0V;
VO=1.65V;
VRI=1.65V
5.3.9
Input offset voltage difference of
the I-DC link OpAmps, including
drift over temperature range
VIO
–
–
+/-1
mV
RS=500Ω; VCM=0V;
VO=1.65V;
VRI=1.65V
5.3.10
Absolute input offset voltage of
reference buffer
VIO
–
–
3
mV
–
5.3.11
VRI input range
1.2
–
2.8
V
–
5.3.12
Input bias current
-300
–
–
µA
VCM=0V; VO=open
5.3.13
High level output voltage of VOx
VRI
IIB
VOH
4.8
–
5.2
V
IOH=-2mA;
Vs=6V
5.3.14
Low level output voltage of VOx
-0.1
–
0.2
V
IOH=3mA
5.3.15
Output voltage of VOx
VRI= 2.5V,
VRI=1.65V,
VOL
VOR
V
2.467
1.617
2.50
1.65
2.533
1.683
VIN(SS)=0V;
Gain=15;
Tj=25°C
5
–
–
mA
–
100
–
–
kΩ
–
–
–
10
pF
10kHz
80
–
–
db
–
5.3.16
5.3.17
Output short circuit current
Differential input resistance
2)
2)
5.3.18
Common mode input capacitance
5.3.19
Common mode rejection ratio at
DC
CMRR =
20*Log((Vout_diff/Vin_diff) *
(Vin_CM/Vout_CM))
Data Sheet
ISC
RI
ISC
CMRR
22
V2.1, 2007-06-20
TLE7188F
Shunt Signal Conditioning
Electrical Characteristics - Current sense signal conditioning (cont’d)
VS = 5.5 to 20V, Tj = -40 to +150°C, FPWM < 25kHz, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
5.3.20
Common mode suppression3) with CMS
CMS = 20*Log(Vout_CM/Vin_CM)
Freq =100kHz
Freq = 1MHz
Freq = 10MHz
ISC
5.3.21
Slew rate
5.3.22
Large signal open loop voltage gain AOL
(DC)
Typ.
Unit
Conditions
db
VIN=360mV*
sin(2*π*freq*t);
Rs=500Ω;
Rfb=7500Ω;
VRI=1.65, 2.5V
Max.
–
–
–
62
43
33
–
–
–
–
10
–
V/µs
Gain>= 5;
RL=1.0kΩ;
CL=500pF
80
100
–
dB
–
GBW
FM
10
20
–
MHz
RL=1kΩ; CL=100pF
–
50
–
°
Gain>= 5;
RL=1kΩ; CL=100pF
AM
BWG
–
12
–
db
RL=1kΩ; CL=100pF
Bandwidth
1.6
–
–
MHz
Gain=15;
RL=1kΩ;
CL=500pF;
Rs=500Ω
5.3.27
Output settle time to 98% 1)
tset
–
1
1.8
µs
Gain=15;
RL=1kΩ;
CL=500pF;
0.3<VO< 4.8V;
Vs>6V,
Rs=500Ω
5.3.28
Output rise time 10% to 90% 1)
tIrise
–
–
1
µs
Gain=15;
RL=1kΩ;CL=500pF;
0.3<VO< 4.8V,
Vs>6V
Rs=500Ω
5.3.29
Output fall time 90% to 10%1)
tIfall
–
–
1
µs
Gain=15;
RL=1kΩ;CL=500pF;
0.3<VO< 4.8V;
Vs>6V;
Rs=500Ω;
5.3.23
Unity gain bandwidth
5.3.24
Phase margin2)
5.3.25
Gain margin2)
5.3.26
1) Input current and output amplifier characteristics:
"Output signal must be amplified and available at 2µs after input signal change (Gain 5...15)
2) Not subject to production test; specified by design
3) Without considering any offsets such as input offset voltage, internal miss match and assuming no tolerance error in
external resistors.
Data Sheet
23
V2.1, 2007-06-20
TLE7188F
Application Description
6
Application Description
In the automotive sector there are more and more applications requiring high performance motor drives, such as
electro-hydraulic or electric power steering. In these applications 3 phase motors, synchronous and
asynchronous, are used, combining high output performance, low space requirements and high reliability.
Figure 5
Application Circuit - TLE7188F
Note: This is a very simplified example of an application circuit. The function must be verified in the real application.
Data Sheet
24
V2.1, 2007-06-20
TLE7188F
Application Description
6.1
Layout Guide Lines
Please refer also to the simplified application example.
•
•
•
•
•
•
•
•
•
Three separated bulk capacitors CB should be used - one per half bridge
Three separated ceramic capacitors CC should be used - one per half bridge
Each of the 3 bulk capacitors CB and each of the 3 ceramic capacitors CC should be assigned to one of the half
bridges and should be placed very close to it
The components within one half bridge should be placed close to each other: high side MOSFET, low side
MOSFET, bulk capacitor CB and ceramic capacitor CC (CB and CC are in parallel) and the shunt resistor form
a loop that should be as small and tight as possible. The traces should be short and wide
The three half bridges can be separated; yet, when there is one common GND referenced shunt resistor for
the three half bridges the sources of the three low side MOSFETs should be close to each other and close to
the common shunt resistor
VDH is the sense pin used for short circuit detection; VDH should be routed (via Rvdh) to the common point
of the drains of the high side MOSFETs to sense the voltage present on drain high side
CB2 is the buffer capacitor of charge pump 2; its negative terminal should be routed to the common point of
the drains of the high side MOSFETs as well - this connection should be low inductive / resistive
Additional R-C snubber circuits (R and C in series) can be placed to attenuate/suppress oscillations during
switching of the MOSFETs, there may be one or two snubber circuits per half bridge, R (several Ohm) and C
(several nF) must be low inductive in terms of routing and packaging (ceramic capacitors)
the exposed pad on the backside of the VQFN is recommended to connect to GND
6.2
•
Further Application Information
For further information you may contact http://www.infineon.com/
Data Sheet
25
V2.1, 2007-06-20
TLE7188F
Package Outlines
7
Package Outlines
11 x 0.65 = 7.15
0.9 MAX.
9 ±0. 1
A
8.75 ±0. 1
B
(0.65)
48x
0.08
0.65
0.55 ±0.05
25
36
Index Marking
C
37
6.8 ±0.15
0.65
11 x 0.65 = 7.15
12°MAX.
SEATING PLANE
9 ±0.1
8.75±0.1
24
13
48
1
12
0.35±0. 05
(0.2)
0.05 MAX.
ST ANDOFF
Index Marking
48x
0.1 M A B C
6.8 ±0.15
G VQ 01049
GPS09181
Figure 6
VQFN-48
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Data Sheet
26
Dimensions in mm
V2.1, 2007-06-20
TLE7188F
Revision History
8
Revision History
Version
Date
Changes
V2.1
2007-06-20
Description and Electrical Characteristics - MOSFET driver, Output Stages: Start
up described in more detail
Electrical characteristics - MOSFET drivers: Turn on current, peak, specified as
negative current (going out of the pin GHx and GLx)
Electrical characteristics - Current sense signal conditioning: Input bias current
specified as negative current (going out of the pin ISNx and ISPx)
Data Sheet
27
V2.1, 2007-06-20
Edition 2007-06-20
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2007 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.