INTEGRATED CIRCUITS 74ABT534A Octal D-type flip-flop, inverting (3-State) Product specification IC23 Data Handbook 1997 Feb 03 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) FEATURES 74ABT534A DESCRIPTION • 8-bit positive edge triggered register • 3-State output buffers • Output capability: +64mA/–32mA • Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17 • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 The 74ABT534A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT534A is an 8-bit, edge triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently by the clock (CP) and Output Enable (OE) control gates. and 200 V per Machine Model The register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s output. • Power-up 3-State The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active-Low Output Enable (OE) controls all eight 3-State buffers independent of the clock operation. When OE is Low, the stored data appears at the outputs. When OE is High, the outputs are in the High-impedance “OFF” state, which means they will neither drive nor load the bus. QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT tPLH tPHL Propagation delay CP to Qn CL = 50pF; VCC = 5V 3.3 3.6 ns CIN Input capacitance VI = 0V or VCC 3.5 pF COUT Output capacitance Outputs disabled; VO = 0V or VCC 6.5 pF ICCZ Total supply current Outputs disabled; VCC =5.5V 100 µA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 20-Pin Plastic DIP –40°C to +85°C 74ABT534A N 74ABT534A N SOT146-1 20-Pin plastic SO –40°C to +85°C 74ABT534A D 74ABT534A D SOT163-1 20-Pin Plastic SSOP Type II –40°C to +85°C 74ABT534A DB 74ABT534A DB SOT339-1 20-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT534A PW 74ABT534APW DH SOT360-1 PIN CONFIGURATION OE 1 PIN DESCRIPTION 20 VCC 2 19 Q7 D0 3 18 D7 D1 4 17 D6 Q1 5 16 Q6 Q2 6 15 Q5 D2 7 14 D5 D3 8 13 D4 9 12 Q4 Q0 Q3 GND 10 PIN NUMBER SYMBOL FUNCTION 1 OE 3, 4, 7, 8, 13, 14, 17, 18 Output enable input (active-Low) D0-D7 Data inputs 2, 5, 6, 9, 12, 15, 16, 19 Q0-Q7 Inverting 3-State outputs 11 CP 10 GND Ground (0V) 20 VCC Positive supply voltage Clock pulse input (active rising edge) 11 CP SA00161 1997 Feb 03 2 853-1910 17722 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) LOGIC SYMBOL 74ABT534A LOGIC SYMBOL (IEEE/IEC) 1 3 4 7 8 13 14 17 18 D0 D1 D2 D3 D4 D5 D6 D7 11 CP 1 OE 5 6 C1 3 2 1D 4 5 7 6 8 9 13 12 14 15 17 16 18 19 Q4 Q5 Q6 Q7 Q0 Q1 Q2 Q3 2 EN 11 12 9 15 16 19 SA00162 SA00163 FUNCTION TABLE INPUTS INTERNAL OUTPUTS OE CP Dn REGISTER Q0 – Q7 L L ↑ ↑ l h L H H L L ↑ X NC NC H H ↑ ↑ X Dn NC Dn Z Z H = High voltage level h = High voltage level one set-up time prior to the Low-to-High clock transition L = Low voltage level l = Low voltage level one set-up time prior to the Low-to-High clock transition NC= No change X = Don’t care Z = High impedance “off” state ↑ = Low-to-High clock transition ↑ = not a Low-to-High clock transition OPERATING MODE Latch and read register Hold Disable outputs LOGIC DIAGRAM D0 D1 D2 D3 3 4 7 8 D4 D5 13 D6 14 D7 17 18 D D D D D D D D CP Q CP Q CP Q CP Q CP Q CP Q CP Q CP Q 11 CP 1 OE 2 5 6 9 Q0 Q1 Q2 Q3 12 Q4 15 Q5 16 Q6 19 Q7 SA00164 1997 Feb 03 3 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A ABSOLUTE MAXIMUM RATINGS1, 2 SYMBOL VCC IIK PARAMETER CONDITIONS RATING UNIT –0.5 to +7.0 V –18 mA –1.2 to +7.0 V VO < 0 –50 mA output in Off or High state –0.5 to +5.5 V output in Low state 128 mA –65 to 150 °C DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current voltage3 VOUT DC output IOUT DC output current Tstg Storage temperature range NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC PARAMETER UNIT DC supply voltage Min Max 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level Input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current 64 mA 0 5 ns/V –40 +85 °C ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range 1997 Feb 03 2.0 4 V Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Min VIK VOH VOL Input clamp voltage High-level output voltage Tamb = –40°C to +85°C Tamb = +25°C VCC = 4.5V; IIK = –18mA Typ Max –0.9 –1.2 Min UNIT Max –1.2 V VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 2.9 2.5 V VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 3.4 3.0 V VCC = 4.5V; IOH = –32mA; VI = VIL or VIH 2.0 2.4 2.0 V Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.42 0.55 0.55 V Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA Power-off leakage current VCC = 0.0V; VI or VO ≤ 4.5V ±5.0 ±100 ±100 µA Power-up/down 3-State output current3 VCC = 2.0V; VO = 0.5V; VI = GND or VCC; VOE = VCC ±5.0 ±50 ±50 µA IOZH 3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or VIH 0.1 10 10 µA IOZL 3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH –0.1 –10 –10 µA ICEX Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC 0.1 50 50 µA –100 –180 –180 mA VCC = 5.5V; Outputs High, VI = GND or VCC 100 250 250 µA VCC = 5.5V; Outputs Low, VI = GND or VCC 24 30 30 mA VCC = 5.5V; Outputs 3-State; VI = GND or VCC 100 250 250 µA VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND 0.5 1.5 1.5 mA II IOFF IPU/IPD IO Output current1 ICCH ICCL Quiescent supply current ICCZ ∆ICC Additional supply current per input pin2 VCC = 5.5V; VO = 2.5V –50 –50 NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3 This parameter is valid for any VCC between 0V and 2.1V with a transition time of up to 10msec. For VCC = 2.1V to VCC = 5V 10%, a transition time of up to 100µsec is permitted. AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL fMAX PARAMETER Maximum clock frequency Tamb = -40 to +85oC VCC = +5.0V ±0.5V Tamb = +25oC VCC = +5.0V WAVEFORM Min Typ 1 125 350 Max Min Max 125 ns tPLH tPHL Propagation delay CP to Qn 1 2.0 1 2.4 1 tPZH tPZL Output enable time to High and Low level 3 4 1.0 2.6 3.1 3.9 4.2 4.9 1 1.0 2.6 5.0 5.5 1 ns tPHZ Output disable time tPLZ from High and Low level NOTE: 1. This datasheet limit may vary among suppliers. 3 4 1.8 1 1.6 1 3.3 2.8 4.3 1 3.6 1 1.8 1 1.6 1 4.6 1 4.1 1 ns 1997 Feb 03 5 3.3 3.6 4.2 1 4.7 1 UNIT 2.0 2.4 5.0 1 5.1 1 ns Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER Tamb = -40 to +85oC VCC = +5.0V ±0.5V Tamb = +25oC VCC = +5.0V WAVEFORM UNIT Min Typ Min 0.4 0.3 1.0 1 1.0 1 ns ts(H) ts(L) Setup time, High or Low Dn to CP 2 1.0 1 1.0 1 th(H) th(L) Hold time, High or Low Dn to CP 2 0.5 0.5 –0.3 –0.4 0.5 0.5 ns 1 1.5 1 2.0 1 0.8 1.0 1.5 1 2.0 1 ns tw(H) CP pulse width tw(L) High or Low NOTE: 1. This datasheet limit may vary among suppliers. AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V 1/fMAX Dn CP VM VM VM ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ VM VM ts(H) tw(H) tw(L) tPLH tPHL VM th(H) ts(L) VM NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. VM tPZH Qn OE tPHZ VM VM VM tPZL VOH –0.3V Qn 0V tPLZ VM VOL +0.3V SA00167 SA00166 Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level 1997 Feb 03 SA00107 Waveform 2. Data Setup and Hold Times Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency VM VM VM SA00165 OE th(L) CP VM Qn VM Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level 6 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A TEST CIRCUIT AND WAVEFORM VCC 7.0V PULSE GENERATOR VIN tW 90% VOUT VM NEGATIVE PULSE CL 10% 0V RL tTHL (tF) tTLH (tR) tTLH (tR) tTHL (tF) 90% POSITIVE PULSE Test Circuit for 3-State Outputs AMP (V) 90% VM VM 10% 10% tW SWITCH POSITION TEST SWITCH tPLZ closed tPZL closed All other open AMP (V) VM 10% RL D.U.T. RT 90% 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 74ABT Amplitude Rep. Rate tW tR tF 3.0V 1MHz 500ns 2.5ns 2.5ns SA00012 1997 Feb 03 7 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) DIP20: plastic dual in-line package; 20 leads (300 mil) 1997 Feb 03 8 74ABT534A SOT146-1 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) SO20: plastic small outline package; 20 leads; body width 7.5 mm 1997 Feb 03 9 74ABT534A SOT163-1 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm 1997 Feb 03 10 74ABT534A SOT339-1 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm 1997 Feb 03 11 74ABT534A SOT360-1 Philips Semiconductors Product specification Octal D-type flip-flop, inverting (3-State) 74ABT534A DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Copyright Philips Electronics North America Corporation 1997 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 1997 Feb 03 12