INTEGRATED CIRCUITS 74LVT273 3.3V Octal D flip-flop Product specification Supersedes data of 1994 May 11 IC23 Data Handbook 1998 Feb 19 Philips Semiconductors Product specification 3.3V Octal D flip-flop 74LVT273 FEATURES DESCRIPTION • Eight edge-triggered D-type flip-flops • Buffered common clock • Buffered asynchronous Master Reset • Output capability: +64mA/–32mA • TTL input and output switching levels • Input and output interface capability to systems at 5V supply • Bus-hold data inputs eliminate the need for external pull-up The LVT273 is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output. All outputs will be forced Low independent of Clock or Data inputs by a Low voltage level on the MR input. The device is useful for applications where the true output only is required and the CP and MR are common elements. resistors to hold unused inputs • Power-up reset • Live insertion/extraction permitted • No bus current loading when output is tied to 5V bus • Latchup protection exceeds 500 mA per JEDEC Std 17 • ESD protection exceeds 2000V per Mil Std 883 Method 3015 and 200V per Machine Model. QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER tPLH tPHL Propagation delay CP to Qn CL = 50pF; VCC = 3.3V CIN Input capacitance VI = 0V or 3.0V TYPICAL UNIT 3.5 3.5 ns 4 pF ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 20-Pin Plastic SOL –40°C to +85°C 74LVT273 D 74LVT273 D SOT163-1 20-Pin Plastic SSOP Type II –40°C to +85°C 74LVT273 DB 74LVT273 DB SOT339-1 20-Pin Plastic TSSOP Type I –40°C to +85°C 74LVT273 PW 74LVT273PW DH SOT360-1 PIN CONFIGURATION LOGIC SYMBOL MR 1 20 VCC Q0 2 19 Q7 D0 3 18 D7 D1 4 17 D6 Q1 5 16 Q6 Q2 6 15 Q5 D2 7 14 D5 D3 8 13 D4 Q3 9 12 Q4 11 CP GND 10 3 4 7 8 13 14 17 18 D0 D1 D2 D3 D4 D5 D6 D7 11 CP 1 MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 2 5 6 9 12 15 16 19 SV00018 SV00017 1998 Feb 19 2 853-1740 18985 Philips Semiconductors Product specification 3.3V Octal D flip-flop 74LVT273 LOGIC SYMBOL (IEEE/IEC) FUNCTION TABLE INPUTS 1 OUTPUTS OPERATING MODE R 11 C1 3 MR CP Dn Q0 – Q7 L X X L Reset (clear) H ↑ h H Load “1” H ↑ l L Load “0” 2 1D 4 5 7 6 8 9 13 12 14 15 17 16 18 19 H L X Q0 Retain state H = High voltage level h = High voltage level one set-up time prior to the Low-to-High clock transition L = Low voltage level l = Low voltage level one set-up time prior to the Low-to-High clock transition X = Don’t care ↑ = Low-to-High clock transition Q0 = Output as it was SV00019 PIN DESCRIPTION PIN NUMBER SYMBOL NAME AND FUNCTION 11 CP 3, 4, 7, 8, 13, 14, 17, 18 D0 – D7 Data inputs 2, 5, 6, 9, 12, 15, 16, 19 Q0 – Q7 Data outputs 1 MR 10 GND Ground (0V) 20 VCC Positive supply voltage Clock pulse input (active rising edge) Master Reset input (active-Low) LOGIC DIAGRAM D0 D1 D2 D3 3 4 7 8 D4 D5 13 D6 14 D7 17 18 11 CP D Q D CP Q D CP RD RD Q Q D CP D CP RD Q D CP RD Q D CP RD Q D CP RD Q CP RD RD 1 MR 2 5 6 9 Q0 Q1 Q2 Q3 12 Q4 15 Q5 16 Q6 19 Q7 SV00020 1998 Feb 19 3 Philips Semiconductors Product specification 3.3V Octal D flip-flop 74LVT273 ABSOLUTE MAXIMUM RATINGS1, 2 PARAMETER SYMBOL VCC IIK CONDITIONS RATING UNIT –0.5 to +4.6 V –50 mA –0.5 to +7.0 V VO < 0 –50 mA output in Off or High state –0.5 to +7.0 V Output in Low state 128 Output in High State –64 DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current voltage3 VOUT DC output IOUT O DC output current Tstg Storage temperature range mA –65 to 150 °C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC PARAMETER UNIT DC supply voltage MIN MAX 2.7 3.6 V 0 5.5 V VI Input voltage VIH High-level input voltage VIL Low-level Input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current 64 mA ∆t/∆v Input transition rise or fall rate; Outputs enabled 10 ns/V Tamb Operating free-air temperature range +85 °C 1998 Feb 19 2.0 –40 4 V Philips Semiconductors Product specification 3.3V Octal D flip-flop 74LVT273 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C MIN VIK Input clamp voltage VCC = 2.7V; IIK = –18mA VCC = 2.7 to 3.6V; IOH = –100µA VOH VOL VRST High-level output voltage Low-level output voltage Power-up output low voltage4 I Input t lleakage k currentt Output off current IEX ICCH Bus Hold current A inputs5 Current into an output in the High state when VO > VCC Quiescent supply current ICCL ∆ICC Additional supply current per input pin2 –1.2 VCC = 2.7V; IOH = –8mA 2.4 2.5 VCC = 3.0V; IOH = –32mA 2.0 2.2 0.1 0.2 VCC = 2.7V; IOL = 24mA 0.3 0.5 VCC = 3.0V; IOL = 16mA 0.25 0.4 VCC = 3.0V; IOL = 32mA 0.3 0.5 VCC = 3.0V; IOL = 64mA 0.4 0.55 VCC = 3.6V; IO = 1mA; VI = GND or VCC 0.13 0.55 VCC = 3.6V; VI = VCC or GND Control pins VCC = 3.6V; VI = VCC Data pins3 VCC = 0V; VI or VO = 0 to 4.5V 1 10 ±0.1 ±1 0.1 1 –1 -5 1 ±100 75 150 VCC = 3V; VI = 2.0V –75 –150 VCC = 0V to 3.6V; VCC = 3.6V ±500 VO = 5.5V; VCC = 3.0V UNIT V V VCC = 2.7V; IOL = 100µA VCC = 3V; VI = 0.8V IHOLD –0.9 VCC–0.1 VCC = 3.6V; VI = 0 IOFF MAX VCC-0.2 VCC = 0 or 3.6V; VI = 5.5V II TYP1 V V µA A µA µA µA 60 125 VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 0.13 0.19 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 3 12 mA 0.1 0.2 mA VCC = 3V to 3.6V; One input at VCC -0.6V, Other inputs at VCC or GND NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. Unused pins at VCC or GND. 4. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 5. This is the bus hold overdrive current required to force the input to the opposite logic state. AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER WAVEFORM MIN VCC = 3.3V ±0.3V VCC = 2.7V TYP1 MAX MAX UNIT fMAX Maximum clock frequency 1 150 tPLH tPHL Propagation delay CP to Qn 1 1.7 1.9 3.5 3.5 5.5 5.5 6.3 5.9 ns tPHL Propagation delay MR to Qn 2 1.3 3.2 6.2 6.2 ns NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 1998 Feb 19 5 MHz Philips Semiconductors Product specification 3.3V Octal D flip-flop 74LVT273 AC SETUP REQUIREMENTS GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω, Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER VCC = +3.3 ± 0.3V WAVEFORM VCC = 2.7V MIN TYP MIN UNIT ts(H) ts(L) Setup time, High or Low Dn to CP 3 2.3 2.3 1.0 1.0 2.7 2.7 ns th(H) th(L) Hold time, High or Low Dn to CP 3 0 0 –0.6 –0.6 0 0 ns tw(H) tw(L) Clock pulse width High or Low 1 3.3 3.3 1.5 1.5 3.3 3.3 ns tw(L) Master Reset pulse width, Low 2 3.3 1.5 3.3 ns tREC Recovery time MR to CP 2 2.7 1.0 3.2 ns AC WAVEFORMS VM = 1.5V, VIN = GND to 2.7V 1/fMAX Dn 2.7V CP 1.5V 1.5V 1.5V tw(L) tPHL Qn 1.5V 1.5V th(H) ts(L) 1.5V 0V 1.5V VOL NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. SV00021 SV00108 Waveform 3. Data Setup and Hold Times Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency 2.7V MR 1.5V 1.5V 0V tw(L) tREC 2.7V CP 1.5V 0V tPHL Qn VOH 1.5V VOL SV00107 Waveform 2. Master Reset Pulse Width, Master Reset to Output Delay and Master Reset to Clock Recovery Time 1998 Feb 19 0V th(L) 2.7V 1.5V VOH 2.7V 1.5V CP tPLH 1.5V 1.5V ts(H) 0V tw(H) ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ 6 Philips Semiconductors Product specification 3.3V Octal D flip-flop 74LVT273 TEST CIRCUIT AND WAVEFORMS VCC 10% 0V tTHL (tF) D.U.T. RT CL AMP (V) VM 10% VOUT PULSE GENERATOR 90% VM NEGATIVE PULSE VIN tW 90% tTLH (tR) tTLH (tR) RL tTHL (tF) 90% POSITIVE PULSE Test Circuit for Outputs AMP (V) 90% VM VM 10% 10% tW 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. 74LVT RT = Termination resistance should be equal to ZOUT of pulse generators. 1998 Feb 19 Amplitude Rep. Rate 2.7V ≤10MHz tW tR tF 500ns ≤2.5ns ≤2.5ns SV00022 7 Philips Semiconductors Product specification 3.3V Octal D flip-flop 74LVT273 SO20: plastic small outline package; 20 leads; body width 7.5 mm 1998 Feb 19 8 SOT163-1 Philips Semiconductors Product specification 3.3V Octal D flip-flop 74LVT273 SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm 1998 Feb 19 9 SOT339-1 Philips Semiconductors Product specification 3.3V Octal D flip-flop 74LVT273 TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm 1998 Feb 19 10 SOT360-1 Philips Semiconductors Product specification 3.3V Octal D flip-flop 74LVT273 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 11 Date of release: 05-96 9397-750-03534