INFINEON TDA4320X

FM-IF with Counter Output, Field Strength Indicator,
Noise Detector and MUTE Setting
1
Overview
1.1
Features
•
•
•
•
•
•
•
7-stage limiter amplifier
Coincidence demodulator
Counter output with request input
Field strength output
Multipath identification circuit
Adjustable muting depth (with full muting ≥ 80 dB)
This device is ESD protected
P-DSO-16-1
Type
Ordering Code
Package
TDA 4320X
Q67000-A-5000
P-DSO-16-1
Semiconductor Group
35
TDA 4320X
04.96
TDA 4320X
1.2
Pin Configuration
(top view)
P-DSO-16-1
Figure 1
1.3
Pin Definitions and Functions
Pin No. Symbol
Function
1
GND
Ground
Decoupling capacitors for bias, VS and VREF Pins are to be
connected directly to Pin 1
2
Multipath
Multipath identification input
identification input High impedance input (Ri ~ 10 kΩ). This input receives
the filtered field strength output (high pass or band pass).
3
Rectifier time
constant
Rectifier time constant
Determines the attack and release time of the
identification circuit.
4
Multipath
identification
output
Multipath identification output
Open npn-collector output, which is low during
(V4/V1 ≤ 0.7 V) multipath interference.
5
MUTE input
MUTE input
For DC voltage (usually derived from field strength output
voltage) which attenuates the AF output voltage by the
setting muting depth (Pin 7). Max. attenuation when
V5 = 0 V, no attenuation when V5 ≥ 0.5 V.
6
AF output
AF output
Demodulated FM-IF.
Semiconductor Group
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TDA 4320X
1.3
Pin Definitions and Functions (cont’d)
Pin No. Symbol
Function
7
MUTE depth
MUTE depth
Adjustment by connecting a dc voltage to ground the
requested muting depth can be set. Maximal attenuation
of AF output voltage with V7 = 2.4 V (typ. 38 dB), minimal
attenuation with V7 = 4.8 V (typ. 0 dB). Full muting with
V7 ≤ 1 V (≥ 80 dB).
8
Demodulator
tank circuit
Demodulator tank circuit
Driven via two on-chip capacitors (approx.15 pF ± 25 %).
The tank circuit voltage should be typ. 400 mVpp.
9
Demodulator
circuit
Demodulator circuit
10
Reference
voltage
Reference voltage
Should be RF decoupled to Pin 1.
11
IF counter output
IF counter output
Provides the IF carrier frequency (low impedance output
Rout ≈ 1.5 kΩ).
12
VS
Supply voltage
RF decoupled to Pin 1
13
Field strength
output
Field strength output
Supplies a DC voltage proportional to the IF input level
with very low delay time.
14
Field strength
adjust
Field strength adjust
Adjustment of slope and starting point of field strength
output voltage
15
IF input bias
IF input bias
To be RF decoupled to Pin 1
16
IF input
IF input
FM-lF input
Semiconductor Group
37
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TDA 4320X
1.4
Functional Block Diagram
Figure 2
Semiconductor Group
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TDA 4320X
2
Functional Description
The FM-IF demodulator TDA 4320X has been developed especially for car radio
applications. The on-chip multipath identification circuit activates an interference
suppression circuit in case of multipath interferences.
3
Circuit Description
The IC includes a 7-stage capacitive coupled limiter amplifier with coincidence
demodulator and AF output. The AF output signal can be continuously attenuated to
decrease the noise. In case of multipath interferences, the TDA 4320X includes an
identification circuitry. There is a field strength output (with min. 76 dB dynamic range,
typ. ± 1 dB nonlinearity and typ. ± 3 dB temperature drift), an IF counter output and an
adjustable muting (with full muting ≥ 80 dB).
Semiconductor Group
39
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TDA 4320X
4
Electrical Characteristics
4.1
Absolute Maximum Ratings
TA = – 40 °C to + 85 °C
Parameter
Symbol
VS
Junction temperature
Tj
Storage temperature
TS
Thermal resistance (system-air)
RthSA
ESD voltage, HBM (1.5 kΩ, 100 pF) VESD
Supply voltage
Limit Values
Unit
min.
max.
0
13.2
V
150
°C
125
°C
105
K/W
4
kV
–4
Remarks
Note: Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the integrated circuit.
4.2
Operating Range
TA = – 40 °C to + 85 °C
Parameter
Supply voltage
Ambient temperature
Symbol
VS
TA
Limit Values
Unit
min.
max.
7.5
13.2
V
– 40
85
°C
Remarks
Note: In the operating range the functions given in the circuit description are fulfilled.
Semiconductor Group
40
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TDA 4320X
4.3
AC/DC Characteristics
VS = 10 V; filF = 10.7 MHz; ∆f = 75 kHz; fmod = 1 kHz;
ViIFrms = 10 mV; TA = – 40 °C to + 85 °C
Parameter
Symbol
Limit Values
min. typ.
Current consumption
I12
Stabilized voltage
V10
Field strength output
V13
4.8
Test Condition
Test
Circuit
mA
V5 = 4.8 V; V7 = 4 V
1
V
V5 = 4.8 V; V7 = 4 V
1
max.
30
4.5
Unit
5.1
V5 = 4.8 V; V7 = 4 V
– Dynamic range
80
dB
D1
– Nonlinearity
±1
dB
D2
D3
– Temperature drift
±3
dB
– Load capacitance
50
pF
– Load resistance
1
kΩ
V13
5.0
5.5
6.0
V
VilFrms = 200 mV
1
V13
2.2
2.7
3.2
V
VilFrms = 1 mV
1
V13
0
1.2
V
VilFrms = 0 mV
1
µVrms
VqAF = – 3 dB
1
Input voltage for limiter
threshold
V16
AF output voltage
VqAF
30
840
mVrms V5 = 4.8 V; V7 = 4 V
1
1.2
%
V5 = 4.8 V; V7 = 4 V
1
60
dB
m = 80 %
1
76
dB
m = 30 %
1
V5 = 4.8 V; V7 = 4 V
1
480
Total harmonic distortion THDqAF
AM suppression
aAM
Signal-to-noise ratio
aS/N
76
dB
Counter output voltage
V11
50
mVrms CL = 5 pF;
Ri11 = 1.5 kΩ
1
Noise detector sensitivity V2
3.2
mVrms f2 = 20 kHz
1
V2
4.3
mVrms f2 = 300 kHz
1
I3
2.5
mA
f2 = 20 kHz;
V2 ≥ 6 mVrms
1
2.5
mA
f2 = 300 kHz;
V2 ≥7 mVrms
1
20
µA
V2AC = 0 V
1
Charge current Pin 3
Discharge current Pin 3
Semiconductor Group
I3
41
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TDA 4320X
4.3
AC/DC Characteristics (cont’d)
VS = 10 V; filF = 10.7 MHz; ∆f = 75 kHz; fmod = 1 kHz;
ViIFrms = 10 mV; TA = – 40 °C to + 85 °C
Parameter
Symbol
Limit Values
Unit
Test Condition
dB
V5 = 4.8 V; V7 = 4.8 V D4
2
dB
V5 = 0 V; V7 = 4.8 V
D4
46
dB
V5 = 0 V; V7 = 2.4 V
D4
80
dB
V5 = 4.8 V; V7 ≤ 1.0 V D4
80
dB
V5 = 0 V; V7 ≤1.0 V
min. typ.
AF MUTE
aAF
max.
0
–2
30
38
Test
Circuit
D4
Voltage for MUTE OFF
V5
0.7
V
1
Voltage for MUTE ON
V5
0
V
1
VS = 10 V; filF = 10.7 MHz; ∆f = 75 kHz; fmod = 1 kHz;
ViIFrms = 10 mV; TA = 25 °C
Parameter
Symbol
Limit Values
min. typ.
Current consumption
I12
Stabilized voltage
V10
Field strength output
V13
5.0
Nonlinearity
mA
V5 = 4.8 V; V7 = 4 V 1
V
V5 = 4.8 V; V7 = 4 V 1
80
dB
D1
±1
dB
D2
D3
Temperature drift
±3
dB
Load capacitance
50
pF
1
Load resistance
kΩ
V13
5.1
5.5
5.9
V
VilFrms = 200 mV
1
V13
2.3
2.7
3.1
V
VilFrms = 1 mV
1
V13
0
1.1
V
VilFrms = 0 mV
1
30
39
µVrms VqAF = – 3 dB
1
650
750
mVrms V5 = 4.8 V; V7 = 4 V 1
1.2
%
V5 = 4.8 V; V7 = 4 V 1
dB
m = 80 %
1
dB
m = 30 %
1
Input voltage for limiter
threshold
V16
AF output voltage
VqAF
550
Total harmonic distortion THDqAF
AM suppression
aAM
60
76
Semiconductor Group
Test
Circuit
V5 = 4.8 V; V7 = 4 V
74
Dynamic range
4.8
Test Condition
max.
30
4.6
Unit
82
42
04.96
TDA 4320X
4.3
AC/DC Characteristics (cont’d)
VS = 10 V; filF = 10.7 MHz; ∆f = 75 kHz; fmod = 1 kHz;
ViIFrms = 10 mV; TA = 25 °C
Parameter
Symbol
Limit Values
min. typ.
Unit
Test Condition
Test
Circuit
V5 = 4.8 V;
V7 = 4 V
1
max.
Signal-to-noise ratio
aS/N
76
84
dB
Counter output voltage
V11
50
80
mVrms CL = 5 pF;
Ri11 = 1.5 kΩ
1
2
3.2
6
mVrms f2 = 20 kHz
1
V2
2.7
4.3
7
mVrms f2 = 300 kHz
1
I3
1.6
2.5
4
mA
f2 = 20 kHz;
V2 ≥ 6 mVrms
1
1.6
2.5
4
mA
f2 = 300 kHz;
V2 ≥ 7 mVrms
1
10
20
40
µA
V2AC = 0 V
1
dB
V5 = 4.8 V;
V7 = 4.8 V
D4
2
dB
V5 = 0 V;
V7 = 4.8 V
D4
44
dB
V5 = 0 V;
V7 = 2.4 V
D4
80
dB
V5 = 4.8 V;
V7 ≤1.0 V
D4
80
dB
V5 = 0 V;
V7 ≤ 1.0 V
D4
V
1
V
1
Noise detector sensitivity V2
Charge current Pin 3
Discharge current Pin 3
I3
AF MUTE
aAF
0
–2
32
Voltage for MUTE OFF
V5
0.5
Voltage for MUTE ON
V5
0
Semiconductor Group
38
0.1
43
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TDA 4320X
Test Circuit 1
Figure 3
Semiconductor Group
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TDA 4320X
Application Circuit
Figure 4
Semiconductor Group
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TDA 4320X
Diagrams
Diagram D1
VF Dynamics
The dynamic range of VF voltage is determined by the test points M1 through M4 as
follows:
M1:
test point (at ViIF = – 60 dBm) supplies VF(M1)
M2:
test point (at ViIF = – 20 dBm) supplies VF(M2)
M3:
test point (at ViIF = – 90 dBm) supplies VF(M3)
M4:
test point (at ViIF = + 5 dBm) supplies VF(M4)
Hence follows:
MVF max := – 20 dBm + (VF(M4) – VF(M2))/(VF(M2) – VF(M1)) × 40 dB
MVF min := – 60 dBµV – (VF(M1) – VF(M3))/(VF(M2) – VF(M1)) × 40 dB
VF Dynamics = MVF max – MVF min
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TDA 4320X
Diagram D2
Test points to determine VF linearity:
VF is determined at 25 °C
Slope: m = (VF(M2) – VF(M1))/40 dB.
The tolerance range of the VF-linearity is determined by two parallel lines:
VF max = VF(M1) + m(M + 60 dB + 1 dB)
VF min = VF(M1) + m(M + 60 dB – 1 dB)
The VF values within the VF dynamic range (MVF min ≤ M ≤ MVF max) must be inside the
predetermined tolerance range:
VF min ≤ VF(M) ≤ VF max
Semiconductor Group
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TDA 4320X
Diagram D3
Test points to determine VF temperature drift:
VF-temperature drift: it is determined within – 40 to + 85 °C.
Slope: m = (VF(M2) – VF(M1))/40 dB (at 25 °C).
The tolerance range of the VF-temperature is determined by two parallel lines:
VF max = VF(M1) + m(M + 60 dB + 3 dB)
VF min = VF(M1) + m(M + 60 dB – 3 dB)
The VF values for temperatures between – 40 to + 85 °C within the VF dynamic range
(MVF min ≤ VF ≤ MVF max) must be inside the predetermined tolerance field:
VF min ≤ VF(M) ≤ VF max
Semiconductor Group
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TDA 4320X
Diagram D4
Mute Characteristics
Semiconductor Group
49
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TDA 4320X
5
Package Outlines
GPS05119
P-DSO-16-1
(Plastic Dual Small Outline Package)
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
SMD = Surface Mounted Device
Semiconductor Group
50
Dimensions in mm
04.96