INFINEON SPD50N03S2L

SPD50N03S2L-06 G
OptiMOS Power-Transistor
Feature
Product Summary
• N-Channel
VDS
30
V
• Enhancement mode
R DS(on)
6.4
mΩ
• Logic Level
ID
50
A
• High Current Rating
PG- TO252 -3
• Excellent Gate Charge x R DS(on) product (FOM)
• Superior thermal resistance
• 175°C operating temperature
• Avalanche rated
• dv/dt rated
° Pb-free lead plating; RoHS compliant
Type
Package
SPD50N03S2L-06 G PG- TO252 -3
Marking
PN03L06
Maximum Ratings, at Tj = 25 °C, unless otherwise specified
Parameter
Symbol
Continuous drain current1)
ID
Value
Unit
A
50
TC=25°C
50
ID puls
200
EAS
250
Repetitive avalanche energy, limited by Tjmax 2)
EAR
13
Reverse diode dv/dt
dv/dt
6
Gate source voltage
VGS
±20
V
Power dissipation
Ptot
136
W
-55... +175
°C
Pulsed drain current
TC=25°C
Avalanche energy, single pulse
mJ
ID=50 A , V DD=25V, RGS=25Ω
kV/µs
IS=50A, VDS=24V, di/dt=200A/µs, T jmax=175°C
TC=25°C
Operating and storage temperature
T j , Tstg
IEC climatic category; DIN IEC 68-1
55/175/56
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02-09-2008
SPD50N03S2L-06 G
Thermal Characteristics
Parameter
Symbol
Values
Unit
min.
typ.
max.
Characteristics
Thermal resistance, junction - case
RthJC
-
0.7
1.1
Thermal resistance, junction - ambient, leaded
RthJA
-
-
100
SMD version, device on PCB:
RthJA
-
-
75
-
-
50
@ min. footprint
@ 6 cm2 cooling area
3)
K/W
Electrical Characteristics, at Tj = 25 °C, unless otherwise specified
Parameter
Symbol
Values
Unit
min.
typ.
max.
V(BR)DSS
30
-
-
VGS(th)
1.2
1.6
2
Static Characteristics
Drain-source breakdown voltage
V
V GS=0V, ID=1mA
Gate threshold voltage, VGS = V DS
ID = 85 µA
Zero gate voltage drain current
µA
IDSS
V DS=30V, VGS=0V, Tj=25°C
-
0.01
1
V DS=30V, VGS=0V, Tj=125°C
-
10
100
IGSS
-
1
100
nA
RDS(on)
-
6.8
9.2
mΩ
RDS(on)
-
4.7
6.4
Gate-source leakage current
V GS=20V, VDS=0V
Drain-source on-state resistance
V GS=4.5V, I D=50A
Drain-source on-state resistance
V GS=10V, I D=50A
1Current limited by bondwire ; with an RthJC = 1.1K/W the chip is able to carry ID= 113A at 25°C, for detailed
information see app.-note ANPS071E available at www.infineon.com/optimos
2Defined by design. Not subject to production test.
3Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm² (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical without blown air.
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02-09-2008
SPD50N03S2L-06 G
Electrical Characteristics
Parameter
Symbol
Conditions
Values
Unit
min.
typ.
max.
36
72
-
Dynamic Characteristics
Transconductance
gfs
VDS ≥2*ID *RDS(on)max,
S
ID =50A
Input capacitance
Ciss
VGS =0V, VDS =25V,
-
1900
2530 pF
Output capacitance
Coss
f=1MHz
-
740
990
Reverse transfer capacitance
Crss
-
180
270
Turn-on delay time
td(on)
VDD =15V, VGS =10V,
-
8
12
Rise time
tr
ID =50A,
-
19
29
Turn-off delay time
td(off)
RG =3.6Ω
-
35
53
Fall time
tf
-
24
36
-
6
8
-
17.8
26.7
-
52
68
V(plateau) VDD =24V, ID =50A
-
3.2
-
V
IS
-
-
50
A
-
-
200
ns
Gate Charge Characteristics
Gate to source charge
Qgs
Gate to drain charge
Qgd
Gate charge total
Qg
VDD =24V, ID =50A
VDD =24V, ID =50A,
nC
VGS =0 to 10V
Gate plateau voltage
Reverse Diode
Inverse diode continuous
TC=25°C
forward current
Inv. diode direct current, pulsed
ISM
Inverse diode forward voltage
VSD
V GS=0V, IF=50A
-
0.9
1.3
V
Reverse recovery time
trr
V R=15V, I F=lS,
-
41
51
ns
Reverse recovery charge
Qrr
diF/dt=100A/µs
-
46
58
nC
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02-09-2008
SPD50N03S2L-06 G
1 Power dissipation
2 Drain current
Ptot = f (TC)
ID = f (T C)
parameter: VGS≥ 4 V
parameter: VGS≥ 10 V
SPD50N03S2L-06
W
A
45
120
110
40
100
ID
P tot
SPD50N03S2L-06
55
150
90
35
80
30
70
25
60
20
50
40
15
30
10
20
5
10
0
0
20
40
60
80
0
100 120 140 160 °C 190
0
20
40
60
80
100 120 140 160 °C 190
TC
TC
3 Safe operating area
4 Max. transient thermal impedance
ID = f ( VDS )
Z thJC = f (t p)
parameter : D = 0 , TC = 25 °C
parameter : D = t p/T
10
3 SPD50N03S2L-06
10
1 SPD50N03S2L-06
K/W
A
/I
D
t = 7.6µs
p
10
0
=
2
R
ID
DS
(on
)
10
Z thJC
V
DS
10 µs
10
-1
10
-2
100 µs
D = 0.50
10
0.20
1 ms
1
0.10
0.05
10
single pulse
-3
0.02
0.01
10
0
10
-1
10
0
10
1
V
10
2
10
-4
10
-7
10
-6
10
-5
10
-4
10
-3
10
-2
s
10
tp
VDS
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02-09-2008
0
SPD50N03S2L-06 G
5 Typ. output characteristic
6 Typ. drain-source on resistance
ID = f (V DS); T j=25°C
RDS(on) = f (I D)
parameter: tp = 80 µs
parameter: VGS=10V
SPD50N03S2L-06
120
Ω
A
V
[V]
GS
a
h
100
90
ID
80
g
70
60
2.8
c
3.0
d
3.2
e
3.4
f
3.6
g
3.8
50
g
16
14
10
10.0
8
e
40
f
12
4.5
i
e
18
b
f h
d
2.6
R DS(on)
i
SPD50N03S2L-06
21
Ptot = 136W
h
6
30
d
i
4
20
c
10
VGS [V] =
2
b
d
3.2
a
0
0
0.5
1
1.5
2
2.5
3
3.5
V
4
e
3.4
f
3.6
g
3.8
h
i
4.5 10.0
0
5
0
10
20
30
40
50
60
70 A
85
ID
VDS
7 Typ. transfer characteristics
8 Typ. forward transconductance
ID= f ( V GS ); V DS≥ 2 x ID x RDS(on)max
g fs = f(I D); T j=25°C
parameter: tp = 80 µs
parameter: g fs
90
60
A
S
50
70
40
g fs
ID
45
35
60
50
30
40
25
20
30
15
20
10
10
5
0
0
0.5
1
1.5
2
2.5
3
V
4
VGS
Page 5
0
0
20
40
60
80
100
A 130
ID
02-09-2008
SPD50N03S2L-06 G
9 Drain-source on-state resistance
10 Typ. gate threshold voltage
RDS(on) = f (Tj)
VGS(th) = f (T j)
parameter : ID = 50 A, VGS = 10 V
parameter: VGS = VDS
SPD50N03S2L-06
2.5
15
Ω
V
V GS(th)
R DS(on)
12
11
10
9
8
0.415 mA
1.5
83 µA
98%
7
1
6
5
typ
4
0.5
3
2
1
0
-60
-20
20
60
140 °C
100
0
-60
200
-20
20
60
100
Tj
°C 160
Tj
11 Typ. capacitances
12 Forward character. of reverse diode
C = f (V DS)
IF = f (V SD)
parameter: VGS=0V, f=1 MHz
parameter: T j , tp = 80 µs
10
4
10
3 SPD50N03S2L-06
A
pF
Ciss
2
10
1
C
IF
10
10
Coss
3
T j = 25 °C typ
T j = 175 °C typ
Crss
T j = 25 °C (98%)
T j = 175 °C (98%)
10
2
0
10
5
10
15
20
V
30
0
0
0.4
0.8
1.2
1.6
2
2.4 V
3
VSD
V DS
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02-09-2008
SPD50N03S2L-06 G
13 Typ. avalanche energy
14 Typ. gate charge
E AS = f (T j)
VGS = f (QGate)
par.: I D = 50 A , V DD = 25 V, R GS = 25 Ω
parameter: ID = 50 A pulsed
260
SPD50N03S2L-06
16
mJ
V
220
12
180
VGS
E AS
200
160
10
0,2 VDS max
140
0,8 VDS max
8
120
100
6
80
4
60
40
2
20
0
25
45
65
85
105
125
145
°C 185
Tj
0
0
10
20
30
40
50
60
nC
80
QGate
15 Drain-source breakdown voltage
V(BR)DSS = f (Tj)
parameter: ID=10 mA
36
SPD50N03S2L-06
V(BR)DSS
V
34
33
32
31
30
29
28
27
-60
-20
20
60
100
140 °C
200
Tj
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02-09-2008
SPD50N03S2L-06 G
Package outline: PG-TO252-3
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SPD50N03S2L-06 G
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02-09-2008