DICE SPECIFICATION RH108A 8 7 6 PAD FUNCTION 1 2 4 3 1. 2. 3. 4. 5. 6. 7. 8. COMP 1 – IN + IN V – (substrate) NC OUT V+ COMP 2 DIE CROSS REFERENCE (Note 1, 2) LTC Finished Part Number Order DICE CANDIDATE Part Number Below RH108A RH108A DICE Backside (substrate) is an alloyed gold layer. Connect to V –. 74 × 51 mils W DICE ELECTRICAL TEST LI ITS SYMBOL PARAMETER (Elemental Evaluation)(Notes 4, 5, 7) CONDITIONS NOTES TA = 25°C MIN MAX 0.5 SUB- – 55°C ≤ TA ≤ 125°C SUBGROUP MIN MAX GROUP VOS Input Offset Voltage IOS Input Offset Current 0.2 1 0.4 2,3 nA IB Input Bias Current 2.0 1 3.0 2,3 nA AVOL Large-Signal Voltage Gain CMRR PSRR VS = ±15V, VOUT = ±10V RL ≥ 10k 1 1.0 2,3 UNITS mV 80 4 40 5,6 V/mV Common Mode Rejection Ratio 96 1 96 2,3 dB Power Supply Rejection Ratio 96 1 96 2,3 dB Input Voltage Range VS = ±15V VOUT Output Voltage Swing VS = ±15V, RL = 10k IS Supply Current (Note 6) Note 1: Differential input voltages greater than 1V will cause excessive current to flow through the input diodes unless limiting resistance is used. Note 2: For supply voltages less than ±15V, the maximum input voltage is equal to the supply voltage. Note 3: Guaranteed by design, characterization or correlation to other tested parameters. Note 4: ±5V ≤ VS ≤ ±20V unless otherwise noted. 3 ±13.5 ±13.5 ±13 4 0.6 V ±13 1 5,6 0.4 0.6 2 3 V mA mA Note 5: VS = ±15V, VCM = 0V, TA = 25°C unless otherwise noted. Note 6: 25°C ≤ TA ≤ 125°C. Note 7: Dice are probe tested at 25°C to the limits shown. Final specs after assembly are sample tested during the elemental evaluation. Please refer to RH108AH data sheet . For absolute maximum ratings, typical specifications, performance curves and finished product specifications, please refer to the standard RH data sheets. Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 1 DICE SPECIFICATION RH108A Rad Hard die require special handling as compared to standard IC chips. Rad Hard die are susceptible to surface damage because there is no silicon nitride passivation as on standard die. Silicon nitride protects the die surface from scratches by its hard and dense properties. The passivation on Rad Hard die is silicon dioxide that is much “softer” than silicon nitride. LTC recommends that die handling be performed with extreme care so as to protect the die surface from scratches. If the need arises to move the die around from the chip tray, use a Teflon-tipped vacuum wand. This wand can be made by pushing a small diameter Teflon tubing onto the tip of a steel-tipped wand. The inside diameter of the Teflon tip should match the die size for efficient pickup. The tip of the Teflon should be cut square and flat to ensure good vacuum to die surface. Ensure the Teflon tip remains clean from debris by inspecting under stereoscope. During die attach, care must be exercised to ensure no tweezers touch the top of the die. Wafer level testing is performed per the indicated specifications for dice. Considerable differences in performance can often be observed for dice versus packaged units due to the influences of packaging and assembly on certain devices and/or parameters. Please consult factory for more information on dice performance and lot qualifications via lot sampling test procedures. Dice data sheet subject to change. Please consult factory for current revision in production. 2 Linear Technology Corporation rh108aa LT/LT 00499 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com © LINEAR TECHNOLOGY CORPORATION 1998