DISCRETE SEMICONDUCTORS DATA SHEET 2N7000 N-channel enhancement mode vertical D-MOS transistor Product specification File under Discrete Semiconductors, SC13b April 1995 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor FEATURES 2N7000 QUICK REFERENCE DATA • Low RDS(on) SYMBOL • Direct interface to C-MOS, TTL, etc. VDS drain-source voltage ID • High-speed switching • No secondary breakdown. PARAMETER CONDITIONS MAX. 60 V drain current DC value 280 mA RDS(on) drain-source on-resistance ID = 500 mA VGS = 10 V 5 Ω VGS(th) gate-source threshold voltage ID = 1 mA VGS = VDS 3 V DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a TO-92 variant envelope, intended for use in relay, high-speed and line transformer drivers. PIN CONFIGURATION PINNING - TO-92 VARIANT d handbook, halfpage PIN DESCRIPTION 1 drain 2 gate 3 source 1 2 3 g MAM146 s Fig.1 Simplified outline and symbol. April 1995 2 UNIT Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor 2N7000 LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS drain-source voltage − 60 V VDG drain-gate voltage − 60 V ±VGSO gate-source voltage open drain − 40 V ID drain current DC value − 280 mA IDM drain current peak value − 1.3 A Ptot total power dissipation Tamb = 25 °C − 830 mW Tstg storage temperature range −55 150 °C Tj junction temperature − 150 °C THERMAL RESISTANCE SYMBOL Rth j-a April 1995 PARAMETER VALUE from junction to ambient 150 3 UNIT K/W Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor 2N7000 CHARACTERISTICS Tj = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(BR)DSS drain-source breakdown voltage ID = 10 µA VGS = 0 60 90 − V IDSS drain-source leakage current VDS = 48 V VGS = 0 − − 1 µA ±IGSS gate-source leakage current ±VGS = 15 V VDS = 0 − − 10 nA VGS(th) gate-source threshold voltage ID = 1 mA VGS = VDS 0.8 − 3 V RDS(on) drain-source on-resistance ID = 500 mA VGS = 10 V − 3.5 5 Ω ID = 75 mA VGS = 4.5 V − − 5.3 Ω Yfs transfer admittance ID = 200 mA VDS = 10 V 100 200 − mS Ciss input capacitance VDS = 10 V VGS = 0 f = 1 MHz − 25 40 pF Coss output capacitance VDS = 10 V VGS = 0 f = 1 MHz − 22 30 pF Crss feedback capacitance VDS = 10 V VGS = 0 f = 1 MHz − 6 10 pF Switching times (see Figs 2 and 3) ton turn-on time ID = 200 mA VDD = 50 V VGS = 0 to 10 V − 4 10 ns toff turn-off time ID = 200 mA VDD = 50 V VGS = 0 to 10 V − 4 10 ns April 1995 4 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor VDD = 50 V handbook, halfpage 2N7000 handbook, halfpage 90 % INPUT 10 % 90 % 10 V OUTPUT ID 0V 50 Ω 10 % ton MSA631 toff MBB692 Fig.2 Switching time test circuit. handbook, Fig.3 Input and output waveforms. MDA690 1 MDA691 1.6 handbook, halfpage Ptot ID (A) (W) 0.8 1.2 VGS = 10 V 0.6 6V 0.8 0.4 5V 0.4 0.2 4V 3V 0 0 50 100 0 150 200 Tamb (°C) 0 8 12 VDS (V) 16 Fig.5 Typical output characteristics; Tj = 25 °C. Fig.4 Power derating curve. April 1995 4 5 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor MDA692 1.6 2N7000 MDA693 20 handbook, halfpage handbook, halfpage RDSon (Ω) ID (A) 16 VGS = 3 V 1.2 12 0.8 4V 8 5V 0.4 4 0 0 0 Fig.6 8 4 VGS (V) 12 Typical transfer characteristic; VDS = 10 V; Tj = 25 °C. handbook, halfpage C (pF) 60 40 Ciss Coss 20 Crss 0 0 Fig.8 April 1995 5 10 15 1 Fig.7 MDA694 80 10 V 20 25 VDS (V) Typical capacitances as a function of drain-source voltage; VGS = 0; f = 1 MHz; Tj = 25 °C. 6 10 102 103 ID (mA) 104 Typical on-resistance as a function of drain current; Tj = 25 °C. Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor MDA695 2.4 2N7000 MDA696 1.2 handbook, halfpage handbook, halfpage k k 2 1.1 (1) 1.6 1 (2) 1.2 0.9 0.8 0.8 0.4 −50 0 50 100 Tj (°C) 0.7 −50 150 0 50 100 Tj (°C) 150 (1) ID = 500 mA; VGS = 10 V. (2) ID = 75 mA; VGS = 4.5 V. Fig.9 April 1995 Temperature coefficient of drain-source on resistance; R DS ( on ) at T j k = ---------------------------------------------; typical RDS(on). R DS ( on ) at 25 °C Fig.10 Temperature coefficient of gate-source threshold voltage; V GS ( th ) at T j - ; typical VGS(th) at 1 mA. k = -------------------------------------------V GS ( th ) at 25 °C 7 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor 2N7000 PACKAGE OUTLINE Plastic single-ended leaded (through hole) package; 3 leads (on-circle) SOT54 variant c L2 E d A L b 1 e1 2 e D 3 b1 L1 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A b b1 c D d E e e1 L L1(1) max L2 max mm 5.2 5.0 0.48 0.40 0.66 0.56 0.45 0.40 4.8 4.4 1.7 1.4 4.2 3.6 2.54 1.27 14.5 12.7 2.5 2.5 Notes 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. OUTLINE VERSION SOT54 variant April 1995 REFERENCES IEC JEDEC EIAJ TO-92 SC-43 8 EUROPEAN PROJECTION ISSUE DATE 97-04-14 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor 2N7000 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. April 1995 9 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor NOTES April 1995 10 2N7000 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor NOTES April 1995 11 2N7000 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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