DISCRETE SEMICONDUCTORS DATA SHEET BSP126 N-channel enhancement mode vertical D-MOS transistor Product specification File under Discrete Semiconductors, SC13b April 1995 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor DESCRIPTION BSP126 QUICK REFERENCE DATA N-channel enhancement mode vertical D-MOS transistor in a miniature SOT223 envelope and designed for use as a line interrupter in telephone sets and for application in relay, high-speed and line-transformer drivers. Drain-source voltage VDS max. 250 V Drain current (DC) ID max. 350 mA Total power dissipation up to Tamb = 25 °C Ptot max. 1.5 W ID = 300 mA; VGS = 10 V RDS(on) typ. max. 5.0 Ω 7.0 Ω Gate-source threshold voltage VGS(th) max. 2 V Drain-source on-resistance FEATURES • Direct interface to C-MOS, TTL, etc. • High-speed switching. • No secondary breakdown. PINNING - SOT223 1 = gate 2 = drain 3 = source 4 = drain Marking code BSP126 PIN CONFIGURATION d 4 handbook, halfpage g 1 Top view 2 s 3 MAM054 Fig.1 Simplified outline and symbol. April 1995 2 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSP126 RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Drain-source voltage VDS max. 250 V Gate-source voltage (open drain) ±VGSO max. 20 V Drain current (DC) ID max. 350 mA Drain current (peak) IDM max. 1.2 A Total power dissipation up to Tamb = 25 °C (note 1) Ptot max. 1.5 Storage temperature range Tstg Junction temperature Tj max. Rth j-a = W −65 to + 150 °C 150 °C THERMAL RESISTANCE From junction to ambient (note 1) 83.3 K/W Note 1. Device mounted on an epoxy printed-circuit board 40 mm × 40 mm × 1.5 mm; mounting pad for the drain lead min. 6 cm2. CHARACTERISTICS Tj = 25 °C unless otherwise specified Drain-source breakdown voltage ID = 10 µA; VGS = 0 V(BR)DSS min. 250 V IDSS max. 1.0 µA ±IGSS max. 100 nA VGS(th) min. max. 0.8 V 2.0 V ID = 300 mA; VGS = 10 V RDS(on) typ. max. 5.0 Ω 7.0 Ω ID = 20 mA; VGS = 2.4 V RDS(on) max. 10 Ω Yfs min. typ. 200 mS 400 mS Ciss typ. max. 65 pF 90 pF Coss typ. max. 20 pF 30 pF Drain-source leakage current VDS = 200 V; VGS = 0 Gate-source leakage current ± VGS = 20 V; VDS = 0 Gate threshold voltage ID = 1 mA; VDS = VGS Drain-source on-resistance Transfer admittance ID = 300 mA; VDS = 25 V Input capacitance at f = 1 MHz; VDS = 25 V; VGS = 0 Output capacitance at f = 1 MHz; VDS = 25 V; VGS = 0 April 1995 3 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSP126 Feedback capacitance at f = 1 MHz; VDS = 25 V; VGS = 0 Crss typ. max. 5 pF 15 pF ton typ. max. 5 ns 10 ns toff typ. max. 20 ns 30 ns Switching times (see Figs 2 and 3) ID = 250 mA; VDD = 50 V; VGS = 0 to 10 V VDD = 50 V handbook, halfpage handbook, halfpage 90 % INPUT 10 % 90 % 10 V 0V OUTPUT ID 50 Ω 10 % MSA631 ton toff MBB692 Fig.2 Switching time test circuit. April 1995 Fig.3 Input and output waveforms. 4 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor handbook, MBB693 2 BSP126 MDA712 2 handbook, halfpage (W) 1.6 ID (A) 1.6 1.2 1.2 0.8 0.8 0.4 0.4 Ptot VGS = 10 V 6V 5V 4V 3V 2V 0 0 0 50 100 150 200 Tamb (°C) MDA713 4 6 ID (A) 1.6 10 VDS (V) MDA714 104 handbook, halfpage handbook, halfpage 8 Output characteristics; Tj = 25 °C; typical values. Fig.5 Fig.4 Power derating curve. 2 2 0 ID (mA) VGS = 10 V 103 5V 4V 1.2 3V 0.8 102 0.4 10 0 0 Fig.6 April 1995 2 4 6 8 10 VGS (V) Transfer characteristic; VDS = 10 V; Tj = 25 °C; typical value. Fig.7 5 0 4 8 12 16 RDSon (Ω) On-resistance as a function of drain current; Tj = 25 °C; typical values. Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSP126 handbook, half age MDA717 2.8 MDA716 1.4 handbook, halfpage k k 2.4 1.2 2 (1) (2) 1 1.6 1.2 0.8 0.8 0.4 −50 0 50 100 Tj (°C) 0.6 −50 150 Fig.9 R DS ( on ) at T j k = ---------------------------------------------- ; typical values. R DS ( on ) at 25 °C Fig.8 handbook, halfpage 160 120 80 Ciss 40 Coss Crss 0 0 5 10 15 20 25 VDS (V) Fig.10 Capacitances as a function of drain-source voltage; VGS = 0; f = 1 MHz; Tj = 25 °C; typical values. April 1995 6 50 100 Tj (°C) 150 V GS ( th ) at T j k = --------------------------------------------- ; VGS(th) at 1 mA; V GS ( th ) at 25 °C typical values. MDA715 200 C (pF) 0 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSP126 PACKAGE OUTLINE Plastic surface mounted package; collector pad for good heat transfer; 4 leads D SOT223 E B A X c y HE v M A b1 4 Q A A1 1 2 3 Lp bp e1 w M B detail X e 0 2 4 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp b1 c D E e e1 HE Lp Q v w y mm 1.8 1.5 0.10 0.01 0.80 0.60 3.1 2.9 0.32 0.22 6.7 6.3 3.7 3.3 4.6 2.3 7.3 6.7 1.1 0.7 0.95 0.85 0.2 0.1 0.1 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 96-11-11 97-02-28 SOT223 April 1995 EUROPEAN PROJECTION 7 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSP126 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. April 1995 8 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor NOTES April 1995 9 BSP126 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor NOTES April 1995 10 BSP126 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor NOTES April 1995 11 BSP126 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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