DEMO MANUAL DC2100A Bi-Directional Cell Balancer Using the LTC3300-1 and the LTC6804-2 Description Demonstration Circuit DC2100A is a Bi-Directional Cell Balancer using two LTC®3300-1 ICs to achieve active balancing of up to 12 Li-Ion cells. The board uses a single LTC6804-2 Multi-Cell Addressable Battery Stack Monitor IC to measure cell voltages and two LTC3300-1 ICs to provide active cell balancing. The DC2100A-C contains a PIC18F47J53 microcontroller to communicate with the LTC3300-1 and LTC6804-2 ICs, as well as an LTC6820 isoSPI Interface IC for communication with DC2100A-D boards. Up to 7 DC2100A-D boards can be connected to a DC2100A-C to build a stacked system of 8 total boards.* * Note: The voltage rating of T15 limits the system to a total of 8 total boards. A graphical user interface (GUI) uses a USB interface to communicate with the DC2100A-C. The GUI controls the LTC3300-1 ICs allowing manual control of the charging/ discharging of cells and reporting the voltage of each cell. Cell balancing is achieved through the LTC3300-1 ICs by transferring charge from one or more cells per LTC3300-1 to the stack or from the stack to one or more cells per LTC3300-1. Design files for this circuit board are available at http://www.linear.com/demo/DC2100A Source code and documentation for PIC18 and GUI are available at http://www.linear.com/docs/45563 L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and QuikEval is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Performance Summary Specifications are at TA = 25°C Cell Voltage Range 3.2V to 4.5V (2.5V to 4.5V)* Stack Voltage 60V Max Average Battery Balancing Charge Current (12 Cell) 4.0A (Typ) Average Battery Balancing Discharge Current (12 Cell) 4.3A (Typ) Average Battery Balancing Charge Current (6 Cell) 3.4A (Typ) Average Battery Balancing Discharge Current (6 Cell) 4.0A (Typ) Balancing Efficiency 90% (Typ) The Cell Voltage Range may be expanded to 2.5V to 4.5V by changing the resistors RTONS to 30.9kΩ and resistors RTONP to 47.5kΩ Demo Board Description DC2100A-C 12 Cell 4A Active Cell Balancer Controller Board DC2100A-D 12 Cell 4A Active Cell Balancer Stacked Board dc2100afc 1 DEMO MANUAL DC2100A Quick Start Procedure Discharge Efficiency 100.0 Charge Efficiency 100.0 6 CELLS 12 CELLS 95.0 EFFICIENCY (%) EFFICIENCY (%) 95.0 90.0 85.0 80.0 75.0 2.6 6 CELLS 12 CELLS 90.0 85.0 80.0 2.8 3.0 3.2 3.4 3.6 CELL VOLTAGE 3.8 4.0 75.0 2.6 2.8 3.0 3.2 3.4 3.6 CELL VOLTAGE 3.8 4.0 Cell Balancer Efficiency vs Cell Voltage Thermal Image all Cells Active Balancing The conditions for the Thermal Plot are: Cell Voltages at 3.6V, Odd Numbered Cells Discharging, Even Numbered Cells Charging dc2100afc 2 DEMO MANUAL DC2100A Quick Start Procedure DC2100A-C Demo Board Photo Figure 1. DC2100A-C Demo Board Size Equals 5.5" x 12.8" dc2100afc 3 DEMO MANUAL DC2100A operating principle The DC2100A has a five window GUI, pictured in Figure 28. The Control Panel is the primary window, which displays information about the ICs in the stacked system, the state of the cells on each DC2100A board, and allows manual control of the balancing mode of the LTC3300-1. The Control Panel can spawn three more windows: a Calibration Data window to calibrate cell and balancer characteristics, an Error Log window to display logged errors, and a Graph View window to graphically display characteristics of the stacked system over time. The Graph View window also spawn a Graph View Option window that controls the settings of the Graph View window. The LTC3300-1 Active Balancer is a power stage control IC. The LTC3300-1 does not have a balancer algorithm built into it. The determination of the balancing times and directions are performed at a system level and conveyed to the LTC3300-1 through its SPI interface. The LTC3300-1 only accepts cell charge or discharge commands. Charge is transferred to/from a cell from/to the stack, a series connection of adjacent cells, through a flyback converter that is operating in boundary mode. During discharge of a cell the current in the primary of a coupled inductor transformer with a turns ratio of 1:2, ramps up to 10A at which point the primary switch turns off. The charge in the primary inductor is transferred to the secondary inductor which is connected across the 12 cell sub-stack. This sub-stack current then passes through the series connected cells thus distributing the charge equally across each cell. When charging a cell, the current in the secondary of the coupled inductor transformer ramps up to 5.0A at which point the secondary switch turns off. The charge in the secondary inductor is transferred to the primary inductor which is connected across the cell. The secondary current is drawn from the series connected cells thus removing charge equally across each cell. The efficiency through the fly-back converter is 90%. quick start procedure The demonstration circuit is set up per Figure 34 to evaluate the performance of the DC2100A-C Bi-Directional Cell Balancer using the LTC3300-1. Using short twisted pair leads for any power connections, refer to Figure 34 for the proper measurement and equipment setup. The DC2100A will support a system of 4 to 12 cells (See Figures 34 and 37 to 44). Recommended Cell Connection Sequence The recommended cell connection sequence is to connect the V– connection first followed by connecting cells 1 through cell 12. Disconnection of the cells should follow this sequence in the reverse order with the V– connection being removed last. Connecting the V– connection first and removing last is recommended because the V– connection is the ground reference for the circuitry within the demo board. After connecting the V–, all other cell connection sequence is less critical as long as the cell circuit capacitances are matched as they are in the demo board. Following the recommended cell connection removes the possibility of excessive voltage on any of the lower cells due to an imbalance in cell circuit capacitance. A 4 bit board ID code is set by the A0 through A3 jumpers on the DC2100A-C must be set to 0000. The jumpers on the DC2100A-D boards must be set to unique values between 0001 and 1111. To use the DC2100A, the PC must first have the proper driver and software installed. To do this, download the QuikEval™ software from Linear Technology, at www.linear.com: http://www.linear.com/designtools/software/quik_eval.jsp 1)Install the QuikEval software by running the executable ltcqev.exe. Follow the instructions to connect the DC2100A. If you fail to unplug the DC2100A, the DC2100A driver will not install! dc2100afc 4 DEMO MANUAL DC2100A quick start procedure 2)When installation of QuikEval is complete, close the QuikEval program. 3)Reopen QuikEval. If properly installed, QuikEval will show the following message until the DC2100A is connected: If not properly installed, QuikEval will be unable to connect to the DC2100A. Please retry the software installation, with the DC2100A disconnected. When the GUI connects to the DC2100A system, it will display the boards attached in the Control Panel System Tree View. The DC2100A GUI Control Panel is able to display the data and controls for one board at a time. When a board is selected in the System Tree View, all of the Windows will begin to display the data and controls for that board. The Selected Board Indicator in each window will indicate which board is selected. The Board Status LEDs indicate the state of the boards similarly to the LEDs on the DC2100A-C. The green LED flashes quickly when a board is connected but its cells are not powered, and slowly when a board is connected with powered cells. The amber LED turns on when the GUI is communicating with a board via USB. When the DC2100A is used with fewer than 12 cells, the board must be configured in the GUI so that the unpopulated 4)Now connect the DC2100A. The QuikEval software will recognize when the DC2100A demo board has been found, and will offer to download and install the module from the LTC website: At this point, select OK. 5)The QuikEval software will now download and open the software for the DC2100A. 6)Close QuikEval Software, as it is no longer needed for the DC2100A. When the DC2100A-C is connected to the PC, the PIC18 will become powered. The powered status will be indicated through Green LED D15 flashing with a 1 second period. When the GUI’s launched, it will begin communicating with the PIC18 via USB. Proper USB communication will be indicated through Orange LED D16 lighting during each USB transaction. Figure 2. Board Selection in System Tree View dc2100afc 5 DEMO MANUAL DC2100A quick start procedure Figure 5. Voltage Display Controls Figure 3. Turning off Cell 1 on Board 3 cells are not interpreted as an undervoltage condition. When a cell is red in the System Tree View, it has been specified as unpopulated. To configure a DC2100A for fewer than 12 cells, right click the board in the System Tree View and select the number of populated cells. Figure 4. VOV and VUV Text Boxes An alternative method of viewing the data is available by pressing the Graph Data button, to open the Graph View Window. The Graph View Window is detailed in Figure 33, and allows data for each board and the stacked system to be graphed over time. The graph data can be saved and are reloaded later, and the View Options control allows configuration of the Graph Display. The Stack Summary provides graphed data for the entire system, where the Board Summary, Cell Voltages, and Temperatures allow data to be graphed for boards selected in the Tree View. Up to 15 values may be graphed at one time, and the graph is limited to 500 seconds of data. The Global Channel Monitor tab switches the Control Panel to a grid view in which all of the cell voltages can be viewed at the same time. Disabled cells will be color coded as grey, and cells selected in the System Tree View will be highlighted in blue. Details of the Global Channel Monitor View are provided in Figure 30. Several controls are available on the Control Panel Cell Tab for issuing balancing commands to the selected board. In the Balance Mode Select Boxes, you can manually select which cells are to be discharged by clicking the cell’s DISCHARGE button, which cells are to be charged by clicking the cell’s CHARGE button. The DC2100A GUI periodically checks for OV and UV measured on the cells when balancing. To avoid the program from suspending balancing from a OV and UV measurement during normal operation, the Max Cell Voltage and UV values must be entered in the VOV and Min Cell Voltages text boxes tab shown in Figure 4. The cell voltages in the Control Panel can be configured to stop updating automatically, and only be updated when the Read Voltages button is clicked (as shown in Figure 5). This provides the ability to freeze the data for a board at any instant in time. Figure 6. Balance Mode Select Boxes Note that if a cell is disabled, the balance mode select box will not be selected and the cell pictured will be grey. Balancing and overvoltage conditions are also indicated by color, according to the Cell State Color Key. dc2100afc 6 DEMO MANUAL DC2100A quick start procedure is pressed, the Read Command and Read Status registers will be updated for the selected board (see Figure 8). When the Timed Balance method of balance control is selected, the GUI allows the user to program the balancer to charge or discharge each cell for a specific amount of time. The LTC3300-1 is a power stage control IC. The determination of the balancing times and directions are done at the System level and conveyed to the LTC3300-1 through its SPI communications port. In order to perform a timed balance, the TIMED BALANCE check shown in Figure 9 must be selected to have access to the timed balance controls as shown in the Balance Mode Select Boxes. Figure 7. Manual Balance Control Once the balance modes are selected, they are not immediately written to the LTC3300-1 ICs. Two methods are available for writing the balance modes: Manual and Timed Balance Control. When the Manual Balance method is selected, the Write Command button will cause the GUI to write the balance modes to the selected board. Once the balance mode commands are written to the LTC3300-1 ICs, balancing will not begin until the Execute button has been pressed to command the balancing to begin. The Execute button will cause all of the attached boards to begin balancing. This allows each board to have its balancing commands set up when selected in the System Tree View, and to then have all of the balancers turned on together. To disable any cell from balancing, the cell’s NONE button must be clicked in the Balance Mode Select Box followed by clicking the Write Command button and finally the Execute button. Each time the Execute button Figure 9. Timed Balance Control To use the Timed Balance method of balance control, select the DISCHARGE, CHARGE, or NONE button for each cell and then enter the time in seconds into the cells “BALANCE TIME” text box. Press the Write button to write the balance commands and times into the selected board. Select another board from the System Tree View and repeat until the balance settings have been loaded into each DC2100A board. Press the Start button to begin the timed balance Figure 8. LTC3300-1 Register Display dc2100afc 7 DEMO MANUAL DC2100A quick start procedure for all of the boards in the stacked system. The balance times will then begin to count down as the balancing is performed, and the LTC3300-1 Register Display will be continuously updated. The NEXT STOP TIME field will display the earliest time that one of the cells will complete balancing, and the board on which that cell resides. When the NEXT STOP TIME arrives, the balance mode for that cell will change to NONE and a new cell will display for the NEXT STOP TIME. The TIME REMAINING will display the total time remaining in the timed balancing, after which all of the cells will have NONE for their balancing mode. Figure 11. Board Configuration Control In addition to the Graph View of the data, the DC2100A system can be monitored over a long period of time with the results written to a CSV file. The logging interval and length can be configured, but note that the size of the data files can grow quite large for stacked systems with many boards. The projected memory size will be displayed before the user begins logging by pressing the Start Data Log button. Once the button is pressed, the user will be prompted to enter a data file name and location, and the logging will begin. Figure 10. Timed Balancing While balancing is active, the Start button (see Figure 10) will change to Stop, in case the user wishes to pause the balancing operation. Selecting the Reset button will reset all of the balance timers to 0 and all of the cell balance modes to NONE. The user can load and store several timed balance profiles in the Board Configuration control (see Figure 11). The Imbalance Cells button in this control will load a pattern of charging and discharging cells. The user can then manually configure the Timed Balance controls to correct for the imbalance created by this button. The user can save their Timed Balance configuration and reload it later. The configuration will also save the over and undervoltage settings, as well as the disabled cell configuration. Figure 12. Data Log Control Although each DC2100A will balance with currents similar to those listed in Table 1, each board was tested upon manufacture and its actual balancing currents are stored within the DC2100A. These currents can be accessed by pressing the Calibration Data button on the Control Panel, which will then launch the Calibration Data window (see Figure 31). In this window the user has the ability to enter new calibration current values, or reset the currents to the dc2100afc 8 DEMO MANUAL DC2100A quick start procedure values from Table 1. It is not recommended to change these, however, from the factory measured settings. The capacity of each cell can also be stored in the DC2100A. The capacity and balance currents will be used in a later release of firmware for the DC2100A-C, which will employ an autonomous balancing algorithm. The DC2100A GUI installed with the QuikEval software, will always contain the most up to date version of Firmware for the DC2100A. In order to update the firmware, press the Update Firmware button in the Control Panel. Figure 13. Update Firmware Button After confirming that the Firmware should be updated, a command line window will be launched in which the PIC18 on the DC2100A is first erased, and then reprogrammed.Do not remove power from the DC2100A while the Firmware is being updated. connected to the BOT6_TS turret with its return path the V- turret while Cells 7 through 12 are connected to the TOP6_TS turret with its return path the C6 turret. These isolated power sources simulate a stack of cells from 3 to 12 cells. The primary side connection of the cell balancers are connected to a string of power sources that simulate the battery stack. Cell 1 power source is a two wire connection that connects the positive node, through a current sensing resistor (0.01Ω), to the C1 turret, and the negative node to the V- turret. Remote sense connections for power sources with remote sensing capabilities should be connected to the C1 and V- respectively. All other connections of the simulated string of cells connect their positive node, through a current sensing resistor (0.01Ω), to respective turrets. Cell voltage measurements should be made across the C(x) and C(x-1) turrets of the respective cells. Stack voltage measurements should be made at the BOT6_TS and TOP6_TS turrets and their return path turret. To calculate cell balancer efficiency use the expressions below: Cells 1-6 Charge Mode Efficiency 1 = Vm1 • Vm2 •10 •100% Vm3 • Vm4 Discharge Mode Figure 14. Firmware Update Window Cell Balancer Efficiency Measurements Figure 35 shows the proper connections for measuring the efficiency of a cell balancer. The secondary of the cell balancer connects to the top of stack. This connection needs to be to an isolated power source through a current sensing resistor (0.10Ω). Cells 1 through 6 are Efficiency 1 = Vm3 • Vm4 •100% Vm1 • Vm2 •10 Cells 7-12 Charge Mode Efficiency 11 = Vm5 • Vm6 •10 •100% Vm7 • Vm8 Discharge Mode Efficiency 11 = Vm7 • Vm8 •100% Vm5 • Vm6 •10 dc2100afc 9 DEMO MANUAL DC2100A quick start procedure Cell Balancer Performance Measurements Table 2 through Table 5 present the typical operational data for a 12 cell and 6 cell balancer in both Discharge and Charge modes. The cell voltages were 3.6V and measurements of Cell Current, Stack Current, Operating Frequency were taken and transfer Efficiency was calculated from the data. Figure 15 through Figure 18 are actual in-circuit waveforms taken on Cell 1 and Cell 7 while operating in both modes. The waveforms present voltage on the primary side and secondary side MOSFET’s drain to source voltage and the primary side and secondary side current sense inputs to the LTC3300-1. Figure 14 through Figure 22 are cell and stack currents taken over a range of cell voltages from 2.6V to 4.0V. The RTONP and RTONS resistors were set for 2.6V cell voltage operation. All cells were set to the cell voltage under test. The slight negative slope in current at higher voltages is due to the increased operating frequency and the circuit delays and dead time becoming a higher percentage of the operating period. Table 2. Typical 12 Cell Discharge Data Cell I (A) Stack I (A) Frequency (KHz) 4.250 0.311 95.7 Efficiency Table 3. Typical 12 Cell Charge Data Cell I (A) Stack I (A) Frequency (KHz) 3.960 0.367 106.6 Efficiency 89.7% Figure 16. 12 Cell Charge Waveforms Table 4. Typical 6 Cell Discharge Data Cell I (A) Stack I (A) Frequency (KHz) 4.000 0.577 88.6 Efficiency 88.4% 87.9% Figure 17. 6 Cell Discharge Waveforms Figure 15. 12 Cell Discharge Waveforms dc2100afc 10 DEMO MANUAL DC2100A quick start procedure 1.000 Table 5. Typical 6 Cell Charge Data Stack I (A) Frequency (KHz) 3.430 0.619 91.2 12 CELLS 6 CELLS 0.900 Efficiency 0.800 91.8% STACK CURRENT Cell I (A) 0.700 0.600 0.500 0.400 0.300 0.200 0.100 2.6 2.8 3.0 3.2 3.4 3.6 CELL VOLTAGE 3.8 4.0 dc2100a F18 Figure 20. Stack Discharge Current 5.000 Figure 18. 6 Cell Charge Waveforms 12 CELLS 6 CELLS 4.500 4.000 3.500 3.000 4.500 2.500 3.500 2.000 2.6 3.000 2.8 3.0 3.2 3.4 3.6 CELL VOLTAGE 2.000 2.6 3.8 4.0 dc2100a F19 2.500 Figure 21. Cell Charge Current 2.8 3.0 3.2 3.4 3.6 CELL VOLTAGE 3.8 4.0 1.000 dc2100a F17 12 CELLS 6 CELLS 0.900 Figure 19. Cell Discharge Current 0.800 STACK CURRENT CELL CURRENT 4.500 CELL CURRENT 5.000 12 CELLS 6 CELLS 0.700 0.600 0.500 0.400 0.300 0.200 0.100 2.6 2.8 3.0 3.2 3.4 3.6 CELL VOLTAGE 3.8 4.0 dc2100a F20 Figure 22. Stack Charge Current dc2100afc 11 DEMO MANUAL DC2100A quick start procedure Two or More Board Setup and Operation When connecting two or more DC2100A boards together, the interface cables must be connected in sequence as shown in Figure 23 to avoid large inrush currents. When connecting more than one DC2100A’s into a system containing more than 12 batteries, DC2100A-D are used in locations 2 through 8. The PC USB port is connected to the bottom DC2100A-C (J19) board first and then the next DC2100A-D (J18) may be connected to the bottom DC2100A-C (J1) with a CAT-5 cable. CAT-5 cables are used for communication connects between all DC2100A demo boards in the system. J1 is the output port while J18 is the input port. The Top DC2100A-D must have the JP6 in position 1. All other DC2100A will have JP6 in position 0. cells controlled by the U1, the lower LTC3300-1, and U2, the upper LTC3300-1 are operational, an overvoltage can occur on Cell 7. The overvoltage on Cell 7 will shut down the operation of Cell 7 – Cell 12 but Cell 1 – Cell 6 will continue to operate. The overvoltage sensing circuit Q4, D8, D10 and R56 will turn off Cell 1 – Cell 6 through the internal overvoltage protection circuit within the LTC3300-1 of U1. TOP6_T C12 CELL 24 DC2100A-D BOT6_T The 24 cell should be interconnected as shown in Figure 24 to allow balancing between the two 12 cell stacks. C1 J1 J18 J19 CELL 18 CELL 13 V– Additional Circuitry Additional circuitry has been added to increase the robustness of the design for fault insertions. CAT 5 TOP6_T Cell 6 Wire Disconnection C12 A 10A 200V Schottky diode has been added for a high current path when the connection between battery cells is broken when a battery stack load is present. The 200V reverse voltage rating of the diode was selected to minimize the reverse leakage current with cell voltage of 4V. The 10A current rating was selected for its low forward voltage drop which will minimize the current in the parallel diode within the LTC3300-1 as well as surviving the fusing current of the 12A cell fuses on the DC2100A. DC2100A-C BOT6_T CELL 6 INSTALL R23 0Ω C1 J1 CAT-5 CABLE J18 CAT 5 Two overvoltage detection circuits have been added to the design that will sense an overvoltage condition on Cell 6 and Cell 7 when a disconnection of the Cell 6 wire connection between Cell 6 + and Cell 7- of the battery stack occurs. When Cell 6 is being discharged and other TOP BOARD DC2100A-D CELL 12 J19 V– CELL 1 USB PC Figure 24. 24 Cell Interconnecting Stacks BOTTOM BOARD DC2100A-C USB PC Figure 23. Two DC2100A SPI Connection dc2100afc 12 DEMO MANUAL DC2100A quick start procedure A similar event occurs when Cell 6 is operating in the Charge Mode and other cells controlled by the U1, the lower LTC3300-1, and U2, the upper LTC3300-1 are operational, an overvoltage can occur on Cell 6. The overvoltage on Cell 6 will shut down the operation of Cell 1 – Cell 6 but Cell 7– Cell 12 will continue to operate. The overvoltage sensing circuit Q5, Q6, D12, D13 and R58 will turn off the operations of Cell 7 – Cell 12 through the internal overvoltage protection circuit within the LTC3300-1 of U2. Cell Bypass Capacitors The DC2100A contains bypass capacitors from the cell connections and the stack connections. These capacitors have a dual function of smoothing the high triangular current wave before the current travels down the interconnecting wires to the cells and they also help balance the voltage between cells when hot-plugging cells in a random order. The RMS current rating of these capacitors is a critical parameter for these bypass capacitors as well as their physical size. These high triangular current waveforms produce an RMS current that passes through the capacitors which result in an internal heat rise. Larger physical size MLCC capacitors have higher RMS current rating due to their greater surface area to dissipate the heat rise. The capacitance of MLCC capacitors decreases with applied voltage and this must be taken into account when selecting the capacitance value. If a connection is lost during balancing, the differential voltage seen by the LTC3300-1 power circuit on each side of the break may increase or decrease depending on whether the power stage is charging or discharging and where the break occurred. The worst-case scenario is when the balancers on each side of the break are active and balancing in opposite directions. Here the differential voltage will increase rapidly on one side and decrease rapidly on the other. The LTC3300-1 contains an overvoltage protection comparator which monitors the cell voltage and will shut down all balancers before the differential voltage on any cell input reaches the maximum absolute voltage rating. Each cell node must have an equivalent capacitance across it to prevent an overvoltage condition when randomly connecting cells to the LTC3300-1 battery balancer circuit. In addition to the smoothing capacitors across each balancer power circuit, there are capacitor across the Cx pins of the LTC3300-1 to reduce high frequency noise on these pins and capacitors across adjacent cells to act as a reservoir of charge for the cell’s MOSFET gate circuit. These reservoir capacitors must also be of equal value to maintain the balancing of voltage and a capacitor of 2x the value of the reservoir capacitors must be connected between C1 and V– of the lowest LTC3300-1 and from the top cell to the cell below it to insure an equal voltage across all cells when the battery stack is initially connected. Figures 25 and 26 detail these capacitor connections and their values. The reservoir capacitors must be large compared to the capacitors across the Cx pins to force the MOSFET gate driver charging current to flow through the reservoir capacitors. An effective 10:1 ratio between these cell capacitors was selected when considering that a capacitor across two cells would result in a 5:1 ratio. Temperature Monitor The DC2100A has the ability to monitor 12 temperature locations within the battery pack. The GUI Control Panel Window, Figure 29, displays these temperatures in two temperature displays, item 16 of Figure 29, for 6 temperature locations. The DC2100A contains a daughter card that can be used to connect twisted pair wires to twelve 10K NTC thermistors, Vishay NTHS0603N01N1002JE or equivalent, within the battery pack. The daughter card is shipped with fixed resistors to simulate temperature readings within a battery pack. These resistor values are selected to display the range of possible temperatures that may be measured. When connecting the daughter card to the actual thermistor, these resistors should be removed and the twisted pair wires connected to the turrets provided. dc2100afc 13 DEMO MANUAL DC2100A quick start procedure 1 C4 0.22µF 16V 0603 1 D2 CMMSH2-40 2 2 CMMSH2-40 R5 R6 6.81 0 OPT C3 0.1µF 16V 0402 C6 G6P I6P 41 40 39 38 37 42 – BOOST+ C6 G6P I6P BOOST BOOST 36 C5 35 G5P 34 I5P 33 C4 32 G4P 31 I4P 30 C3 29 G3P 28 I3P 27 C2 26 G2P 25 I2P C6K 1µF 16V 0603 C5K 1µF 16V 0603 G5P I5P I4P G3P I3P G2P C10 4.7µF 16V 0805 C11 4.7µF 16V 0805 C4 C3 C2 C2K 1µF 16V 0603 I2P C1K 1µF 16V 0603 C5 C9 4.7µF 16V 0805 C4K 1µF 16V 0603 C3K 1µF 16V 0603 G4P SDO WDT V – I1P G1P C1 19 20 21 22 23 24 WDTA D1 C12 4.7µF 16V 0805 C23 10µF 10V 0805 C1 C14 4.7µF 16V 0805 DC2100a F25 I1P G1P Figure 25. Bypass Capacitors on Lowest LTC3300-1 1 C8 0.22µF 16V 0603 1 2 CMMSH2-40 R9 0 OPT C7 0.1µF 16V 0402 D4 CMMSH2-40 2 R10 6.81 C12 G12P I12P 41 40 39 38 37 42 BOOST BOOST– BOOST+ C6 G6P I6P 36 C5 35 G5P 34 I5P 33 C4 32 G4P 31 I4P 30 C3 29 G3P 28 I3P 27 C2 26 G2P 25 I2P C12K 1µF 16V 0603 G11P I11P G10P I10P G9P I9P G8P I8P SDO WDT V – I1P G1P C1 19 20 21 22 23 24 C7K 1µF 16V 0603 WDTC D3 C11K 1µF 16V 0603 C10K 1µF 16V 0603 C9K 1µF 16V 0603 C8K 1µF 16V 0603 C24 10µF 10V 0805 C11 C15 4.7µF 16V 0805 C16 4.7µF 16V 0805 C17 4.7µF 16V 0805 C9 C8 C18 4.7µF 16V 0805 C20 4.7µF 16V 0805 I7P G7P C6 C10 C5 C7 C13 4.7µF 16V 0805 DC2100a F26 Figure 26. Bypass Capacitors on the Top LTC3300-1 dc2100afc 14 DEMO MANUAL DC2100A quick start procedure Figure 27. Thermistor Board Location dc2100afc 15 DEMO MANUAL DC2100A quick start procedure 1. CONTROL PANEL WINDOW – FIGURE 28 (CELLS TAB) 2. CONTROL PANEL WINDOW – FIGURE 29 (GLOBAL CHANNEL MONITOR TAB) 3. CALIBRATION DATA WINDOW - FIGURE 30 4. EVENT LOG WINDOW - FIGURE 31 5. GRAPH VIEW WINDOW - FIGURE 32 Figure 28. GUI Navigation dc2100afc 16 DEMO MANUAL DC2100A quick start procedure 1. SYSTEM TREE VIEW 11. NOMINAL BALANCE CURRENTS DISPLAY 2. BOARD STATUS LED 12. OVER AND UNDER VOLTAGE SETTING CONTROLS 3. SELECTED BOARD INDICATOR 13. VOLTAGE DISPLAY CONTROLS 4. BOARD IDENTIFICATION DISPLAY 14. CELL STATE COLOR KEY 5. DATA DISPLAY TABS 15. BOARD CONFIGURATION 6. FIRMWARE UPGRADE BUTTON 16. LTC3300-1 REGISTER DISPLAY (2 INSTANCES FOR 2 ICS ON DC2100A) 7. CALIBRATION DATA WINDOW BUTTON 17. BALANCE MODE SELECT BOXES (2 GROUPS, WITH 6 CELLS IN EACH GROUP) 8. EVENT LOG WINDOW BUTTON 18. TEMPERATURE DISPLAY (2 GROUPS, WITH 6 TEMPERATURES IN EACH GROUP) 9. GRAPH VIEW WINDOW BUTTON 19. MANUAL AND TIMED BALANCE CONTROLS 10. DATA LOGGING CONTROLS Figure 29. Control Panel Window – Cells Tab View dc2100afc 17 DEMO MANUAL DC2100A quick start procedure 1. SYSTEM TREE VIEW 8. EVENT LOG WINDOW BUTTON 2. BOARD STATUS LED 9. GRAPH VIEW WINDOW BUTTON 3. SELECTED BOARD INDICATOR 10. DATA LOGGING CONTROLS 4. BOARD IDENTIFICATION DISPLAY 11. NOMINAL BALANCE CURRENTS DISPLAY 5. DATA DISPLAY TABS 12. OVER AND UNDER VOLTAGE SETTING CONTROLS 6. FIRMWARE UPGRADE BUTTON 13. CELL VOLTAGE DISPLAY GRID 7. CALIBRATION DATA WINDOW BUTTON Figure 30. Control Panel Window – Global Channel Monitor View dc2100afc 18 DEMO MANUAL DC2100A quick start procedure 1. CELL CAPACITY DATA GRID 2. BALANCE CURRENT DATA GRID 3. SELECTED BOARD INDICATOR 4. CANCEL BUTTON 5. CELL CAPACITY CALIBRATION CONTROLS 6. BALANCE CURRENT CALIBRATION CONTROLS Figure 31. Calibration Data Window 1. EVENT LOG DATA 2. LOG CLEAR CONTROL 3. LOG FILE CONTROL Figure 32. Event Log Window dc2100afc 19 DEMO MANUAL DC2100A quick start procedure 5. BOARD TEMPERATURE SELECTION BOXES 1. GRAPH DISPLAY 2. STACK SUMMARY DATA SELECTION BOXES 6. GRAPH DATA CONTROLS 3. BOARD SUMMARY DATA SELECTION BOXES 7. SELECTED BOARD INDICATOR 4. BOARD CELL VOLTAGE SELECTION BOXES Figure 33. Graph View Window dc2100afc 20 DEMO MANUAL DC2100A quick start procedure CURRENT PROBE CONNECTIONS FOR MEASURING STACK CURRENTS CELL 12 CELL 11 CELL 10 CELL 9 CELL 8 CELL 7 CELL 6 CELL 5 SYSTEM SETUP REQUIREMENTS: LFP OR LI-ION BATTERY >= 20AHr INTERNAL RESISTANCE < 20mΩ RECOMMENDED BATTERY SIMULATOR: POWER SUPPLY 2V TO 5.0 V ±10A INTERCONNECT RESISTANCE < 20mΩ CELL 4 CELL 3 CELL 2 CURRENT PROBE CONNECTIONS FOR MEASURING CELL CURRENTS CELL 1 TO PC’S USB PORT NOTE: ALL CONNECTIONS FROM EQUIPMENT SHOULD BE KELVIN CONNECTED DIRECTLY TO THE BOARD PINS WHICH THEY ARE CONNECTED TO ON THIS DIAGRAM AND ANY INPUT, OR OUTPUT, LEADS SHOULD BE TWISTED PAIR, WHERE POSSIBLE. Figure 34. Proper Measurement Equipment Setup for Bi-Directional Cell Balancer dc2100afc 21 DEMO MANUAL DC2100A quick start procedure – VM8 +VM6– + + CELL 12 0.10Ω – 0.01Ω – + VM7 CELL 11 VM5 CELL 10 CELL 9 CELL 8 CELL 7 0.1Ω +VM4– SYSTEM SETUP REQUIREMENTS: LFP OR LI-ION BATTERY >= 20AHr INTERNAL RESISTANCE < 20mΩ RECOMMENDED BATTERY SIMULATOR: POWER SUPPLY 2V TO 5.0 V ±10A INTERCONNECT RESISTANCE < 20mΩ CELL 6 CELL 5 – VM3 + PS1 150Ω 20W CELL 4 CELL 3 +VM2– + – VM1 0.01Ω CELL 2 CELL 1 TO PC’S USB PORT Figure 35. Proper Equipment Setup for Cell Balancer Efficiency Measurements dc2100afc 22 DEMO MANUAL DC2100A quick start procedure SYSTEM SETUP REQUIREMENTS: LFP OR LI-ION BATTERY >= 20AHr INTERNAL RESISTANCE < 20mΩ RECOMMENDED BATTERY SIMULATOR: POWER SUPPLY 2V TO 5.0 V ±10A INTERCONNECT RESISTANCE < 20mΩ 0.1Ω +VM4– CELL 4 CELL 3 – VM3 +VM2– + – VM1 0.01Ω + PS1 150Ω 20W CELL 2 CELL 1 TO PC’S USB PORT Figure 36. Proper Equipment Setup for Minimum Number (4) of Cell Efficiency Measurements dc2100afc 23 DEMO MANUAL DC2100A quick start procedure CURRENT PROBE CONNECTIONS FOR MEASURING STACK CURRENT CELL 4 CURRENT PROBE CONNECTIONS FOR MEASURING CELL CURRENTS CELL 3 CELL 2 SYSTEM SETUP REQUIREMENTS: LFP OR LI-ION BATTERY >= 20AHr INTERNAL RESISTANCE < 20mΩ RECOMMENDED BATTERY SIMULATOR: CELL 1 POWER SUPPLY 2V TO 5.0 V ±10A INTERCONNECT RESISTANCE < 20mΩ TO PC’S USB PORT Figure 37. Configuring the Board for 4 Cells dc2100afc 24 DEMO MANUAL DC2100A quick start procedure CURRENT PROBE CONNECTIONS FOR MEASURING STACK CURRENT CELL 5 CURRENT PROBE CONNECTIONS FOR MEASURING CELL CURRENTS CELL 4 CELL 3 SYSTEM SETUP REQUIREMENTS: LFP OR LI-ION BATTERY >= 20AHr INTERNAL RESISTANCE < 20mΩ CELL 2 RECOMMENDED BATTERY SIMULATOR: POWER SUPPLY 2V TO 5.0 V ±10A INTERCONNECT RESISTANCE < 20mΩ CELL 1 TO PC’S USB PORT Figure 38. Configuring the Board for 5 Cells dc2100afc 25 DEMO MANUAL DC2100A quick start procedure CURRENT PROBE CONNECTIONS FOR MEASURING STACK CURRENT CELL 6 CURRENT PROBE CONNECTIONS FOR MEASURING CELL CURRENTS CELL 5 CELL 4 SYSTEM SETUP REQUIREMENTS: LFP OR LI-ION BATTERY >= 20AHr INTERNAL RESISTANCE < 20mΩ CELL 3 RECOMMENDED BATTERY SIMULATOR: POWER SUPPLY 2V TO 5.0 V ±10A INTERCONNECT RESISTANCE < 20mΩ CELL 2 CELL 1 TO PC’S USB PORT Figure 39. Configuring the Board for 6 Cells dc2100afc 26 DEMO MANUAL DC2100A quick start procedure CURRENT PROBE CONNECTIONS FOR MEASURING STACK CURRENTS CELL 7 CELL 6 CELL 5 CELL 4 CURRENT PROBE CONNECTIONS FOR MEASURING CELL CURRENTS CELL 3 CELL 2 CELL 1 SYSTEM SETUP REQUIREMENTS: LFP OR LI-ION BATTERY >= 20AHr INTERNAL RESISTANCE < 20mΩ RECOMMENDED BATTERY SIMULATOR: POWER SUPPLY 2V TO 5.0 V ±10A INTERCONNECT RESISTANCE < 20mΩ TO PC’S USB PORT Figure 40. Configuring the Board for 7 Cells dc2100afc 27 DEMO MANUAL DC2100A quick start procedure CURRENT PROBE CONNECTIONS FOR MEASURING STACK CURRENTS CELL 8 CELL 7 CELL 6 CELL 5 CURRENT PROBE CONNECTIONS FOR MEASURING CELL CURRENTS CELL 4 CELL 3 CELL 2 SYSTEM SETUP REQUIREMENTS: LFP OR LI-ION BATTERY >= 20AHr INTERNAL RESISTANCE < 20mΩ RECOMMENDED BATTERY SIMULATOR: POWER SUPPLY 2V TO 5.0 V ±10A INTERCONNECT RESISTANCE < 20mΩ CELL 1 TO PC’S USB PORT Figure 41. Configuring the Board for 8 Cells dc2100afc 28 DEMO MANUAL DC2100A quick start procedure CURRENT PROBE CONNECTIONS FOR MEASURING STACK CURRENTS CELL 9 CELL 8 CELL 7 CELL 6 CELL 5 CURRENT PROBE CONNECTIONS FOR MEASURING CELL CURRENTS CELL 4 CELL 3 CELL 2 SYSTEM SETUP REQUIREMENTS: LFP OR LI-ION BATTERY >= 20AHr INTERNAL RESISTANCE < 20mΩ RECOMMENDED BATTERY SIMULATOR: POWER SUPPLY 2V TO 5.0 V ±10A INTERCONNECT RESISTANCE < 20mΩ CELL 1 TO PC’S USB PORT Figure 42. Configuring the Board for 9 Cells dc2100afc 29 DEMO MANUAL DC2100A quick start procedure CURRENT PROBE CONNECTIONS FOR MEASURING STACK CURRENTS CELL 10 CELL 9 CELL 8 CELL 7 CELL 6 CURRENT PROBE CONNECTIONS FOR MEASURING CELL CURRENTS CELL 5 CELL 4 CELL 3 SYSTEM SETUP REQUIREMENTS: LFP OR LI-ION BATTERY >= 20AHr INTERNAL RESISTANCE < 20mΩ RECOMMENDED BATTERY SIMULATOR: POWER SUPPLY 2V TO 5.0 V ±10A INTERCONNECT RESISTANCE < 20mΩ CELL 2 CELL 1 TO PC’S USB PORT Figure 43. Configuring the Board for 10 Cells dc2100afc 30 DEMO MANUAL DC2100A Quick Start Procedure CURRENT PROBE CONNECTIONS FOR MEASURING STACK CURRENTS CELL 11 CELL 10 CELL 9 CELL 8 CELL 7 CELL 6 CURRENT PROBE CONNECTIONS FOR MEASURING CELL CURRENTS CELL 5 CELL 4 CELL 3 SYSTEM SETUP REQUIREMENTS: LFP OR LI-ION BATTERY >= 20AHr INTERNAL RESISTANCE < 20mΩ RECOMMENDED BATTERY SIMULATOR: POWER SUPPLY 2V TO 5.0 V ±10A INTERCONNECT RESISTANCE < 20mΩ CELL 2 CELL 1 TO PC’S USB PORT Figure 44. Configuring the Board for 11 Cells dc2100afc 31 DEMO MANUAL DC2100A PCB Layout Top Silk Screen Bottom Silk Screen dc2100afc 32 DEMO MANUAL DC2100A PCB Layout Layer 1 Layer 2 dc2100afc 33 DEMO MANUAL DC2100A PCB Layout Layer 3 Layer 4 dc2100afc 34 DEMO MANUAL DC2100A Parts List ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER CAP.,X5R, 100µF, 6.3V, 20%, 1210 MURATA, GRM32ER60J107ME20L Required Circuit Components 1 24 C1A-C12A, C1B-C12B 2 24 C1E-C12E, C1F-C12F CAP.,X7R, 470PF, 100V, 10%, 0603 AVX, 06031C471KAT2A 3 12 C1G-C12G CAP.,X7R, 2200PF, 50V, 10%, 0402 MURATA, GRM155R71H222KA01D 4 12 C1H-C12H CAP.,X7R, 470PF, 50V, 10%, 0402 MURATA, GRM155R71H471KA01D 5 13 C1M-C13M CAP.,X7R, 0.01µF, 25V,10%, 0603 MURATA, GRM188R71E103KA01D 6 12 C1R-C12R CAP.,X7R, 2.2µF, 100V,10%, 1210 MURATA, GRM32ER72A225KA35L 7 14 C1, C5, C1K-C12K CAP.,X7R, 1.0µF, 16V,10%, 0603 MURATA, GRM188R71C105KA12D 8 13 C2, C6, C9-C18, C20 CAP.,X5R, 4.7µF, 16V,10%, 1206 MURATA, GRM31CR71C475KA01L 9 2 C3, C7 CAP, X7R, 0.1µF, 16V, 10% 0402 MURATA, GRM155R71C104KA88D 10 2 C4, C8 CAP.,X7R, 0.22µF, 16V,10%, 0603 TDK, C1608X7R1C224K 11 2 C19, C22 CAP., X7R, 470PF, 250VAC, 10%, 1808 MURATA, GA342QR7GF471KW01L 12 2 C23, C24 CAP.,X7R, 10µF, 10V,10%, 0805 MURATA, GRM21BR71A106K51L 13 2 C25, C26 CAP., X7R, 0.1µF, 100V, 10%, 0805 AVX, 08051C104KAT2A 14 4 C27, C33, C50, C51 CAP.,X7R, 0.1µF, 25V,10%, 0603 MURATA, GRM188R71E103KA01D 15 3 C28, C29, C31 CAP.,X5R, 1µF, 25V,10%, 0603 TDK, C1608X5R1E105K 16 3 C30, C39, C46 CAP, X5R, 10µF, 6.3V, 20%, 0603 MURATA, GRM188R71C105KA12D 17 6 C34-C38, C45 CAP, X7R, 0.1µF, 16V, 20%, 0402 AVX, 0402YC104MAT2A 18 1 C42 CAP.X5R, 047µF, 16V, 10%, 0402 TDK, C1005X5R1A474K 19 2 C43, C44 CAP,C0G, 22PF, 50V, 0402 MURATA, GRM1555C1H220JZ01D 20 2 C47, C48 CAP, X5R, 1.0µF, 6.3V, 10%, 0603 TAIYO YUDEN, JMK105BJ105KV 21 12 D1E-D12E DIODE, SBR,200, 10A, POWERDI5 DIODES INC, SBR10U200P5-13 22 4 D1-D4 SMD, SCHOTTKY CENTRAL SEMI, CMMSH2-40 23 3 D5-D7 SMD, SILICON SWITCHING DIODE VISHAY, RS07J 24 2 D8, D12 SMD, SILICON ZENER, 5.1V CENTRAL SEMI, CMHZ4689 25 2 D10, D13 SMD, SCHOTTKY, 70V CENTRAL SEMI, CMOD6263 TR 26 2 D9, D11 DIODE, ZENER 5.6V, 400MW, SOD323 PHILIPS, PDZ5.6B 27 1 D14 DIODE, SWITCHING, 1.0mm × 0.6mm DFN2 DIODES INC, 1N4448HLP 28 25 D1D-D12D, D1F-D12F, D15 LED,GREEN, CLEAR 0603 SMD LITE-ON, LTST-C190KGKT 29 1 D16 LED, YELLOW ORANGE CLEAR 0603 SMD LITE-ON, LTST-C190KFKT 30 13 F1-F12, F15 SMD, FUSE, 12.0A, FAST ACTING, 1206 BUSSMANN, 3216FF12-R 31 2 F13, F14 SMD, FUSE, 7.0A, FAST ACTING, 1206 BUSSMANN, 3216FF7-R 32 1 J1 CONN MOD JACK R/A 8P8C SHIELDED RJ45 WÜRTH, 615008140121 33 1 J19 USB, B RECEPTACLE, RT, SMT WÜRTH, 651005136521 34 1 J20 HEADER, 2mm, 2 × 3 TH HEADER WÜRTH, 62000621121 35 1 J21 HEADER, 2mm, 2 × 8 TH HEADER WÜRTH, 62501621621 36 1 J22 HEADER, 2mm, 2 × 2, TH HEADER MOLEX, 87831-0420 37 1 PB1 SWITCH TACTILE SPST-NO 0.05A 12V WÜRTH, 434111025826 38 12 R1A-R12A RES, CHIP, 20Ω, 1/4W, 5%,1206 VISHAY, CRCW120620R0JNEA 39 12 R1B-R12B OPT RES, CHIP,18Ω, 1/4W, 5%, 1206 VISHAY, CRCW120618R0JNEA 40 24 R1C-R12C, R1F-R12F RES, CHIP, 5.1Ω, 1/16W, 5%, 0402 VISHAY, CRCW04025R10JNED 41 24 R1G-R12G, R1H-R12H RES, CHIP, 20Ω, 1/16W, 5%, 0402 VISHAY, CRCW040220R0JNED dc2100afc 35 DEMO MANUAL DC2100A Parts List ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER 42 14 R1J-R12J, R56, R58 RES, CHIP, 2.0k, 1/16W, 5%, 0402 VISHAY, CRCW04022K00JNED 43 16 R1K-R13K, R27, R28, R37 RES, CHIP, 100Ω, 1/16W, 5%, 0402 VISHAY, CRCW0402100RJNED 44 12 R1L-R12L RES, CHIP, 470Ω, 1/16W, 5%, 0402 VISHAY, CRCW0402470RJNED 45 12 R1M-R12M RES, CHIP, 33Ω, 1W, 5%, 2512 VISHAY, CRCW251233R0JNEG 46 12 R1N-R12N RES, CHIP, 3.3k, 1/16W, 5%, 0402 VISHAY, CRCW04023K30JNED 47 1 R2 RES, CHIP, 0Ω, JUMPER, 1/16W, 5%, 0402 VISHAY, CRCW04020000Z0ED 48 2 R4, R8 RES, CHIP, 1.27M, 1/8W, 1%, 0805 VISHAY, CRCW08051M27FKED 49 2 R6, R10 RES,CHIP, 6.81Ω, 1/16W, 1%, 0402 VISHAY, CRCW04026R81FKED 50 8 R11-R18 RES, CHIP, 0Ω, 2512 VISHAY, CRCW25120000Z0EG 51 3 R19, R21, R24 RES, CHIP, 23.7k, 1/16W, 1%, 0402 VISHAY, CRCW040223K7FKED 52 2 R20, R22 RES, CHIP, 33.2K, 1/16W, 1%, 0402 VISHAY, CRCW040233K2FKED 53 2 R25, R26 RES, CHIP, 60.4Ω, 1/10W, 1%, 0603 VISHAY, CRCW060360R4FKED 54 2 R29, R63 RES, CHIP, 60.4Ω, 1/16W, 1%, 0402 VISHAY, CRCW040260R4FKED 55 4 R30, R31, R40, R41 RES, CHIP, 1.00M, 1/16W, 5%, 0402 VISHAY, CRCW04021M00JNED 56 2 R32, R39 RES, CHIP, 1.40k, 1/16W, 1%, 0402 VISHAY, CRCW04021K40JKED 57 2 R33, R38 RES, CHIP, 604Ω, 1/16W, 1%, 0402 VISHAY, CRCW0402604RJKED 58 5 R34, R36, R47, R61, R62 RES, CHIP, 2.0k, 1/16W, 5%, 0402 VISHAY, CRCW04022K00JNED 59 1 R35 RES, CHIP, 10k, 1/16W, 1%, 0402 VISHAY, CRCW040210K0FKED 60 6 R42, R43, R50-R52, R60 RES, CHIP, 10.0k, 1/16W, 5%, 0402 VISHAY, CRCW040210K0JNED 61 1 R44 RES, CHIP, 1.0Ω, 1/16W, 5%, 0402 VISHAY, CRCW04021R00JNED 62 1 R49 RES, CHIP, 1.0k, 1/16W, 5%, 0402 VISHAY, CRCW04021K00JNED 63 1 R53 RES, CHIP, 100k, 1/16W, 1%, 0402 VISHAY, CRCW0402100KFKED 64 2 R54, R55 RES, CHIP, 20Ω, 1/10W, 5%, 0603 VISHAY, CRCW060320R0JNEA 65 1 R59 RES, CHIP, 5.1k, 1/16W, 5%, 0402 VISHAY, CRCW04025K10JNED 66 1 R64 RES, CHIP, 2.49k, 1/16W, 1%, 0402 VISHAY, CRCW04022K49FKED 67 1 R65 RES, CHIP, 1.00M, 1/16W, 1%, 0402 VISHAY, CRCW04021M00FKED 68 1 R66 RES, CHIP, 301, 1/10W, 1%, 0603 VISHAY, CRCW0603301RFKED 69 12 RS1A-RS12A RES, CHIP, 5mΩ, 1W, 1%, 1206 SUSUMU, PRL1632-R005-F 70 12 RS1B-RS12B RES, CHIP, 10mΩ, 1W, 1%, 1206 SUSUMU, PRL1632-R010-F 71 12 Q1A-Q12A MOSFET, 100V, 0.0087Ω, 60A, POWERPAK-SO8 VISHAY, SiR882ADP-GE3 72 12 Q1B-Q12B MOSFET, 100V, 0.058Ω, 25A, POWERPAK-1212-8 VISHAY, SiS892ADN-GE3 73 12 Q1C-Q12C MOSFET, P-CHANNEL 30V, 80MΩ, MPAK INFINEON, BSS308PEH6327XT 74 2 Q1, Q2 MOSFET, 100V, 10Ω, SOT-323 DIODES INC, BSS123W-7-F 75 1 Q3 TRANS. NPN, 180V, 0.6A, SOT-223 CENTRAL SEMI, CZT5551 76 1 Q4 TRANS, PNP, 60V, SOT-23 CENTRAL SEMI, CMPT3906E 77 1 Q5 MOSFET, P-CHANNEL 50V, 4Ω, SOT-23 CENTRAL SEMI, CMPDM8002A 78 2 Q6, Q7 TRANS, NPN, 60V, SOT-23 CENTRAL SEMI, CMPT3904E 79 1 Q8 MOSFET, 100V, 10Ω, SOT-323 DIODES INC, BSS123W 80 12 T1-T12 TRANSFORMER, 1:1, 3.0µH, 10.8A WÜRTH, 750312504 81 1 T13, T15 TRANSFORMER, ISOLATION PULSE ENG., PE-68386NLT 82 1 T14 IND., CHOKE COM MODE 22µH, 1.2kΩ SMD TDK, ACT458-220-2P-TL003 dc2100afc 36 DEMO MANUAL DC2100A Parts List ITEM QTY 83 2 REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER U1, U2 IC,SMT, BI-DIRECTIONAL BATTERY BALANCER LINEAR, LTC3300ILXE-1#PBF 84 1 U3 IC,SMT, BATTERY MONITOR LINEAR, LTC6804IG-2#PBF 85 1 U4 IC,SMT, 24AA64 MICROCHIP TECH. 24AA64T-I/OT 86 1 U5 IC,SMT, isospi ISOLATED COMM. INTERFACE LINEAR, LTC6820IMS#PBF 87 2 U6, U7 IC,SMT, 8-CHANNEL MUX, SSOP-16 LINEAR, LTC1380CGN#PBF 88 1 U8 MODULE, USB ISOLATOR LINEAR, LTM2884CY#PBF 89 1 U9 IC,SMT, MICRO POWER VLDO, 3.3V, SOT23-5 LINEAR, LT1761ES5-3.3#PBF 90 1 U10 14-Bit uc w/usb, 8mm × 8mm QFN44 MICROCHIP, PIC18F47J53-I/ML 91 1 Y1 12MHz CRYSTAL ECS INC, ECS-120-20-3X Components and Hardware for Demo Board Only 1 15 E1-E15 TURRET, 0.09" MIL-MAX, 2501-2-00-80-00-00-07-0 2 1 J17 HEADER, SMD, 1 × 15, TIN PLATED, RT ANGLE HIROSE, DF3DZ-15P-2(21) 3 6 JP1-JP6 HEADER, 3PINS, 2mm WÜRTH, 62000311121 4 6 JP1-JP6 SHUNT 2mm WÜRTH, 60800213421 5 1 JP7 HEADER, 2.54mm, 3 × 6 THT VERT 18POS SAMTEC, TSW-106-07-L-T 6 1 JP7(mate) JP7 JUMPER BOARD LINEAR, DC2100-ASSY-1 7 1 J17(mate) DC2100A THERMISTOR BOARD LINEAR, DC2100A - THERM-1 8 10 STAND-OFF HEX, NYL 8/32 THR 0.25" L KEYSTONE, 1904A 9 10 SCREW, PAN PHILLIPS 8-32 1/4 NYL B&F FASTENER, NY PMS 8320025PH Optional Components 1 0 C1C-C12C CAP., X5R, 100µF, 6.3V, 10%, 1210 MURATA, GRM32ER60J107ME20L 2 0 C1S-C12S, C1T-C12T CAP., X7R, 2.2µF, 100V, 10%, 1210 MURATA, GRM32ER72A225KA35L 3 0 C1L-C12L OPT CAP, OPT, 100V, 0805 4 0 C21, C32 OPT CAP., X7R, 100PF, 100V, 10%, 0603 AVX, 06031C101KAT 5 0 C40 OPT CAP, X5R, 10µF, 6.3V, 20% 0603 MURATA, GRM188R60J106ME47D 6 0 C49 CAP, OPT, 16V, 0402 7 0 D1A-D12A OPT DIODE, SCHOTTKY 2.0A 60V HI EFFICIENCY DIODES INC, DFLS260-7 8 0 D1B-D12B OPT DIODE, SCHOTTKY 100V 1A BARRIER RECTIFIER POWERDI123 DIODES INC, DFLS1100-7 9 0 D1C-D12C OPT SMD, SCHOTTKY CENTRAL SEMI, CMOSH-4E 10 0 R1, R7 OPT RES, CHIP, 1.00M, 1/16W, 5%, 0402 VISHAY, CRCW04021M00JNED 11 0 R3, R5, R9, R23 OPT RES, CHIP, 0Ω, 0402 VISHAY, CRCW04020000Z0ED 12 0 R45, R46, R48, R57 OPT RES, CHIP, 0Ω, 2512 VISHAY, CRCW25120000Z0EF 13 0 J2, J3, J4, J16 OPT HEADER 1 × 2 WEIDMULLER, 179313000_SC 14 0 J2, J3, J4, J16 (mate) OPT SOCKET 1 × 2 WEIDMULLER, 1792770000 15 0 J5-J15 OPT HEADER, 1 × 3 WEIDMULLER, 179314000_SC 16 0 J5-J15 (mate) OPT SOCKET, 1 × 3 WEIDMULLER, 1792780000 dc2100afc 37 DEMO MANUAL DC2100A Parts List ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER Thermistor Board 1 1 J1 CONN RECEPT 15POS 2MM VERT TIN HIROSE, DF3-15S-2DSA(25) 2 1 R1 RES, CHIP, 340k, 1/16W, 1%, 0402 VISHAY, CRCW0402340KFKED 3 1 R2 RES, CHIP, 54.9k, 1/16W, 1%, 0402 VISHAY, CRCW040254K9FKED 4 1 R3 RES, CHIP, 20k, 1/16W, 1%, 0402 VISHAY, CRCW040220K0FKED 5 1 R4 RES, CHIP, 8.06k, 1/16W, 1%, 0402 VISHAY, CRCW04028K06FKED 6 1 R5 RES, CHIP, 5.36k, 1/16W, 1%, 0402 VISHAY, CRCW04025K36FKED 7 1 R6 RES, CHIP, 3.65k,1/16W,1%, 0402 VISHAY, CRCW04023K65FKED 8 1 R7 RES, CHIP, 2.49k,1/16W,1%, 0402 VISHAY, CRCW04022K49FKED 9 1 R8 RES, CHIP, 1.24k,1/16W,1%, 0402 VISHAY, CRCW04021K24FKED 10 1 R9 RES, CHIP, 909Ω,1/16W,1%, 0402 VISHAY, CRCW0402909RFKED 11 1 R10 RES, CHIP, 681Ω,1/16W,1%, 0402 VISHAY, CRCW0402681RFKED 12 1 R11 RES, CHIP, 301Ω,1/16W,1%, 0402 VISHAY, CRCW0402301RFKED 13 1 R12 RES, CHIP, 147Ω,1/16W,1%, 0402 VISHAY, CRCW0402147RFKED 14 14 E1-E14 TURRET, 0.061 DIA MILL MAX, 2308-2-00-80-00-00-07-0 dc2100afc 38 A B C D C1 C1 C2 C1 C2 C2 C3 1210 6.3V 1210 6.3V D2C CMOSH-4E G2P C2B 100uF 1210 6.3V 1210 6.3V 20 R2G I1P C1G 2.2nF 20 R1G 20 1206 T2 4 5 6 7 D3B DFLS1100 OPT T1 4 5 6 7 * * 0.008 0.005 * DC2100A - A / B DC2100A - C / D 4 18 1206 R3B R2B 18 1206 * RS3B 0.010 * * RS2B 0.010 18 1206 R1B * RS1B 0.010 RS1A-RS12A OPT D1B DFLS1100 V- 4 D2B DFLS1100 OPT WURTH-750312504 9 10 1 2 D1A DFLS260 OPT 470pF 100V 0603 C1E RS1A* 0.005 20 1206 R1A 4 5 6 7 WURTH-750312504 9 10 1 2 D2A DFLS260 OPT 100V 0603 * RS2A 0.005 20 1206 C2E R2A 470pF T3 WURTH-750312504 9 10 1 2 DFLS260 OPT D3A 100V 0603 RS3A 0.005 * R3A C3E 470pF PLACE RC CLOSE TO LTC3300 OPT 4 Q1A SiR882DP 5.1 R1C 1210 6.3V OPT C1C 100uF D1C CMOSH-4E G1P C1B 100uF 5 OPT 4 Q2A SiR882DP 5.1 R2C 1210 6.3V C2C 100uF OPT PLACE RC CLOSE TO LTC3300 I2P C2G 2.2nF C1A 100uF D1E SBR10U200P5 20 R3G Q3A SiR882DP 4 PLACE RC CLOSE TO LTC3300 I3P C3G 2.2nF C2A 100uF D2E SBR10U200P5 5.1 R3C 1210 6.3V OPT C3C 100uF D3C CMOSH-4E OPT G3P 1210 6.3V 1210 6.3V D3E SBR10U200P5 C3B 100uF C3A 100uF 1 2 1 2 3 1 2 3 20 R3H 5.1 R3F C3R 2.2uF 1210 100V I3S G3S C3H 470pF OPT C3S 2.2uF 1210 100V 20 R2H 5.1 I2S G2S 1210 100V C2R 2.2uF 1210 100V OPT C1T 2.2uF 20 R1H 5.1 R1F 1210 100V 1210 100V C1H 470pF I1S G1S C1R 2.2uF OPT C1S 2.2uF NP 18 RS1B-RS12B 0.016 0.010 R1B-R12B 470pF NP C1F-C12F PLACE RC CLOSE TO LTC3300 4 Q1B SiS892DN 470pF 100V 0603 * C1F PLACE RC CLOSE TO LTC3300 4 C2H 470pF 470pF 100V 0603 R2F 1210 100V 1210 100V Q2B SiS892DN C2S 2.2uF C2T 2.2uF OPT *C2F OPT PLACE RC CLOSE TO LTC3300 4 Q3B SiS892DN OPT C3T 2.2uF 1210 470pF 100V 100V 0603 * C3F BOT6_TS V- BOT6_TS V- BOT6_TS 3 3 C4 C5 C5 C3 C4 C4 C5 C6 C6 D4E SBR10U200P5 D5E SBR10U200P5 4 R6G 20 CMOSH-4E Q6A SiR882DP 5.1 R6C 1210 6.3V OPT C6C 100uF 1210 6.3V 1210 6.3V 4 20 R5G CMOSH-4E Q5A SiR882DP 5.1 R5C 1210 6.3V C5C 100uF C4G 2.2nF 20 R4G Q4A SiR882DP CMOSH-4E 5.1 4 2 THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. CUSTOMER NOTICE T5 4 5 6 7 D6B DFLS1100 OPT T4 4 5 6 7 D5B DFLS1100 OPT SCALE = NONE J. DREW NC APPROVALS R6B 18 1206 * - ECO * RS6B 0.010 * 18 1206 R5B 18 1206 R4B 0.010 * RS4B * RS5B 0.010 * C6F N/A DATE: SIZE 5.1 C6H 470pF I6S G6S 1210 100V OPT C6T 2.2uF PRODUCTION R5F 20 R5H 5.1 C5H 470pF I5S G5S 1210 100V C5S 2.2uF OPT R4F 20 R4H C4H 470pF I4S G4S 1210 100V C4S 2.2uF OPT V- 1 2 179313000_SC SHEET 1 1 4 OF 6 REV. LTC Confidential-For Customer Use Only HIGH EFFICIENCY BIDIRECTIONAL MULTICELL BATTERY BALANCER LTC3300ILXE-1 / LTC6804IG-2 DEMO CIRCUIT 2100A 3 - 11 - 14 E8 BOT6_TS F13 7A 1206 BOT6_TS BOT6_TS BOT6_TS J2 DATE 3 - 11 - 14 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com V- C4R 2.2uF 1210 100V BOT6_TS V- C5R 2.2uF 1210 100V BOT6_TS V- C6R 2.2uF 1210 100V J.DREW APPROVED TECHNOLOGY Fax: (408)434-0507 PLACE RC CLOSE TO LTC3300 4 5.1 1210 100V 470pF 100V 0603 Q4B SiS892DN C4T 2.2uF * C4F OPT PLACE RC CLOSE TO LTC3300 4 Q5B SiS892DN 1210 100V 470pF 100V 0603 OPT C5T 2.2uF * C5F IC NO. 1210 100V C6S 2.2uF OPT PLACE RC CLOSE TO LTC3300 20 R6H 1 DESCRIPTION REVISION HISTORY Q6B SiS892DN R6F 4 470pF 100V 0603 * 4 REV TITLE: SCHEMATIC D4B DFLS1100 OPT WURTH-750312504 9 10 1 2 D4A DFLS260 OPT 470pF 100V 0603 C4E * RS4A 0.005 20 1206 R4A 4 5 6 7 WURTH-750312504 9 10 1 2 D5A DFLS260 OPT 470pF 100V 0603 * RS5A 0.005 20 1206 R5A C5E T6 WURTH-750312504 9 10 1 2 D6A DFLS260 OPT 470pF 100V 0603 C6E * RS6A 0.005 20 1206 R6A BOT6_TS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. PLACE RC CLOSE TO LTC3300 I4P OPT D4C G4P 1210 6.3V 1210 6.3V 1210 6.3V R4C C4C 100uF C4B 100uF C4A 100uF OPT PLACE RC CLOSE TO LTC3300 I5P C5G 2.2nF OPT D5C G5P C5B 100uF C5A 100uF OPT PLACE RC CLOSE TO LTC3300 I6P C6G 2.2nF OPT D6C G6P 1210 6.3V 1210 6.3V D6E SBR10U200P5 C6B 100uF C6A 100uF 2 1 2 C3 1 2 1 2 1 2 3 1 2 8 7 6 5 1 2 3 1 2 8 7 6 5 1 2 3 1 1 2 1 2 2 8 7 6 5 1 2 3 1 2 1 2 1 2 1 2 5 6 7 8 3 2 1 1 1 2 3 1 2 3 2 5 6 7 8 3 2 1 1 2 5 6 7 8 3 2 1 1 2 1 2 1 2 1 2 3 1 2 8 7 6 5 1 2 3 1 2 8 7 6 5 1 2 3 1 1 2 1 2 1 2 1 2 1 2 2 8 7 6 5 1 2 3 1 2 5 6 7 8 3 2 1 1 2 5 6 7 8 3 2 1 1 2 5 6 7 8 3 2 1 1 2 5 A B C D DEMO MANUAL DC2100A Schematic Diagram dc2100afc 39 A B C D C7 C7 C8 C7 C8 C8 C9 1210 6.3V 5 D8C CMOSH-4E G8P C8B 100uF 1210 6.3V 20 R9G 4 20 R8G 5.1 Q8A SiR882DP OPT R8C 1210 6.3V C8C 100uF OPT OPT 1210 6.3V C7C 100uF 4 20 R7G Q7A SiR882DP 5.1 R7C PLACE RC CLOSE TO LTC3300 I7P C7G 2.2nF OPT D7C CMOSH-4E 1210 6.3V 1210 6.3V G7P C7B 100uF PLACE RC CLOSE TO LTC3300 I8P C8G 2.2nF C7A 100uF D7E SBR10U200P5 4 Q9A SiR882DP PLACE RC CLOSE TO LTC3300 C9G 2.2nF I9P C8A 100uF D8E SBR10U200P5 5.1 R9C 1210 6.3V OPT C9C 100uF CMOSH-4E OPT D9C G9P 1210 6.3V 1210 6.3V D9E SBR10U200P5 C9B 100uF C9A 100uF 20 1206 R9A R7A T8 4 5 6 7 OPT D9B DFLS1100 T7 4 5 6 7 D8B DFLS1100 OPT C6 4 OPT D7B DFLS1100 WURTH-750312504 9 10 1 2 D7A DFLS260 OPT 470pF 100V 0603 * RS7A 0.005 20 1206 C7E 4 5 6 7 WURTH-750312504 9 10 1 2 DFLS260 D8A OPT 100V 0603 * RS8A 0.005 20 1206 C8E R8A 470pF RS9A* 0.005 T9 WURTH-750312504 9 10 1 2 D9A DFLS260 OPT 100V 0603 C9E 470pF 1 2 4 18 1206 R9B R8B 18 1206 * * RS9B 0.010 * * RS8B 0.010 * 18 1206 R7B RS7B 0.010 * C9F OPT 20 R9H 5.1 R9F C9R 2.2uF 1210 100V I9S G9S C9H 470pF C9S 2.2uF 1210 100V OPT 20 R8H 5.1 C8R 2.2uF C8H 470pF I8S G8S 1210 100V 1210 100V 1210 100V 1210 100V 20 R7H 5.1 R7F RS1A-RS12A 0.008 0.005 * DC2100A - A / B DC2100A - C / D 0.010 0.016 18 NP 3 C12 C9 3 470pF NP C1F-C12F C10 C10 C10 C11 C11 C12 C11 R1B-R12B TOP6_TS C6 TOP6_TS C6 TOP6_TS RS1B-RS12B I7S C7H 470pF PLACE RC CLOSE TO LTC3300 4 G7S C7R 2.2uF OPT C7S 2.2uF OPT C7T 2.2uF Q7B SiS892DN 470pF 100V 0603 * C7F PLACE RC CLOSE TO LTC3300 4 R8F 1210 100V 1210 100V Q8B SiS892DN C8S 2.2uF C8T 2.2uF 470pF 100V 0603 OPT * C8F OPT PLACE RC CLOSE TO LTC3300 4 Q9B SiS892DN C9T 2.2uF 1210 470pF 100V 100V 0603 * 5 6 7 8 3 2 1 1 2 3 1 2 3 1210 6.3V 1210 6.3V OPT D11C G11P C11B 100uF C11A 100uF 20 R12G CMOSH-4E 4 20 R11G CMOSH-4E Q11A SiR882DP 5.1 R11C 1210 6.3V C11C 100uF OPT 1210 6.3V 1210 6.3V 4 20 R10G Q10A SiR882DP CMOSH-4E 5.1 R10C 1210 6.3V OPT C10C 100uF 2 THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. CUSTOMER NOTICE 4 5 6 7 T10 4 5 6 7 OPT D11B DFLS1100 D10B DFLS1100 OPT SCALE = NONE J. DREW NC APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. * T11 OPT D12B DFLS1100 WURTH-750312504 9 10 1 2 D10A DFLS260 OPT 470pF 100V 0603 C10E RS10A 0.005 20 1206 R10A 4 5 6 7 WURTH-750312504 9 10 1 2 D11A DFLS260 OPT 470pF 100V 0603 C11E RS11A * 0.005 20 1206 R11A * T12 WURTH-750312504 9 10 1 2 TOP6_TS D12A DFLS260 OPT 470pF 100V 0603 C12E RS12A 0.005 20 1206 R12A PLACE RC CLOSE TO LTC3300 I10P C10G 2.2nF OPT D10C G10P C10B 100uF PLACE RC CLOSE TO LTC3300 I11P C11G 2.2nF C10A 100uF D10E SBR10U200P5 4 Q12A SiR882DP 5.1 R12C 1210 6.3V OPT C12C 100uF PLACE RC CLOSE TO LTC3300 C12G 2.2nF I12P OPT D12C G12P 1210 6.3V 1210 6.3V D11E SBR10U200P5 D12E SBR10U200P5 C12B 100uF C12A 100uF 2 1 2 C9 1 2 1 2 1 2 3 1 2 8 7 6 5 1 2 3 1 2 8 7 6 5 1 2 3 1 1 2 1 2 2 8 7 6 5 1 2 3 1 2 1 2 1 2 1 2 1 2 3 1 2 3 1 2 5 6 7 8 3 2 1 1 2 5 6 7 8 3 2 1 1 2 1 2 1 2 1 2 3 1 2 8 7 6 5 1 2 3 1 2 8 7 6 5 1 2 3 1 1 2 1 2 1 * * 18 1206 R12B 18 1206 * R11B RS12B 0.010 2 1 C12F 18 1206 R10B RS10B 0.010 N/A DATE: SIZE C12H 470pF I12S G12S R11F 20 R11H C11H 470pF I11S G11S 1210 100V C11S 2.2uF OPT 20 R10H 5.1 I10S C10H 470pF SHEET 2 1 HIGH EFFICIENCY BIDIRECTIONAL MULTICELL BATTERY BALANCER LTC3300ILXE-1 / LTC6804IG-2 DEMO CIRCUIT 2100A 3 - 11 - 14 IC NO. 4 OF 6 REV. LTC Confidential-For Customer Use Only 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com C6 C10R 2.2uF 1210 100V TOP6_TS C6 C11R 2.2uF 1210 100V TOP6_TS TOP6_TS J3 TOP6_TS E15 F14 7A 1206 TOP6_TS 179313000_SC C6 1 2 TOP6_TS C6 C12R 2.2uF 1210 100V TECHNOLOGY Fax: (408)434-0507 PLACE RC CLOSE TO LTC3300 4 Q10B SiS892DN G10S 1210 100V R10F C10S 2.2uF 1210 100V 470pF 100V 0603 OPT C10T 2.2uF * C10F OPT PLACE RC CLOSE TO LTC3300 4 5.1 1210 100V 470pF 100V 0603 Q11B SiS892DN C11T 2.2uF OPT C11F * 20 R12H 5.1 R12F 1210 100V C12S 2.2uF C12T 2.2uF 1210 100V OPT OPT 1 PLACE RC CLOSE TO LTC3300 4 Q12B SiS892DN 470pF 100V 0603 * TITLE: SCHEMATIC * * * RS11B 0.010 2 1 2 2 8 7 6 5 1 2 3 1 2 5 6 7 8 3 2 1 1 2 5 6 7 8 3 2 1 1 2 5 6 7 8 3 2 1 1 40 2 5 A B C D DEMO MANUAL DC2100A Schematic Diagram dc2100afc V- C1 1.0uF 16V 0603 12 11 10 V- 5 9 8 7 6 5 4 3 2 1 49 R19 23.7k * LTC3300-1 U1 I1S G1S V- I2S 0 R2 VREG1 G6S I6S G5S G2S I3S G3S I4S G4S I5S C2 4.7uF 16V 1210 WDTA TP1 BSS123W Q1 D10 CMOD6263 1 * R1 1M OPT 0805 * R4 1.27M R20 33.2k C3 0.1uF 16V 0402 BOT6_TS 1 I1P G1P From U3 Pin 32 WDTA SDIO SCKB CSB C6 D9 PDZ5.6B V- From U3 Pin 33 From U3 Pin 29 I1S G1S I2S G2S I3S G3S I4S G4S I5S G5S I6S G6S GND R3 0 OPT WDTA 1 D8 CMHZ4689 I2P G2P C2 I3P G3P C3 I4P G4P C4 I5P G5P C5 2 33.2k 4 20.5k 23.7k R20 C11 4.7uF 16V 1210 C9 4.7uF 16V 1210 15.4k R19 C23 10uF 10V 0805 C2K 1.0uF 16V 0603 C3K 1.0uF 16V 0603 C4K 1.0uF 16V 0603 C5K 1.0uF 16V 0603 C6K 1.0uF 16V 0603 0 OPT R5 DC2100A - C / D I2P G2P I3P G3P I4P G4P I5P G5P D1 CMMSH2-40 1 DC2100A - A / B * C1K 1.0uF 16V 0603 25 26 27 28 29 30 31 32 33 34 35 36 I6P G6P C4 0.22uF 16V 0603 R6 23.7K 15.4k R21 C14 4.7uF 16V 1210 R14 0 2512 R12 0 2512 R11 0 2010 6.81 33.2k 20.5k R22 C1 C2 C3 C4 C12 4.7uF 16V 1210 R13 0 2512 C10 4.7uF 16V 1210 C5 C6 CMMSH2-40 D2 23.7K 15.4k R24 C5 C6 1.27M 845k R4 D11 PDZ5.6B R55 20 0603 3 1.27M 845k R8 2.0k R58 1 3 1 D12 CMHZ4689 Q6 CMPT3904E 100k R53 3 2 C6 G9S I9S 12 11 10 9 8 7 6 5 4 3 2 1 49 R22 33.2k * * R24 23.7k I1S G1S I2S G2S I3S G3S I4S G4S I5S G5S I6S G6S GND 0805 D5 RS07J CUSTOMER NOTICE R23 0 OPT R21 23.7k * LTC3300-1 U2 R7 1M OPT VREG2 WDTC 1 2 R8 * 1.27M C7 0.1uF 16V 0402 2 THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. TOP6_TS I7P G7P SCALE = NONE J. DREW NC APPROVALS D7 RS07J D6 RS07J LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. C6 G7S I8S I7S G8S I11S I10S G12S C6 4.7uF 16V 1210 I12S G11S G10S C6 C5 1.0uF 16V 0603 TP2 Q2 BSS123W CMOD6263 3 2 1 38 D13 WDTC Q5 CMPDM8002A 2 C6 A B C Q4 CMPT3906E 1 2 2 R54 20 0603 1 2 3 2 1 2 C7 4 46 3 2 1 3 2 45 D 48 41 R56 2.0k 47 VREG 13 RTONS 14 41 1 2 48 VREG RTONS 47 TOS RTONP 13 2 45 CSBO 46 TOS RTONP 15 VMODE 16 CTRL 42 CSBI 44 SCKO 17 SCKI 43 SDOI SDI 18 BOOST 40 BOOST- SDO 19 BOOST+ 20 WDT 21 V- 39 C6 37 I6P 38 G6P I1P 22 G1P 23 C1 24 1 2 14 44 CSBO 15 SCKO VMODE CTRL 16 1 2 17 CSBI 43 SCKI 42 SDOI SDI 18 1 BOOST WDTC 2 BOOST- 19 SDO 40 WDT 20 C5 26 27 25 N/A DATE: SIZE C20 4.7uF 16V 1210 C7 C8 C9 C10 C11 C12 SHEET 3 1 4 OF 6 REV. LTC Confidential-For Customer Use Only 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com C5 C13 4.7uF 16V 1210 R18 0 2512 C16 4.7uF 16V 1210 C24 10uF 10V 0805 HIGH EFFICIENCY BIDIRECTIONAL MULTICELL BATTERY BALANCER LTC3300ILXE-1 / LTC6804IG-2 DEMO CIRCUIT 2100A 3 - 11 - 14 IC NO. C7K 1.0uF 16V 0603 R17 0 2512 R15 0 2512 R10 6.81 D4 CMMSH2-40 R16 0 2512 C18 4.7uF 16V 1210 C15 4.7uF 16V 1210 1 TECHNOLOGY Fax: (408)434-0507 I8P G8P I9P C17 4.7uF 16V 1210 C8K 1.0uF 16V 0603 C11K 1.0uF 16V 0603 C9K 1.0uF 16V 0603 G9P 2 0 OPT C12K 1.0uF 16V 0603 29 28 30 31 D3 R9 C10K G10P 1.0uF 16V I10P 0603 I11P G11P 1 CMMSH2-40 32 33 34 35 36 I12P G12P C8 0.22uF 16V 0603 TITLE: SCHEMATIC I2P G2P C2 I3P G3P C3 I4P G4P C4 I5P G5P I6P C1 39 BOOST+ V- 21 37 C6 I1P 22 G6P G1P 23 C6 24 1 2 5 A B C D DEMO MANUAL DC2100A Schematic Diagram dc2100afc 41 A B C D GRN GRN GRN GRN GRN GRN GRN GRN GRN GRN R12L D3F LED-LN 470 R3L D4F LED-LN 470 R4L D5F LED-LN 470 R5L D6F LED-LN 470 R6L D7F LED-LN 470 R7L D8F LED-LN 470 R8L D9F LED-LN 470 R9L D10F LED-LN 470 R10L D11F LED-LN 470 R11L D12F LED-LN 470 3 R3M 33 2512 3 R4M 33 2512 3 R5M 33 2512 3 R6M 33 2512 3 R7M 33 2512 3 R8M 33 2512 3 R9M 33 2512 3 R10M 33 2512 3 R11M 33 2512 3 R12M 33 2512 1 1 1 1 1 1 1 1 1 1 2 C12 C11 C11 S12 C10 C10 S11 C9 C9 S10 C8 C8 S9 C7 C7 S8 C6 C6 S7 C5 C5 S6 C4 C4 S5 C3 C3 S4 5 3.3K R3N C2 S3 Q3C RQJ0303PGDQALT 2 3.3K R4N Q4C RQJ0303PGDQALT 2 3.3K R5N Q5C RQJ0303PGDQALT 2 3.3K R6N Q6C RQJ0303PGDQALT 2 3.3K R7N Q7C RQJ0303PGDQALT 2 3.3K R8N Q8C RQJ0303PGDQALT 2 3.3K R9N Q9C RQJ0303PGDQALT 2 3.3K R10N Q10C RQJ0303PGDQALT 2 3.3K R11N Q11C RQJ0303PGDQALT 2 3.3K R12N Q12C RQJ0303PGDQALT GRN GRN D1F LED-LN 470 R1L D2F LED-LN 470 R2L C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 4 100 R13K 100 R1K 100 R2K 100 R3K 100 R4K 100 R5K 100 R6K 100 R7K 100 R8K 100 R9K 100 R10K 100 R11K 100 R12K V- V- V- R1M 33 2512 3 R2M 33 2512 3 4 C2 R2N C1 C1 S2 3.3K R1N V- S1 Q1C RQJ0303PGDQALT 2 3.3K C12M 10nF 25V 0603 C4_Filter C5_FILTER C6_FILTER C7_FILTER C8_FILTER C9_FILTER C10_FILTER C11_FILTER C12_FILTER 1206 1206 1206 3 12A DC2100A - C / D GRN GRN 12A * F9 12A * F5 12A F1 E1 1206 12A 7A * F15 F1 - F12 , F15 C9 C5 C1 TP9 * V- * V- V- 3 DC2100A - A / B C0_FILTER C3_FILTER C3M 10nF 25V 0603 C2_FILTER C2M 10nF 25V 0603 C1_FILTER C1M 10nF 25V 0603 C4M 10nF 25V 0603 C5M 10nF 25V 0603 C6M 10nF 25V 0603 C7M 10nF 25V 0603 C8M 10nF 25V 0603 C9M 10nF 25V 0603 C10M 10nF 25V 0603 C11M 10nF 25V 0603 C13M 10nF 25V 0603 V- C1_FILTER C2_FILTER C1L OPT 0805 VC0_FILTER C2L OPT 0805 C3L OPT 0805 Q2C RQJ0303PGDQALT 2 C4_FILTER C5_FILTER C6_FILTER C7_FILTER 0805 C3_FILTER C4L OPT C5L OPT 0805 C6L OPT 0805 V- C8L OPT 0805 C8_FILTER C10_FILTER C10L OPT 0805 C9_FILTER C9L OPT 0805 V- V- C12_FILTER C12L OPT 0805 C11_FILTER C11L OPT 0805 C7L OPT 0805 V- V- V- V- V- OPTIONAL PASSIVE BALANCING CIRCUITS V- C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C12 C12 KELVIN 1 42 1 5 V- E6 2.00k R7J C6 G7P D7D LED-LN 2.00k R1J G1P D1D LED-LN C5 C2 C5S+ C5+ C6S- 12A F2 J9 * 1206 E11 GRN GRN G2P 1206 C1 C7 C6S+ C6+ C7S- J10 E7 * C10S+ C10+ C11S- J14 E12 GRN GRN C11 R3J 12A R9J 2.00k C2 C8 G9P D9D LED-LN 2.00k 12A F7 2 THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. E4 SCALE = NONE C7S+ C7+ C8S- J11 E9 C4 C11 C11S+ C11+ C12S- E13 C8 R4J C9 * 12A N/A DATE: SIZE 2.00k R11J C10 C8S+ C8+ C9S- J12 179313000_SC R6J G12P C5 2.00k C11 D12D LED-LN R12J C12S+ C12+ J16 G6P D6D LED-LN 2.00k C12 1 2 SHEET 4 1 4 OF 6 REV. LTC Confidential-For Customer Use Only 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com GRN GRN E14 179314000_SC 1 2 3 HIGH EFFICIENCY BIDIRECTIONAL MULTICELL BATTERY BALANCER LTC3300ILXE-1 / LTC6804IG-2 DEMO CIRCUIT 2100A 3 - 11 - 14 IC NO. G11P D11D LED-LN 2.00k C4 C4S+ C4+ C5S- J8 179314000_SC 1 2 3 E10 G5P D5D LED-LN C8 E5 1 TECHNOLOGY Fax: (408)434-0507 GRN GRN 12A C4 R5J F8 1206 F12 1206 * 1206 12A F4 TITLE: SCHEMATIC 2.00k R10J D10D LED-LN G10P C3 G4P D4D LED-LN C12 * 179314000_SC J15 1 2 3 C7 2.00k J. DREW NC C3S+ C3+ C4S- J7 179314000_SC 1 2 3 179314000_SC 1 2 3 APPROVALS GRN GRN C3 1206 1206 F11 1206 * 12A F3 G3P D3D LED-LN * 179314000_SC 1 2 3 C10 C7 179314000_SC 1 2 3 C6 C3 CUSTOMER NOTICE 2.00k R8J G8P D8D LED-LN 2.00k R2J D2D LED-LN 12A F10 1206 C2S+ C2+ C3S- J6 E3 179314000_SC 1 2 3 C2 2 LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. C10 * 12A F6 179314000_SC C9S+ C9+ C10S- J13 C9 * 179314000_SC 1 2 3 C6 1 2 3 C1S+ C1+ C2S- J5 179313000_SC E2 C1 C1SC1- J4 179314000_SC 1 2 3 1 2 A B C D DEMO MANUAL DC2100A Schematic Diagram dc2100afc A B C C12 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 100 R27 V- 100 V- 5 C1_FILTER C2_FILTER C3_FILTER C4_FILTER C5_FILTER C6_FILTER C7_FILTER C8_FILTER C9_FILTER C10_FILTER C11_FILTER C12_FILTER V- C25 0.1uF 100V 0805 R28 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 CZT5551 Q3 DRV 1 C26 0.1uF 100V 0805 U3 A0 A1 A2 A3 S1 CO GPIO1 GPIO2 GPIO3 VM2 VM GPIO4 0603 25V RT7 0.1uF RT8 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 JP6 1 1 RT6 VREG V- RT4 RT3 RT2 13 12 1 2 3 4 5 6 7 8 V- 16 10 SCKB 15 RT1 CSB C0_FILTER V- 4 VCC VEE SCL A0 A1 S0 S1 S2 S3 S4 S5 S6 S7 2 1 2.0K R47 4 GND DO SDA 11 9 14 2.0K R36 U6 LTC1380IGN SDIO 2.0K R34 V- SDIO V- VREG C28 1uF 25V 0603 3 4 V- OPT 100pF V- C29 1uF 25V 0603 0.1uF 25V 0603 C33 10k R43 R35 10K 0603 C32 T15 PE-68386 R63 60.4 3 4 ISOSPI_GND R29 60.4 1 6 T14 ACT45B-220-2P OPTION A AND C ONLY DO NOT INSTALL J18 IN OPTIONS A AND C isoSPIA IN C31 1uF 25V 0603 V- OPT SCKB VREG 604 R33 V- C21 100pF 0603 R26 60.4 0603 60.4 0603 T13 PE-68386 R25 3 1 RT5 S1 RJ45 1 3 5 7 ISOSPI_GND 4 GPIO1 DRV J18 11 12 6 1.40k R32 TERM C50 LTC6804-2 C1 S2 C2 S3 C3 S4 C4 S5 GPIO5 VREF2 S6 C5 VREF SWTEN VREG DRIVE WDT ISOMD CSB(IMA) SCK(IPA) SDI(ICMP) C6 S7 C7 S8 C8 S9 C9 S10 C10 S11 SDO(IBIAS) C11 S12 C12 VP VREG 3 0 2 C12 POWER CONNECTION 11 12 ISOSPI_GND RJ45 2 4 6 8 10k R42 V- A0 2 JP1 SHIELD E16 3 C30 1uF 25V 0603 1 1 3 5 7 A2 2 JP3 3 V- SCKB 100 JP4 1 2 3 4 5 6 7 8 16 10 15 13 12 0 2 1 A3 R37 3 RT9 RT10 RT11 RT12 VREG A1 2 JP2 3 1 J1 3 1 1M R40 VCC VEE SCL A0 A1 S0 S1 S2 S3 S4 S5 S6 S7 GND DO SDA U7 LTC1380IGN V- SWTEN 2 VREG JP5 14 11 9 SDIO 1M R41 V- V- R30 1M TP3 RT11 5 V- TEMP11 TEMP10 GND GND GND TEMP12 CON-DF3DZ-15P-2H51 1 2 3 RT12 4 TEMP9 TEMP8 2 16 9 10 11 12 13 14 15 2 C27 0.1uF 25V 0603 EN PHA POL VCCS CSB SCK MISO MOSI SCALE = NONE J. DREW NC APPROVALS 8 7 6 5 4 3 2 1 To U1 Pin 16 SCKB U5 CSB TP5 LTC6820IMS VCC IM IP MSTR SLOW GND VCMP IBIAS THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. CUSTOMER NOTICE OPTION A AND C ONLY R39 1.40k R38 604 SCKB SCKB U4 V- 24AA64 To U1 Pin 17 THERMISTORS RECOMMENDED THERMISTOR VISHAY NTHS01N1002JE GPIO1 TP4 7 RT9 TEMP7 TEMP6 TEMP5 TEMP4 TEMP3 TEMP2 TEMP1 J17 LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. R31 1M WDTB V- 8 RT8 RT10 6 9 RT7 RT6 10 RT5 11 RT4 12 RT3 13 RT2 14 RT1 15 4 VREG N/A DATE: SIZE 10 9 8 7 6 5 4 3 2 1 A CS SCK SDI SDO VCC_3V3 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com 6C 6B 6A 5C 5B 5A 4C 4B 4A 3C 3B 3A 2C 2B 2A 1C 1B 1A JP7 TSW-106-07-L-T NOTE: DC2100A-ASSY 1 IS USED ONLY FOR BUILD OPTION -A AND -C. INSTALL ASSY 1 ONTO JP7 SUCH THAT ASSY 1-1B CONNECTS TO JP7-1C AND ASSY 1-1A CONNECTS TO JP7-1B 12 11 TSW-106-07-L-T B DC2100A-ASSY 1 1 SHEET 5 4 OF 6 REV. LTC Confidential-For Customer Use Only HIGH EFFICIENCY BIDIRECTIONAL MULTICELL BATTERY BALANCER LTC3300ILXE-1 / LTC6804IG-2 DEMO CIRCUIT 2100A 3 - 11 - 14 IC NO. TITLE: SCHEMATIC SDIO 1 TECHNOLOGY Fax: (408)434-0507 C51 0.1uF 25V 0603 CSB TP8 SDIO To U1 Pin 18 TP7 TP6 SDIO R59 5.1k CSB V- VREG VCC 2 4 6 8 3 1 D isoSPIB OUT 2 4 3 3 1 5 WP SCL 1 VSS 2 SDA 3 5 A B C D DEMO MANUAL DC2100A Schematic Diagram dc2100afc 43 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. A B C GND USBMINI-B ID D+ D- VBUS 5 3 2 1 5 C40 only used in non-isolated case C40 10uF OPT WURTH: 651005136521 4 J19 R44 1 Close to J19 C39 10uF A6 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 A3 A4 A5 A2 A1 A7 A11 A10 A9 A8 GND GND GND GND GND GND GND GND GND GND GND GND OPT ASSEMBLY NOTE: R48 0 OPT 470pF 1808 470pF 1808 OPT C22 GND2 GND2 GND2 GND2 GND2 GND2 GND2 GND2 GND2 GND2 GND2 GND2 GND2 GND2 GND2 C19 SPND-PWR ON VLO D2+ D2- VLO2 VBUS D1+ D1- VCC2 VCC2 VCC2 VCC2 Y1 1 C43 22pF C46 10uF 12.0000MHz 2 R65 1.00M R66 301 0603 VCC_5V 37 R49 1k 3 4 3.3V 7 SHDN IN 28 8 BYP OUT 4 5 18 23 C44 22pF R64 2.49k 33 32 43 42 MCLR VDDCore/VCAP RA6/CLK0/OSC2 6 AN7 SS2 SDI2 SDO2 SCL2 AN1 AN6 AN3 AN2 2 4 6 AN5 AN0 3 THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. CUSTOMER NOTICE 31 27 26 25 5 4 3 2 41 40 39 38 1 44 36 35 34 J20 C35 0.1uF ICD INTERFACE 2.00k R61 NC 2 SCALE = NONE J. DREW 2.00k R62 PB1 C38 0.1uF DATE: N/A SIZE 0 10k R50 TECHNOLOGY 2 4 6 8 10 12 14 16 1 3 5 7 9 11 13 15 GPIO J21 1 3 5 7 9 11 13 15 V- Q7 CMPT3904E 3 R52 10k SHEET 6 1 4 OF 6 REV. 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only 0.1uF C45 2 R51 10k AN5 AN7 SDO2 SCL2 VCC_3V3 AN1 AN3 VCC_3V3 1N4448HLP D14 BSS123W Q8 WURTH - 62501621621 VCC_3V3 R60 10k 1 3 HIGH EFFICIENCY BIDIRECTIONAL MULTICELL BATTERY BALANCER LTC3300ILXE-1 / LTC6804IG-2 DEMO CIRCUIT 2100A 3 - 11 - 14 IC NO. J22 HEADER2X2 2 4 2 4 6 AN0 AN2 8 AN6 10 SS2 12 SDI2 14 VCC_5V 16 AN0 1 1 STAND ALONE LDO VCC_3V3 C12 VCC_3V3 WURTH- 434 111 025 826 ORN LED-LN D16 SDO SCK SDI CS C37 0.1uF VCC_3V3 TITLE: SCHEMATIC C36 0.1uF GRN LED-LN D15 2 APPROVALS WURTH-62000621121 1 3 5 VCC_3V3 0.1uF C34 VCC_3V3 LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. 30 RE2/AN7/PMCS RE1/AN6/PMWR AVss1 Vss1 Vss2 RE0/AN5/PMRD RD7/PMD7/RP24 RD6/PMD6/RP23 RD5/PMD5/RP22 RD4/PMD4/RP21 RD3/PMD3/RP20 RD2/PMD2/RP19 RD1/PMD1/SDA2 RD0/PMD0/SCL2 RC7/CCP10/RX1/DT1/SDO1/RP18 RC6/CCP9/TX1/CK1/RP17 RC2/AN11/C2IND/CTPLS/RP13 RC1/CCP8/T1OSI/UOE/RP12 RC0/T1OSO/T1CKI/RP11 RB7/CCP7/KBI3/PGD/RP10 RB6/CCP6/KBI2/PGC/RP9 RB5/CCP5/KBI1/SDI1/SDA1/RP8 RC5/D+/Vp RB4/CCP4/KBI0/SCK1/SCL1/RP7 RC4/D-/Vm RB3/AN9/C3INA/CTED2/VPO/RP6 RB2/AN8/C2INC/CTED1/VMO/REFO/RP5 RB1/AN10/C3INC/RTCC/RP4 RA7/CLKI/OSC1 RB0/AN12/C3IND/INT0/RP3 17 16 15 14 12 11 10 9 24 22 21 20 19 29 PIC18F47J53-I/ML U10 OPT C49 0.1uF C48 1.0uF VCC_3V3 AVdd1 AVdd2 Vdd1 Vdd2 VUSB RA5/AN4/C1INC/SS1/HLVDIN/RCV/RP2 RA3/AN3/C1INB/Vref+ C42 RA2/AN2/C2INB/C1IND/C3INB/Vref-/CVref 0.47uF RA1/AN1/C2INA/Vbg/RP1 RA0/AN0/C1INA/ULPWU/RP0 C47 1.0uF 1 LT1761ES5-3.3 U9 ALL COMPONENTS ON PAGE 6 ARE FOR "BUILD OPTION A AND C ONLY". L3 L4 L6 L7 K1 K2 K3 K4 K5 K6 K7 K8 K9 K10 K11 L2 L1 L5 L11 L10 L9 L8 LTM2884CY OPT OPT VCC VCC VCC VCC U8 OPT R57 0 R46 0 R45 OPT 0 GND 2 D Isolation Bypass Components: 2512 for 5mm clearance 3 3 2 4 1 2 44 1 5 A B C D DEMO MANUAL DC2100A Schematic Diagram dc2100afc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. A B C D E14 E13 V- V- 5 5 RT3 RT11 RT12 R11 301 R12 147 V- RT10 R10 681 E12 E11 E10 E9 E8 E7 E6 E5 E4 E3 E2 13 12 11 10 9 8 7 6 5 4 RT3 RT4 RT5 RT6 RT7 RT8 RT9 RT10 RT11 RT12 V- 14 RT2 GND GND GND TEMP12 TEMP11 TEMP10 TEMP9 TEMP8 TEMP7 TEMP6 TEMP5 TEMP4 TEMP3 TEMP2 TEMP1 J1 3 SCALE = NONE J. DREW NC APPROVALS THERMISTORS THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. 4 3 CON-DF3-15S-2DSA21 1 2 3 15 RT1 CUSTOMER NOTICE 4 LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. RT9 R9 909 R8 1.24k RT8 R7 2.49k RT7 R6 3.65k RT6 R5 5.36k RT5 R4 8.06k RT4 R3 20k R2 54.9k RT2 R1 340k RT1 E1 DATE: N/A SIZE 3 - 7 - 14 2 SHEET 1 1 OF 1 1 REV. 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only J. DREW DATE 3 - 7 - 14 HIGH EFFICIENCY BIDIRECTIONAL MULTICELL BATTERY BALANCER IC NO. LTC3300ILXE-1 / LTC6804IG-2 DEMO CIRCUIT 2100A- THERMISTOR PCB TITLE: SCHEMATIC 1 - APPROVED PRODUCTION 1 DESCRIPTION REVISION HISTORY TECHNOLOGY REV ECO 2 A B C D DEMO MANUAL DC2100A Schematic Diagram dc2100afc 45 DEMO MANUAL DC2100A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 1630 McCarthy Blvd. Milpitas, CA 95035 Copyright © 2004, Linear Technology Corporation dc2100afc 46 Linear Technology Corporation LT 0315 REV C • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2015