CE204024 - PSoC® CY8C4Axx Programmable Gain Amplifier Objective This example demonstrates how to use the adjustable gain feature of the PGA component in PSoC® CY8C4Axx devices, during runtime. Overview The project adjusts the gain of the PGA in 3dB steps from 0 to 30 dB. At each gain, the output of the PGA is measured with the ADC and printed out to a terminal emulator with the UART component. Requirements Tool: PSoC Creator 3.3 SP2 or higher Programming Language: C (GCC 4.9.0) or higher Associated Parts: All PSoC CY8C4Axx devices Related Hardware: CY8CKIT-048 Design This project demonstrates the use of a PGA component in a circuit and how to change the gain during runtime in firmware. An external voltage is applied to the pin labeled ‘Vin” ( P0[7] ) which is the input to the PGA. The program slowly increases the PGA’s gain in 3dB steps from a gain of 1, to a gain of 32, then starts over again at a gain of 1. At each gain step the ADC will measure the output of the PGA. The ADC’s result and gain will be printed with a UART (UART_1) through P0[5]. The results are printed in the following format “Gain = xx, yyy mVolts”, where xx is the gain in dB and yyy is the voltage in mVolts. Any common terminal emulator will be able to display the information. Figure 1 Project Schematic Design Considerations Since the gain of the PGA will go to 32 (30dB), and the ADC’s range is 0 to 2.4 volts in this configuration, the maximum voltage you can apply to Vin without saturating the ADC is about 74 mV (0.074 x 32 = ~2.4 volts). Any voltage between the power supply rails may be applied to Vin without damaging the PGA or the PSoC. www.cypress.com Document No. 002-04024 Rev.** 1 PSoC® CY8C4Axx Programmable Gain Amplifier Hardware Setup A power supply and a potentiometer can be used to supply a voltage to Vin ( P0[7] ) . The result will stream out of the PsoC’s UART TX signal through P0[5]. To see the output of the project you will need to use a terminal emulator. There are several free ones out there such as TeraTerm, Putty, or Hyperterm. The UART terminal settings are, 9600 baud, 8 data bits, and 1 stop bit. Components Table 1 lists the PSoC Creator Components used in this example, as well as the hardware resources used by each. Table 1. List of PSoC Creator Components Component or User Module Version Hardware Resources PGA_1 1.0 ½ CTB ADC 1.0 ADC_SAR_SEQ UART_1 3.20 SCB Vin 2.20 GPIO ( P0[7] ) UART_1:tx 2.20 GPIO ( P0[5] ) Parameter Settings There is only one change in the default PGA settings to make it work for this code example. The Vref input was changed from “External” to “Internal Vss”. All other parameters were left as default as shown in Figure 2. Figure 2 PGA User Interface www.cypress.com Document No. 002-04024 Rev.** 2 PSoC® CY8C4Axx Programmable Gain Amplifier Several parameters were changed in the ADC’s interface. Figure 3 highlights where each of these changes in the list below are made. A. Sequenced channels set to 1. B. Change Input mode to Single ended. C. Enable averaging by selecting check box. D. Set Minimum acquisition time to 1000. E. Change Sample mode to Single shot, triggered. Figure 3 ADC User Interface Operation To test the project, compile and program the PSoC. Connect the test voltage to pin P0[7] as indicated in Figure 4 below. The input voltage should be between 0 and ~74 mVolts since the PGA will provide a gain between 1 and 32. An input voltage above ~74 mV will saturate the ADC, since in this configuration the maximum input to the ADC is 2.4 volts. www.cypress.com Document No. 002-04024 Rev.** 3 PSoC® CY8C4Axx Programmable Gain Amplifier The CY8CKIT-048 development kit has a serial-to-USB converter built into the kit. Port P0[5] is connected directly to the RX input of the serial-to-USB converter, so no additional connection is required. Run a terminal emulator on your development PC and set it to 9600 baud, 8 data bits, and 1 parity bit. Select the Comm port that is labeled “Cypress KitProg2 USB-UART” in the port selection of your terminal emulator settings. The ADC reading for each gain setting should be scrolling down the screen. Use a voltmeter to measure the input voltage and compare with the results on the terminal emulator. Remember that input voltages above about 74 mVolts will saturate the ADC with a gain of 32. Figure 4 CY8CKIT-048 www.cypress.com Document No. 002-04024 Rev.** 4 PSoC® CY8C4Axx Programmable Gain Amplifier Related Documents Table 2 lists all relevant application notes, code examples, knowledge base articles, device datasheets, and Component datasheets. Table 2. Related Documents Application Notes AN211293 Getting Started with PSoC® Analog Coprocessor PSoC Creator Component Datasheets PGA Programmable Gain Amplifier ADC PSoC 4 Scanning SAR ADC Pins General Purpose IO Pins Device Documentation Cy8C4Axx Datasheet PSoC® Analog Coprocessor: CY8C4Axx Family Datasheet Development Kit (DVK) Documentation CY8CKIT-048 PSoC® Analog Coprocessor Pioneer Kit PSoC® Family Web Page PSoC® Analog Coprocessor www.cypress.com Document No. 002-04024 Rev.** 5 PSoC® CY8C4Axx Programmable Gain Amplifier Document History Document Title: CE204024 - PSoC® CY8C4Axx Programmable Gain Amplifier Document Number: 002-04024 Revision ECN ** 5262424 www.cypress.com Orig. of Change MEH Submission Date 5/6/2016 Description of Change New Code Example Document No. 002-04024 Rev.** 6 PSoC® CY8C4Axx Programmable Gain Amplifier Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. 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