TDA8790M Evaluation board documentation

APPLICATION NOTE
TDA8790M
EVALUATION BOARD DOCUMENTATION
AN/96031
Philips Semiconductors
TDA8790M
Evaluation board documentation
Application Note
AN96031
APPLICATION NOTE
TDA8790M
EVALUATION BOARD DOCUMENTATION
Author :
Patrick LEJOLY
Keywords:
Evaluation board
TDA8790M
8 bit ADC
Low power ADC
high speed ADC
Date : April 1996
Philips Semiconductors
TDA8790M
Evaluation board documentation
Application Note
AN96031
Summary
This note describes a demonstration board which facilitates the evaluation of the
TDA8790M 8 bit analog to digital converter.
In addition the operation of the TDA8790M is shortly described and several methods to
provide input offset , clamp, and top and bottom references are shown.
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TABLE OF CONTENTS
1. INTRODUCTION
6
2. BOARD DESCRIPTION
8
2.1 CONNECTORS, POTENTIOMETERS AND SWITCHES POSITIONS
8
2.2 CONNECTORS, POTENTIOMETERS AND SWITCHES LIST
9
2.3 CONNECTORS, POTENTIOMETERS AND SWITCHES ROLE
11
3. EXAMPLES OF BOARD SETTINGS
12
3.1 INITIAL SETTINGS : 3.3 V ADC SUPPLIES, AC COUPLED INPUT, 40 MHz CLOCK (ON
BOARD), 3.3 V and ≈ 1.2 V VOLTAGE REFERENCES
12
3.2 OTHER SETTINGS EXAMPLE : 5 V ADC SUPPLIES, AC COUPLED INPUT, 40 MHz CLOCK
(ON BOARD), 3.3 V and ≈ 1.2 V VOLTAGE REFERENCES
14
4. A/D CONVERTER SUPPLIES
15
4.1 ON-BOARD SUPPLIES GENERATION
15
4.2 ON-BOARD / EXTERNAL SUPPLY SELECTION
16
5. VOLTAGE REFERENCES
17
5.1 TOP AND BOTTOM REFERENCES DERIVED FROM A POWER SUPPLY
19
5.2 TOP AND BOTTOM REFERENCES DERIVED FROM REFERENCE VOLTAGE
REGULATOR(S)
20
5.3 ON-BOARD PRACTICAL REFERENCE VOLTAGES GENERATION
23
6. INPUT OFFSET
24
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6.1 INPUT OFFSET DERIVED FROM A RESISTOR BRIDGE
24
6.2 INPUT OFFSET PRACTICAL GENERATION ON BOARD
25
6.3 INPUT OFFSET DERIVED FROM THE MEDIUM REFERENCE
25
6.4 INPUT OFFSET PROVIDED BY AN OPERATIONAL AMPLIFIER
27
7. CLAMP FOR VIDEO SIGNALS
29
8. CLOCK
31
8.1 CLOCK INPUT
31
8.2 ACTUAL IMPLEMENTATION ON THE EVALUATION BOARD
32
8.3 CLOCK JITTER
33
9. 8 BIT D/A CONVERTER
33
10. DEMO BOARD DOCUMENTATION : ELECTRICAL DIAGRAM, COMPONENT
LIST & COMPONENTS IMPLANTATION
34
10.1 ELECTRICAL DIAGRAM
34
10.2 COMPONENT LIST
36
10.3 COMPONENTS IMPLANTATION
39
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1. INTRODUCTION
The TDA8790M is a 8 bit high speed, low voltage, low power analog to digital
converter (30 mW typical at 3.3 V, 4 mW in standby mode).
It has been designed for video signal digitizing, radio communication, camcorders &
all applications where size and power saving are strong requirements.
The supplies can be set in the range of 2.7 V up to 5.5V (down to 2.5 V for output
supply). The sampling frequency can reach 40 MHz.
Application requires few external components.
TDA8790M comes in a plastic thin quad flat package SSOP20 (SOT266-1), with the
following overall body dimensions: 6.5x4.4x1.3 mm3.
The evaluation board described in this note was designed to allow a quick evaluation
of the main TDA8790 characteristics. It is realized with a two layer PCB.
The following features are included :
- One single power supply (+8V +/-10%) is required to generate the supplies needed
by the on-board ICs. Connection via banana plugs or grips is possible. To avoid
supply connection errors, a green LED is on when the supply polarity is respected. A
protection diode is also included to avoid any damage if an error occurs.
- A high-speed 8-bit D/A converter TDA8702T for reconstrucion of the analog signal
from the digital data output by TDA8790M. Because this D/A converter is not perfect,
its analog output should not be used to characterize the TDA8790M.
- A 40 MHz on-board quartz oscillator or an external clock can be used to control the
TDA8790M. Additionally, the clock of the TDA8702T D/A converter can be either the
same clock as the one used for TDA8790M (external clock or on board oscillator) or
an independent external clock.
- A 7805 regulator generates the 5V supply voltages needed by the D/A converter
and the on-board clock oscillator.
- A Texas Instruments TL431 reference supplies the supply voltage (switchable
between +3.3V and +5V) and reference voltages for the TDA8790M. It is also
possible to input directly the VDD supply voltage of the A/D converter through grip
point TM3.
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- Selection between on-board generated and external VRT (to be input on grip point
TM1) A/D converter top reference voltage.
- Probe connectors (CB1 for TDA8790M output bits and test points TP1, TP2 for the
A/D converter clock signal and its ground) allow to connect a digital analyzer to the
board and to perform digital treatment on the data output by TDA8790M.
- AC input signals only are allowed. The input offset is provided by a resistor bridge.
- All decoupling components necessary for good operation of the TDA8790M are
included on board.
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2. BOARD DESCRIPTION
2.1 CONNECTORS, POTENTIOMETERS AND SWITCHES POSITIONS
K1
B1
B2
PHILIPS
TM3
TM1
D3
TM2
K2
ALPAR
PCB No 367
J2
K6
J3
K5
TP1 TP2
TP3
TDA8790
J1
P1
K4
D7
D6
D5
D4
D3
D2
D1
D0
8 bit
connector
&
solder
points
P2
K3
TP4
K7
K8
CB1
TM5
TM4
J4
TDA8790M DEMO
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2.2 CONNECTORS, POTENTIOMETERS AND SWITCHES LIST
Reference
B1
B2
CB1
Type
Banana PLUG
Banana PLUG
test point array
D3
J1
J2
J3
J4
K1
LED
BNC
BNC
BNC
BNC
switch
K2
switch
K3
switch
K4
switch
K5
K6
switch
switch
Function
External board supply (8V)
External board supply (ground)
TDA8790M output data D7 to D0 with
respective grounds.
Green LED, is ON when the power supply is on
Signal input (50 Ω input)
ADC (or ADC+DAC) clock input (50 Ω input)
DAC clock input (50 Ω input)
DAC output
A/D converter power supply selection (between onboard generated +5V and on-board generated
+3.3V).
External/On-board generated A/D converter power
supply selction. When external power supply is
chosen, the supply voltage must be applied on grip
point TM5. The +8V power supply (J13, J14) is still
needed for the clock oscillator and D/A converter
power supplies generation.
Selection of the A/D converter top reference voltage
VRT between external and on-board generated
voltages.
A/D converter on-board top reference selection.
The two options are :
1) VRT= VDDA (should be used when VDDA=3.3V)
2) VRT derivated from VDDA through potentiometer
P3 (when VDDA=5V, default setting in this
configuration is VRT=3.3V)
A/D converter Stand-By mode selection.
A/D converter clock selection. The 2 options are :
1) A/D converter clock = on-board generated 40
MHz clock
2) A/D converter clock = external clock
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Reference
K7
Type
switch
K8
switch
P1
potentiometer
P2
potentiometer
TM1
TM2
TM3
TM4
TM5
TP1
TP2
TP3
TP4
grip point
grip point
grip point
grip point
grip point
test point
test point
test point
test point
Application Note
AN96031
Function
D/A converter clock selection. The 2 options are :
1) D/A converter clock = A/D converter clock
2) D/A converter clock = external clock
Selection of the D/A converter analog output signal
polarity.
2K potentiometer used to set the DC offset of the
A/D converter analog input signal
5K potentiometer used to set the A/D converter top
reference voltage when this voltage is not set equal
to VDDA via switch K24
External board supply (+8V)
External board supply (ground)
External A/D converter supply (2.7 to 5.5 V)
External top reference voltage (VRT) input
Analog ground (close to TM1)
A/D converter clock signal.
A/D converter clock ground.
A/D converter bottom reference voltage.
A/D converter top reference voltage.
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2.3 CONNECTORS, POTENTIOMETERS AND SWITCHES ROLE
+3.3V / +5V
VDD
PHILIPS
External VDD in
A/D converter external
clock input
On-board VDD/ Ext. VDD
CK
+8V Green
LED
GROUND
ALPAR
PCB No 367
On-board oscillator
External clock
CKDA
D/A converter external
clock input
CLOCK GROUND
On / Stand-by
Vrb
GND
D7
D6
D5
D4
D3
D2
D1
D0
VRB
Analog
input
Offset trim
TDA8790M
OFF
VRT for VDD=
+5V / +3.3V
IN
GND
VRT trim
VRT
Vrt
External VRT
On-board VRT
External VRT in
DAC
Ext. clock / Same as ADC
OUT/OUTN
Analog
output
Vrt
OUT
TDA8790M DEMO
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3. EXAMPLES OF BOARD SETTINGS
3.1 INITIAL SETTINGS : 3.3 V ADC SUPPLIES, AC COUPLED INPUT, 40 MHz
CLOCK (ON BOARD), 3.3 V and ≈ 1.2 V VOLTAGE REFERENCES
The boards are delivered set in the following configuration :
- On-board generated TDA8790M supply voltage VDD is selected. It is set to +3.3V.
- On-board generated VRT reference voltage is used. It is set to VRT = VDDA
(+3.3V in the present case).
- On-board generated + 40 MHz clock signal is used for both A/D converter and D/A
converter.
- Potentiometer P1 is adjusted to provide a mid-scale code output when no analog
signal is input, in the given supply (VDD) and top reference voltage (VRT) conditions.
- Sleep mode (stand-by mode) is inactive.
- TDA8702T D/A converter output is not inverted.
The board supply must be set at 8 V.
In this configuration the analog input signal source must be provided by an external
generator which is connected to the board by the J1 connector (dynamic input
impedance: 50 Ω).
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VDD
PHILIPS
+8V
GROUND
ALPAR
PCB No 367
CK
CKDA
CLOCK GROUND
GND
Vrb
D7
D6
D5
D4
D3
D2
D1
D0
VRB
Analog
input
Offset trim
OFF
TDA8790M
IN
VRT
GND
Vrt
Analog
output
Vrt
OUT
TDA8790M DEMO
SWITCHES POSITION FOR ON-BOARD GENERATED VDD=+3.3V
ON-BOARD GENERATED VRT AND CLOCK SIGNALS FOR A/D CONVERTER AND D/A CONVERTER
(40 MHZ CLOCK) ARE USED (INITIAL SETTINGS)
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3.2 OTHER SETTINGS EXAMPLE : 5 V ADC SUPPLIES, AC COUPLED INPUT,
40 MHz CLOCK (ON BOARD), 3.3 V and ≈ 1.2 V VOLTAGE REFERENCES
VDD
PHILIPS
+8V
GROUND
ALPAR
PCB No 367
CK
CKDA
CLOCK GROUND
GND
Vrb
VRB
Analog
input
OFF
Offset trim
TDA8790M
IN
VRT trim
GND
VRT
D7
D6
D5
D4
D3
D2
D1
D0
Vrt
Analog
output
Vrt
OUT
TDA8790M DEMO
SWITCHES POSITION FOR ON-BOARD GENERATED VDD=+5V
ON-BOARD GENERATED VRT AND CLOCK SIGNALS FOR A/D CONVERTER AND D/A CONVERTER
(40 MHZ CLOCK) ARE USED
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4. A/D CONVERTER SUPPLIES
The TDA8790M can work with all supply voltages in the range of 2.7 V to 5.5 V:
analog supply (VDDA), digital supply (VDDD), output supply (VDDO). Furthermore,
VDDO can be set as low as 2.5 V.
The only restriction for the supplies is to respect the following conditions:
-0.2V < VDDA-VDDD < 0.2V
-0.2V < VDDD-VDDO < 3V
-0.2V < VDDA-VDDO < 3V
4.1 ON-BOARD SUPPLIES GENERATION
The A/D converter supplies (VDDA=VDDD=VDDO) are provided by an adjustable
precision regulator (TL431, IC3).
The IC3 regulator output voltages are adjustable by a resistor ratio (see figure).
The formula which gives the regulated voltage related to the resistor ratio is :
external supply
output
R1
K1
R2
R3
R4
TL431
Vout = 2.5*(1+(R2+R3)/R4)
or
Vout = 2.5*(1+R3/R4)
depending on K1 position
The power consumption of the TL431 is volontarily set higher than necessary in
order to allow different A/D converter voltage supplies.
On board generated A/D converter supplies can be switched between 3.3 V and 5 V
via swith K1.
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4.2 ON-BOARD / EXTERNAL SUPPLY SELECTION
It is also possible to choose between the voltage generated by the TL431 and an
externally generated voltage for the TDA8790M A/D converter supply voltages
(VDDA=VDDD=VDDO). The choice is made via switch K2. In the case the external
supply voltage is chosen, it must be supplied through grip point TM3.
It is also possible to replace resistors R1, R2, R3, R4 with values more suited to
one’s peculiar purpose. Be sure to respect the difference limits between the suplies.
In this case, the oscillator and D/A converter supply voltages are still generated by
the 7805 regulator (IC4) which must still be supplied by the external +8V supply
voltage.
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5. VOLTAGE REFERENCES
Here is a block diagram which explains the TDA8790 operation :
Top reference (pin 10)
Roffset
I
R
E
N
C
O
D
E
R
Middle reference output (pin 8)
8
R
Bottom reference (pin 7)
Roffset
Analog signal input (pin 9)
Comparators
During the A to D conversion the analog input signal (pin9) is compared to voltage
references by the means of voltage comparators (In fact these comparators are
folding amplifiers).
The full scale analog signal input range (FS) is given by:
FS=8/9 (Top ref. - Bottom ref.) ; The 8/9 coefficient is due to the two offset resistors.
The comparator voltage references are derived from a resistor ladder which is
supplied through Vtop (pin 10) and Vbottom (pin 7). Therefore if the Vtop and
Vbottom are not well regulated the A to D conversion will be affected.
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Top reference (pin 10) is the highest voltage reference and the bottom reference (pin
7) is the lowest voltage reference. Consequently a current I is flowing from pin 10 to
pin 7.
The typical value for the internal resistor ladder is 2.1kΩ at 25°C.
As shown in the following schematic the TDA8790M is versatile in the choice of the
top voltage reference, bottom voltage reference and power supplies. So it will be
easy to find top and bottom voltage references which fit with the majority of the
applications.
resistor ladder current:
around 1 mA
Offset
resistor
(top)
Top reference
(pin 10)
Top reference range: 2.7V up to 5.5V;
VCCA>=Top ref; VCCD>=Top ref
Top offset= 1/18 * (Top - Bot)
code 255
TDA8790
Internal
resistor
(2.1kΩ)
Offset
resistor
(bottom)
Top - Bottom range : 1.5V up to 2.7V
(2.7V max.)
code 0
Full scale input = 8/9 * (Top - Bot)
Bottom offset = 1/18 * (Top - Bot)
Bottom reference
(pin 7)
Bottom reference: ≥1.1V up to 3.75V
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Regulation of Vtop & Vbottom depends on the level of cost and quality that are
required by the customer application.
Several methods providing these voltage references are shown in this section.
5.1 TOP AND BOTTOM REFERENCES DERIVED FROM A POWER SUPPLY
If the power supply is well regulated a simple resistor string stucture will be efficient
(see following figure).
Power supply
It is possible that the top reference
equal the power supply voltage. In that
case the Rtop resistor can be
removed. An optional filter can be
added on the analog supply
(depending on supply noise level).
Optionnal LC
supply filter
Rtop
Top reference
(pin 10)
Typical voltages for a 3.3V application
are 3.3V for the top reference and
1.2V for the bottom reference.
The current flowing through the 2.1kΩ
resistor ladder is ≈1mA. So Rtop=0
and Rbottom=1.2 kΩ.
This is the solution implemented on
the evaluation board.
TDA8790
Internal resistor
ladder (2.1kΩ)
Medium
reference
(pin 11)
Rbottom
Bottom reference
(pin 7)
Remarks: here, the spreads due to
process and temperature are not
taken into account.
Ground
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5.2 TOP AND BOTTOM REFERENCES DERIVED FROM REFERENCE
VOLTAGE REGULATOR(S)
In some cases (noise on supply, several ADC’s mounted in parallel ...) solutions with
precision regulators (Philips uA723, Texas TL431,...) may be preferred.
TL431 output = 2.5 *(1+P1/R2) V
8V supply
3.3V
R1=80Ω
Top reference (pin 10)
P1
TL431
R2=470Ω
Ground
TDA8790
Internal
resistor ladder
(2.1kΩ)
Bottom reference (pin 7)
P2
Ground
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If several ADC are mounted in parallel, or if a very high precision of the voltage
references over the whole temperature range is required, the following schematic
can be used :
Supply
+
supply
Top reference (pin 10)
R1
R2
TL431
R3
TDA8790
Internal
resistor ladder
(2.1kΩ)
R4
R5
Bottom reference (pin 7)
Ground
+
Ground
Operational amplifiers with a low input offset should be used. The transistor types
depend on the number of TDA8790M mounted in parallel. (1 mA typ. for one
TDA8790M)
If only one ADC is used the operational amplifier and the transistor which drive the
top reference can be skipped. In this case, the voltage regulator directly drives the
top reference.
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In the following electrical diagram, top and bottom references are regulated by only
one component (TL431):
Supply
R1
100nF
Input signal
(AC coupled)
R3
Top reference (pin 10)
Analog
input
(pin 9)
TDA8790
Internal
resistor ladder
(2.1kΩ)
R4
100nF
TL431
Bottom reference (pin 7)
R2
Ground
The (top - bottom) difference is set at 2.5V by the TL431, so the full scale input is set
at 8/9*2.5=2.22V. In addition the input offset is set at (Vtop+Vbottom)/2 by two equal
resistors (R3 and R4).
In this case the TL431 maintains the (top - bottom) difference at 2.5V over
temperature and supply variations. Because the input offset is derived from the top
and bottom references, it is also regulated at (Vtop+Vbottom)/2 over the temperature
and supply variations.
Using this method it is possible to drive the input offset and the top and bottom
references of several TDA8790M with a very good matching with only one TL431.
Typical resistor values for a 5V application and for one TDA8790M are:
R3=R4=2.2 kΩ, R1=R2=150 Ω. The current flowing trough the R1, R2 resistors is
around 8 mA (The TL431 requires a minimum current to provide a good regulation).
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5.3 ON-BOARD PRACTICAL REFERENCE VOLTAGES GENERATION
Pins VRT and VRB are decoupled to ground by 22nF ceramic capacitors.
Power supply
K4
P2
(5K)
TM4 (for external
VRT supply voltage
connection)
K3
TP4
Top reference
(pin 10)
TDA8790
Internal resistor
ladder (2.1kΩ)
Medium
reference
(pin 11)
TP3
R6 (1K2)
Bottom reference
(pin 7)
VRT is derived from VDD through potentiometer
P2 = 5 kΩ. It is also possible to force VRT to
VDD using switch K4 to short-circuit
potentiometer P2 :
Normally when VDD is set at +3.3V it is possible
to short potentiometer P2 via switch K4 to set
VRT to +3.3V = VDD.
When VDD=5V, potentiometer P2 is used to set
VRT to a voltage different from VDD (for
example, as initially set on the board, +3.3V).
Using K3 to disconnect potentiometer P2 from
the A/D converter top reference input pin, it is
possible to input the top reference voltage
directly through grip point TM4 (and the
associated ground TM5).
Ground
On the TDA8790M evaluation board, the
VRB pin of the TDA8790M is connected to ground through a fixed 1.2 kΩ resistor
(R6). The R6 resistor value has been chosen so that VRB be equal to +1.25V when
VRT is equal to +3.3V.
Thus for this board, whichever the TDA8790M voltage supply, the recommanded
VRT voltage is VRT = +3.3V when VDDA >= +3.3V, and VRT = VDDA when VDDA
< +3.3V.
If necessary the R6 resistor can be replaced with another resistor of a different value
for thorough evaluation of the A/D converter. However the VRB voltage should stay
above +1.1V in any case.
Test points TP3 and TP4 allow to measure respectively VRB and VRT voltages.
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6. INPUT OFFSET
When AC coupling is used with the TDA8790 it is necessary to provide an input
offset in order to respect the TDA8790 full scale input range.
Relations between the Vtop reference, the Vbottom reference, the maximum
amplitude of the analog signal and the input offset are:
Maximum amplitude of analog signal is (Vtop-Vbot)* 8/9 and the input signal is
centered around the input offset which is (Vtop+Vbottom)/2.
Consequently, if Vtop = 3.3 V and if Vbottom = 1.2 V the maximum amplitude of the
analog signal is 1.8 V and the input offset is 2.25V; code 0 is obtained for a 1.316V
input, and code 255 is obtained for a 3.184 V input.
Input offset can be provided by many different methods; several methods are
explained in this section.
6.1 INPUT OFFSET DERIVED FROM A RESISTOR BRIDGE
supply
input
connector
R
+
R
C
TDA8790
input pin
P
When a resistor bridge is used to provide an
offset the current flowing through the resistors
must be at least 10 times greater than the signal
current (TDA8790 analog input current is 0 to
9µA) in order to guarantee the stability of the
input offset. Consequently the resistive value of
this resistor string must be below 30 kΩ (with a
3 V supply).
ground
If the input signal generator used to test the TDA8790 requires a 50 Ω load, R must
be set at 73.33 Ω and P at 157.14 Ω (Vtop=supplies=3.3 V,Vbottom=1.2 V), in order
that the dynamic impedance (R & P in parallel) be 50 Ω.
Remarks:
- This method provides a correct input offset but the current flowing through
the resistor bridge is high: 14mA (R=75Ω, P=157Ω and 3.3V supply).
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6.2 INPUT OFFSET PRACTICAL GENERATION ON BOARD
In order to reduce this current consumption another method is used on board but it
requires at least one more component (one resistor) :
The analog signal input offset is derived from the ADC analog supply through a
resistor bridge (R1, R7 and potentiometer P1). It is adjustable thanks to P1.
R11 is equal to the output load of
the external signal generator. C16
allows ground connection between
R2 and (R5+ P1)//R7 in dynamic
mode. Typical values when a 50 Ω
signal generator is used are:
R11=50 Ω, R5=330 Ω, R7=2 kΩ
P1=2 kΩ (set approximately to 1.7
kΩ) , then the current flowing
through the resistor bridge is only
750 µA with a 3.3 V VDD.
VDDA
R5
330Ω
input
connector
J1
R11
50Ω
C16
1µF
+
P1
2kΩ
TDA8790
input pin
R7
2kΩ
Ground
- When it is possible, it is better to replace the potentiometers by fixed
resistors. This will avoid possible distortion effects on the input signal due to the
capacitive components of the potentiometers.
- It can be difficult to obtain the exact output load and the exact input offset
when they are made up of fixed resistors, because the accuracy of the resistors is
limited. Consequently in some professional applications it is better to provide the
correct load and the correct input offset by means of operational amplifiers.
6.3 INPUT OFFSET DERIVED FROM THE MEDIUM REFERENCE
In this case the input pin is connected to the medium voltage reference (pin 8) by the
means of a resistor (R1). The medium voltage reference must be well decoupled by
a capacitor (C1). The input impedance of the AD converter is given by R1 in parallel
with Zin.
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ground
C1
analog
signal
+
Vmed ref
R1 TDA8790
+
input pin
C2
Application Note
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This method gives good results in the following
domains : high common mode supply rejection
(because both the voltage references and the
input offset are derived from the same supply),
very low noise level and low cost.
R1*C1 product must be high enough in order to
avoid a coupling between the input signal and
the medium reference.
(C1=4.7µF for example)
The offset on the input pin is:
Vmed - (4.5µA*R1)
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6.4 INPUT OFFSET PROVIDED BY AN OPERATIONAL AMPLIFIER
The middle output reference voltage and a low input offset operational amplifier can
be used to provide an accurate input offset. Several methods can be used :
1°)
Top reference (pin 10)
Vmedium
reference (pin8)
Analog signal
R
R
-
TDA8790
Internal
resistor ladder
(2.1kΩ)
Signal input
(pin 9)
+
Bottom reference (pin 7)
The R resistor in the op-amp loop compensates the offset due to the R resistor
connected to Vmed. (R=1kΩ; C=1µF).
2°)
Top reference (pin 10)
+
C
R1
R2
Vmedium output
reference (pin8)
-
TDA8790
Internal
resistor ladder
(2.1kΩ)
Signal input
(pin 9)
Analog signal
Bottom reference (pin 7)
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The amplifier does not need a high bandwidth, but the time necessary to load the C
capacitor at ‘power on’ depends on.the op.amp maximum output current. The input
impedance is R2 // Zin. Zin is the A/D converter input impedance.
3°)
Top reference (pin 10)
2K
Vmedium
reference (pin8)
+
2K
R
TDA8790
Internal
resistor ladder
(2.1kΩ)
Signal input
(pin 9)
Analog signal
Bottom reference (pin 7)
Medium reference is derived from top and bottom reference (input impedance is R //
Zin).
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7. CLAMP FOR VIDEO SIGNALS
In case the TDA8790M is used for video signals digitization, a clamp circuit can prove
useful. The following schematics shows the principle of such a clamp circuit
(temperature variations are NOT compensated).
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8. CLOCK
8.1 CLOCK INPUT
On the demo-board several methods can be used (depending on switch positions) to
provide the ADC clock (see sections 2,3). Precautions must be taken if the high
clock level is higher than the VDDD level.
In fact, the TDA8790 clock input (pin 1) is protected by diodes (see figure) :
VDDD
clock input
pin 1
VDDD/2
VSSD
If the high clock level is greater than VDDD+0.5 V, a current will flow between the
clock input & VDDD through the protection diode. This will affect the proper
operation of the A/D converter.
Consequently, it is necessary to keep the high clock level below VDDD+0.5 V.
Several methods can be used to limit high clock level :
1- Use of a 3 V logic device as a 5 to 3 V interface (Philips LVC logic family for
example).
5V
logic
74LVC
logic
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2- Use of a parallel resistor/diode network in series with 5 V output (solution used on
the evaluation board).
5V
logic
TDA8790
clock input
The resistor limits current and voltage supplied to the TDA8790. The diode allows a
faster high to low transition (R=350Ω, D=BAS16/BAS32...).
3- In case of 5 V logic with an open drain output, use a pull-up resistor connected to
the low voltage supply.
VDDD
5V
logic
TDA8790
clock input
8.2 ACTUAL IMPLEMENTATION ON THE EVALUATION BOARD
40MHz
oscillator
K6
BAS16
TDA8790
clock input
J2
680
50
The resistor limits current and voltage supplied to the TDA8790. The diode allows a
faster high to low transition (R=680Ω, D=BAS16/BAS32...).
Using switch K6 it is possible to choose between external (plug J2) and on-board (40
MHz oscillator, Q1) clock for the A/D converter TDA8790M.
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8.3 CLOCK JITTER
If the clock jitter and the slope of the analog input signal are high, sampling errors
can appear.
Example :
The equation of a sinewave signal is s(t)=A/2 sin( 2 π F t), where A is the ADC full
scale amplitude (A=255 LSB) and F is the sinewave frequency.
The slope of this signal is given by: ds(t)/dt=A/2 2 π F cos(2 π F t)
This slope is maximum when t=0 (input voltage level is around middle code
127/128):
ds(0)/dt=A π F Volt/second.
That means that the middle code is available at the ADC input only during:
Tlsb=LSB/(A π F)=(255 π F )-1 second.
If the full scale sinewave frequency is F = 10 MHz, then Tlsb = 124 ps
Consequently the clock jitter must be lower than this value.
If a 20 MHz full scale sinewave is being sampled the jitter must be lower than 62 ps.
Remarks:
If the sample clock frequency and the input signal frequency have the same
jitter (or phase noise), the sampling error due to jitter can be avoided. Therefore it is
not suitable to do precise dynamic measurements of the ADC characteristics with the
on board quartz oscillator. (Except if the input signal frequency and the quartz
oscillator frequency are correlated).
9. 8 BIT D/A CONVERTER
An 8 bit 5 V supply/TTL input DAC TDA8702 (IC2) allows rough A/D converter
evaluation with a scope or a spectrum analyzer. Analog output level is in the range of
3.6 to 5 V (with a high impedance load).
It is possible to switch the reconstructed Voutput signal present on plug J4 between
non inverted and inverted via switch K8.
The D/A converter supplies are set to 5 V (by means of a 7805 regulator, IC4).
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The D/A converter clock can be chosen, via switch K7, between A/D converter clock
(selected between on-board and external via switch K6) and external clock (input via
plug J3).
10. DEMO BOARD DOCUMENTATION : ELECTRICAL DIAGRAM, COMPONENT
LIST & COMPONENTS IMPLANTATION
10.1 ELECTRICAL DIAGRAM
(see next page)
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10.2 COMPONENT LIST
Reference Value
Component
B1
B2
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
CB1
D1
D2
D3
IC1
BANANA PLUG (+8V)
BANANA PLUG (GROUND)
C1206
SPRAGUE_293D_D
SPRAGUE_293D_D
SPRAGUE_293D_D
C1206
C1206
C1206
C805
C805
C805
C805
C1206
C805
C1206
C1206
C1812
SPRAGUE_293D_D
SPRAGUE_293D_D
SPRAGUE_293D_D
C1206
C1206
C1206
C1206
C1206
SPRAGUE_293D_D
SPRAGUE_293D_D
8 BITS CONNECTOR
BAS16
BYV27_50
HLMP1700 (GREEN)
TDA8790M
100nF
22 µF
22 µF
22 µF
100 nF
100 nF
100 nF
22 nF
22 nF
22 nF
22 nF
22 nF
100 nF
100 nF
100 nF
1 µF
22 µF
22 µF
22 µF
100 nF
100 nF
100 nF
22 nF
22 nF
33 µF
22 µF
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IC2
Reference Value
IC3
IC4
J1
J2
J3
J4
K1
K2
K3
K4
K5
K6
K7
K8
L1
L2
L3
L4
L5
L6
P1
P2
Q1
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
TC1-TC8
TM1
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TDA8702T
Component
TL431
7805
BNC
BNC
BNC
BNC
SWITCH
SWITCH
SWITCH
SWITCH
SWITCH
SWITCH
SWITCH
SWITCH
12µH
LQH4N
12µH
LQH4N
12µH
LQH4N
12µH
LQH4N
12µH
LQH4N
12µH
LQH4N
2K
3224W
5K
3224W
40MHz X071009
100
RC01
680
RC01
330
RC01
1K
RC01
330
RC01
1K2
RC01
1K
RC01
680
RC01
50
RC01
50
RC01
50
RC01
SOLDER POINTS
GRIP POINT (+8V)
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TM2
TM3
Reference Value
GRIP POINT (GROUND)
GRIP POINT (A/D converter VDD)
Component
TM4
TM5
TP1-TP2
TP3
GRIP POINT (A/D converter top ref.)
GRIP POINT (GROUND)
TEST POINTS (A/D converter clock)
TEST POINT (A/D converter bottom
reference)
TEST POINTS (A/D converter top reference)
TP4
J14
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10.3 COMPONENTS IMPLANTATION
(See next page)
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