Supertex inc. VP0550 P-Channel Enhancement-Mode Vertical DMOS FETs General Description Features ►► ►► ►► ►► ►► ►► ►► This enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral source-drain diode High input impedance and high gain Applications ►► ►► ►► ►► ►► ►► Motor controls Converters Amplifiers Switches Power supply circuits Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) Ordering Information Part Number Package Option Packing VP0550N3-G VP0550N3-G P002 TO-92 1000/Bag Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Product Summary BVDSS/BVDGS -500V RDS(ON) ID(ON) (max) (min) 125Ω -100mA VP0550N3-G P003 VP0550N3-G P005 TO-92 Pin Configuration 2000/Reel VP0550N3-G P013 VP0550N3-G P014 -G denotes a lead (Pb)-free / RoHS compliant package. Contact factory for Wafer / Die availablity. Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant. DRAIN SOURCE Absolute Maximum Ratings Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±20V Operating and storage temperature -55 C to +150 C O O Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Typical Thermal Resistance Package θja TO-92 132OC/W Doc.# DSFP-VP0550 C082313 GATE TO-92 Product Marking SiVP 0 5 5 0 YYWW YY = Year Sealed WW = Week Sealed = “Green” Packaging Package may or may not include the following marks: Si or TO-92 Supertex inc. www.supertex.com VP0550 Thermal Characteristics ID Package TO-92 (continuous)† (pulsed) ID Power Dissipation @TC = 25OC IDR† IDRM -54mA -250mA 1.0W -54mA -250mA Notes: † ID (continuous) is limited by max rated Tj . Electrical Characteristics (T = 25°C unless otherwise specified) A Sym Parameter Min Typ Max Units BVDSS Drain-to-source breakdown voltage -500 - - V VGS = 0V, ID = -1.0mA VGS(th) Gate threshold voltage -2.0 - -4.5 V VGS = VDS, ID = -1.0mA Change in VGS(th) with temperature - 3.5 6.0 mV/ C VGS = VDS, ID = -1.0mA IGSS Gate body leakage current - - -100 nA VGS = ±20V, VDS = 0V - - -10 IDSS Zero gate voltage drain current ID(ON) On-state drain current ΔVGS(th) RDS(ON) ΔRDS(ON) - -90 - -100 -240 - Static drain-to-source on-state resistance - 85 - - 80 125 Change in RDS(ON) with temperature - 0.85 - %/OC VGS = -10V, ID = -10mA 25 40 - mmho VDS = -25V, ID = -10mA Input capacitance - 40 70 COSS Common source output capacitance - 10 20 CRSS Reverse transfer capacitance - 3.0 10 td(ON) Turn-on delay time - 5.0 10 Rise time - 8.0 10 Turn-off delay time - 8.0 15 Fall time - 5.0 16 Diode forward voltage drop - -0.8 Reverse recovery time - 200 VSD trr VDS = 0.8 Max Rating, VGS = 0V, TA = 125OC -1000 CISS tf VGS = 0V, VDS = Max Rating - Forward transconductance td(OFF) µA - GFS tr O Conditions mA Ω VGS = -5.0V, VDS = -25V VGS = -10V, VDS = -25V VGS = -5.0V, ID = -5mA VGS = -10V, ID = -10mA pF VGS = 0V, VDS = -25V, f = 1.0MHz ns VDD = -25V, ID = -100mA, RGEN = 25Ω -1.5 V VGS = 0V, ISD = -0.1A - ns VGS = 0V, ISD = -0.1A Notes: 1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 0V INPUT -10V Pulse Generator 10% td(ON) 0V OUTPUT VDD Doc.# DSFP-VP0550 C082313 tr td(OFF) 90% 10% RGEN 90% t(OFF) t(ON) D.U.T. tf INPUT OUTPUT RL 90% 10% 2 VDD Supertex inc. www.supertex.com VP0550 Typical Performance Curves BVDSS Variation with Temperature 1.15 1.10 VGS = -5V 160 RDS(ON) (ohms) 1.05 1.00 0.95 VGS = -10V 120 80 40 0.90 -50 0 50 100 0 150 0 -0.05 -0.10 V Transfer Characteristics -0.4 (th) 1.10 VDS = -25V -0.20 -0.25 and RDS Variation with Temperature 2.0 RDS(ON) @ -10V, -10mA VGS(th) (normalized) TA = -55OC ID (amperes) -0.15 ID (amperes) Tj ( C) O TA = 25OC -0.2 TA = 150OC 1.05 1.6 1.00 1.2 0.95 0.8 0.90 0.4 RDS(ON) (normalized) BVDSS (normalized) On-Resistance vs. Drain Current 200 V(th) @ -1.0mA 0 0 -2.0 -4.0 -6.0 -8.0 0.85 -50 -10 0 50 VGS (volts) 100 0 150 Tj (OC) Capacitance vs. Drain-to-Source Voltage Gate Drive Dynamic Characteristics -10 80 VDS = -10V f = 1MHz -8 VGS (volts) C (picofarads) 60 40 CISS VDS = -40V -6 83pF -4 20 CRSS 0 0 -10 -20 -30 0 -40 0 0.2 0.4 0.6 0.8 1.0 QG (nanocoulombs) VDS (volts) Doc.# DSFP-VP0550 C082313 30pF -2 COSS 3 Supertex inc. www.supertex.com VP0550 Typical Performance Curves (cont.) Output Characteristics -0.5 -0.4 ID (milliamps) ID (amperes) -8V -7V -0.2 -6V -0.1 0 -10 -20 -30 -40 -5V -60 -4V -40 00 -50 -2 -4 VDS (volts) -6 -8 -10 VDS (volts) Power Dissipation vs. Case Temperature Transconductance vs. Drain Current 100 -6V -8V -20 -5V 0 VGS = -10V -80 VGS = -10V -0.3 Saturation Characteristics -100 2.0 VDS = -25V TA = -55OC 25OC 60 PD (watts) GFS (millisiemens) 80 150OC 40 1.0 20 0 0 -0.05 -0.10 -0.15 -0.20 0 -0.25 0 25 50 ID (amperes) 125 150 1.0 Thermal Resistance (normalized) ID (amperes) 100 Thermal Response Characteristics Maximum Rated Safe Operating Area -1.0 -0.1 TO-92(DC) -0.01 -0.001 75 TC (OC) TC = 25OC -1 -10 -100 0.6 0.4 0.2 PD = 1.0W TC = 25OC 0 0.001 -1000 VDS (volts) Doc.# DSFP-VP0550 C082313 0.8 0.01 0.1 1.0 10 tP (seconds) 4 Supertex inc. www.supertex.com VP0550 3-Lead TO-92 Package Outline (N3) D A Seating Plane 1 2 3 L c b e1 e Side View Front View E1 E 1 3 2 Bottom View Symbol Dimensions (inches) A b c D E E1 e e1 L MIN .170 .014† .014† .175 .125 .080 .095 .045 .500 NOM - - - - - - - - - MAX .210 .022† .022† .205 .165 .105 .105 .055 .610* JEDEC Registration TO-92. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO92N3, Version E041009. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-VP0550 C082313 5 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com