Supertex inc. VP0808 P-Channel Enhancement-Mode Vertical DMOS FETs Features ►► ►► ►► ►► ►► ►► ►► General Description Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral source-drain diode High input impedance and high gain This enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Applications ►► ►► ►► ►► ►► ►► Motor controls Converters Amplifiers Switches Power supply circuits Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) Ordering Information Part Number Package Option Packing VP0808L-G VP0808L-G P002 TO-92 1000/Bag Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Product Summary BVDSS/BVDGS -80V RDS(ON) ID(ON) (max) (min) 5.0Ω -1.1A VP0808L-G P003 VP0808L-G P005 TO-92 Pin Configuration 2000/Reel VP0808L-G P013 VP0808L-G P014 -G denotes a lead (Pb)-free / RoHS compliant package. Contact factory for Wafer / Die availablity. Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant. DRAIN SOURCE Absolute Maximum Ratings Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±30V Operating and storage temperature -55 C to +150 C O O Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Typical Thermal Resistance Package θja TO-92 132OC/W Doc.# DSFP-VP0808 B082313 GATE TO-92 Product Marking Si VP 0808L YYWW YY = Year Sealed WW = Week Sealed = “Green” Packaging Package may or may not include the following marks: Si or TO-92 Supertex inc. www.supertex.com VP0808 Thermal Characteristics ID Package TO-92 (continuous)† (pulsed) ID Power Dissipation @TC = 25OC IDR† IDRM -280mA -3.0A 1.0W -280mA -3.0A Notes: † ID (continuous) is limited by max rated Tj . Electrical Characteristics (T = 25°C unless otherwise specified) A Sym Parameter Min Typ Max Units BVDSS Drain-to-source breakdown voltage -80 - - V VGS = 0V, ID = -10µA VGS(th) Gate threshold voltage -1.0 - -4.5 V VGS = VDS, ID = -1.0mA - - -100 nA VGS = ±20V, VDS = 0V - - -10 - - -500 -1.1 - - IGSS Gate body leakage current IDSS Zero gate voltage drain current ID(ON) On-state drain current RDS(ON) Static drain-to-source on-state resistance VDS = 0.8 Max Rating, VGS = 0V, TA = 125OC - A VGS = -10V, VDS = -15V - 5.0 Ω VGS = -10V, ID = -1.0A 200 - - mmho Forward transconductance CISS Input capacitance - - 150 COSS Common source output capacitance - - 60 CRSS Reverse transfer capacitance - - 25 td(ON) Turn-on time - - 15 Rise time - - 40 Turn-off time - - 30 Fall time - - 30 Diode forward voltage drop - -1.2 - td(OFF) tf VSD VGS = 0V, VDS = Max Rating µA GFS tr Conditions VDS = -10V, ID = -500mA pF VGS = 0V, VDS = -25V, f = 1.0MHz ns VDD = -25V, ID = -500mA, RGEN = 25Ω V VGS = 0V, ISD = -900mA Notes: 1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 0V INPUT -10V Pulse Generator 10% t(ON) td(ON) 0V OUTPUT VDD Doc.# DSFP-VP0808 B082313 tr td(OFF) 90% 10% RGEN 90% t(OFF) D.U.T. tf INPUT OUTPUT RL 90% 10% 2 VDD Supertex inc. www.supertex.com VP0808 3-Lead TO-92 Package Outline (L) D A Seating Plane 1 2 3 L c b e1 e Side View Front View E1 E 1 3 2 Bottom View Symbol Dimensions (inches) A b c MIN .170 .014 NOM - - MAX .210 .022 † .014 † D E E1 e e1 L .175 .125 .080 .095 .045 .500 - - - - - - .205 .165 .105 .105 .055 .610* † .022 † JEDEC Registration TO-92. * This dimension is not specified in the JEDEC drawing. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO92N3, Version E041009. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-VP0808 B082313 3 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com