NCP4629 500 mA, Wide Input Range, LDO Linear Voltage Regulator The NCP4629 is a CMOS 500 mA LDO linear voltage regulator which features a high input voltage range while maintaining a low quiescent current. Several protection features like current limiting and thermal shutdown are fully integrated to create a versatile and robust device. A high maximum input voltage (36 V) and wide temperature range (−40°C to 105°C) makes the NCP4629 an ideal choice for high power industrial applications. http://onsemi.com MARKING DIAGRAMS 6 Features • • • • • • • • • Operating Input Voltage Range: 4 V to 24 V Output Voltage Range: 3.0 to 12.0 V (available in 0.1 V steps) ±2% Output Voltage Accuracy Output Current: min. 500 mA (VIN = VOUT + 1 V) Line Regulation: 0.05%/V Current Limit Circuit Thermal Shutdown Circuit Available in SOT−89−5 and DPACK5 Package These are Pb−Free Devices • Home appliances, industrial equipment Cable boxes, satellite receivers, entertainment systems Car audio equipment, navigation systems Notebook adaptors, LCD TVs, cordless phones and private LAN systems Office equipment: copiers, printers, facsimiles, scanners, projectors, monitors NCP4629x VIN VIN C1 470 n DPAK−5 CASE 369AE 1 2 3 4 5 Heatsink surface shown as terminal 6 is internally connected to Pin 3 CE GND 2 XXX XMM 3 5 4 Heatsink surface shown as terminal 6 is internally connected to Pin 2 XXXXX = Specific Device Code MM = Date Code ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet. VOUT VOUT 6 1 SOT−89 5 CASE 528AB Typical Applications • • • • XXXXXXXX XX MM C2 10m Figure 1. Typical Application Schematic © Semiconductor Components Industries, LLC, 2012 January, 2012 − Rev. 2 1 Publication Order Number: NCP4629/D NCP4629 VIN VOUT Vref Current Limit Short Protection Thermal Shutdown CE GND Figure 2. Simplified Schematic Block Diagram PIN FUNCTION DESCRIPTION Pin No. SOT−89 Pin No. DPAK Pin Name 1 1 VIN 2 2 GND* Ground pin, all ground pins must be connected together when it is mounted on board 3 3 GND* Ground pin, all ground pins must be connected together when it is mounted on board 4 4 CE 5 5 VOUT Output pin GND Heatsink surface is internally connected to Pin 2 − GND GND Heatsink surface is internally connected to Pin 3 − GND 6 6 Description Input pin Chip enable pin (“H” active) *Pin no.2 − GND and pin no.3 − GND of SOT−89 and DPAK−5 packages must be wired to the GND line when it is mounted on board. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit VIN −0.3 to 36 V Output Voltage VOUT −0.3 to VIN ≤ 36 V Chip Enable Input VCE −0.3 to VIN ≤ 36 V Power Dissipation SOT−89−5 PD 900 mW Input Voltage Power Dissipation DPAK−5 1900 Junction Temperature TJ −40 to 150 °C Storage Temperature TSTG −55 to 125 °C ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V ESD Capability, Machine Model (Note 2) ESDMM 200 V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Duration time = 200 ms 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114) ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115) Latch−up Current Maximum Rating tested per JEDEC standard: JESD78. http://onsemi.com 2 NCP4629 THERMAL CHARACTERISTICS Rating Symbol Value Thermal Characteristics, SOT−89 Thermal Resistance, Junction−to−Air RqJA 111 Thermal Characteristics, DPAK Thermal Resistance, Junction−to−Air RqJA 53 Unit °C/W °C/W ELECTRICAL CHARACTERISTICS TA = 25°C Parameter Test Conditions Operating Input Voltage Output Voltage Output Voltage Temp. Coefficient VIN = VOUT + 1 V, IOUT = 100 mA Symbol Min Max Unit VIN 4 Typ 24 V VOUT x0.98 x1.02 V ppm/°C ±100 VIN = VOUT + 2 V, IOUT = 100 mA, TA = −40 to 105°C Line Regulation VIN = VOUT + 1 V to 24 V, IOUT = 10 mA LineReg 0.05 0.10 %/V Load Regulation VIN = VOUT + 2 V, IOUT = 0.1 mA to 200 mA LoadReg 25 60 mV VDO 0.135 0.225 V 5.0 V ≤ VOUT < 9.0 V 0.115 0.180 8.0 V ≤ VOUT ≤ 12.0 V 0.095 0.155 Dropout Voltage Output Current IOUT = 200 mA 3.0 V ≤ VOUT < 5.0 V VIN = VOUT + 1 V IOUT Short Current Limit VOUT = 0 V ISC 500 65 mA Quiescent Current VIN = VOUT + 1 V, VIN = VCE IQ 70 130 mA Standby Current VIN = 24 V, VCE = 0 V ISTB 0.1 1 mA CE Pin Threshold Voltage CE Input Voltage “H” VCEH 2.0 VIN V CE Input Voltage “L” VCEL 0 0.4 mA Thermal Shutdown Temperature TSD 160 °C Thermal Shutdown Release Temperature TSR 135 °C PSRR 60 dB Power Supply Rejection Ratio Output Noise Voltage VIN = VOUT + 2.0 V, ΔVIN_PK−PK = 0.5 V, IOUT = 100 mA, f = 1 kHz VOUT ≤ 6.0 V VOUT > 6.0 V VOUT = 5.0 V, IOUT = 30 mA, f = 10 Hz to 100 kHz http://onsemi.com 3 50 VNOISE 125 mVrms NCP4629 TYPICAL CHARACTERISTICS 6 7 VOUT, OUTPUT VOLTAGE (V) VOUT, OUTPUT VOLTAGE (V) 9.0 V 5 VIN = 5.5 V 4 6.0 V 7.0 V 3 2 1 0 200 400 600 800 8.0 V 3 10 V 2 1 0 200 400 600 800 1000 1200 IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA) Figure 3. Output Voltage vs. Output Current, VOUT = 5 V Figure 4. Output Voltage vs. Output Current, VOUT = 6 V 6 VOUT, OUTPUT VOLTAGE (V) 12 VIN = 12.5 V 10 13 V 8 15 V 6 16 V 4 2 0 200 400 600 800 5 4 IOUT = 0.1 mA 3 0 1 2 3 4 5 6 7 8 9 IOUT, OUTPUT CURRENT (mA) VIN, INPUT VOLTAGE (V) Figure 5. Output Voltage vs. Output Current, VOUT = 12 V Figure 6. Output Voltage vs. Input Voltage, VOUT = 5 V 14 6 12 5 IOUT = 0.1 mA 3 2 100 mA 1 500 mA 0 500 mA 1 7 4 100 mA 2 0 1000 VOUT, OUTPUT VOLTAGE (V) VOUT, OUTPUT VOLTAGE (V) VOUT, OUTPUT VOLTAGE (V) 7.0 V 4 1000 14 0 VIN = 6.5 V 5 0 0 0 6 1 2 3 4 5 6 7 8 9 10 8 IOUT = 0.1 mA 6 100 mA 4 2 0 10 500 mA 0 3 6 9 12 VIN, INPUT VOLTAGE (V) VIN, INPUT VOLTAGE (V) Figure 7. Output Voltage vs. Input Voltage, VOUT = 6 V Figure 8. Output Voltage vs. Input Voltage, VOUT = 12 V http://onsemi.com 4 10 15 NCP4629 TYPICAL CHARACTERISTICS 6.1 VOUT, OUTPUT VOLTAGE (V) VOUT, OUTPUT VOLTAGE (V) 5.1 5.05 5 4.95 4.9 −40 −20 0 20 40 60 80 100 6 5.95 5.9 −40 120 −20 0 40 60 80 100 TEMPERATURE (°C) TEMPERATURE (°C) Figure 10. Output Voltage vs. Temperature, VOUT = 6 V 120 80 SUPPLY CURRENT (mA) 70 12.05 12 11.95 60 50 40 30 20 10 11.9 −40 −20 0 20 40 60 80 100 0 120 0 1 2 3 Figure 11. Output Voltage vs. Temperature, VOUT = 12 V 5 6 7 8 9 10 Figure 12. Supply Current vs. Input Voltage, VOUT = 5 V 80 70 70 SUPPLY CURRENT (mA) 80 60 50 40 30 20 60 50 40 30 20 10 10 0 4 VIN, INPUT VOLTAGE (V) TEMPERATURE (°C) SUPPLY CURRENT (mA) 20 Figure 9. Output Voltage vs. Temperature, VOUT = 5 V 12.1 VOUT, OUTPUT VOLTAGE (V) 6.05 0 2 4 6 8 10 0 12 0 VIN, INPUT VOLTAGE (V) 2 4 6 8 10 VIN, INPUT VOLTAGE (V) Figure 13. Supply Current vs. Input Voltage, VOUT = 6 V 12 14 Figure 14. Supply Current vs. Input Voltage, VOUT = 12 V http://onsemi.com 5 16 NCP4629 0.4 0.4 0.35 0.35 0.3 25°C 0.25 TA = 110°C 0.2 0.15 −40°C 0.1 DROPOUT VOLTAGE (V) DROPOUT VOLTAGE (V) TYPICAL CHARACTERISTICS 0.25 0.2 0.15 −40°C 0.1 0 100 200 300 400 500 0 0 200 300 400 500 Figure 16. Dropout Voltage vs. Input Current, VOUT = 6 V 0.4 120 0.35 100 0.3 80 TA = 110°C 0.25 0.2 PSRR (dB) DROPOUT VOLTAGE (V) 100 IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (mA) Figure 15. Dropout Voltage vs. Input Current, VOUT = 5 V 25°C 0.15 0.1 −40°C 0 0 100 200 IOUT = 1 mA 60 40 100 mA 20 0.05 300 400 500 300 mA 0 0.1 IOUT, OUTPUT CURRENT (mA) 100 100 80 80 IOUT = 1 mA 100 mA 20 0 PSRR (dB) 120 40 1.0 10.0 60 100.0 1000 IOUT = 1 mA 40 100 mA 20 300 mA 0.1 10.0 Figure 18. Ripple Rejection vs. Frequency, VOUT = 5 V 120 60 1.0 FREQUENCY (kHz) Figure 17. Dropout Voltage vs. Input Current, VOUT = 12 V PSRR (dB) 25°C TA = 110°C 0.05 0.05 0 0.3 100.0 1000 0 300 mA 0.1 1.0 10.0 100.0 FREQUENCY (kHz) FREQUENCY (kHz) Figure 19. Ripple Rejection vs. Frequency, VOUT = 6 V Figure 20. Ripple Rejection vs. Frequency, VOUT = 12 V http://onsemi.com 6 1000 NCP4629 TYPICAL CHARACTERISTICS 12 VN, NOISE DENSITY (mVrms/√Hz) 7 6 5 4 3 2 1 0 0.01 0.1 1 10 100 10 8 6 4 2 0 0.01 1000 0.1 1 10 100 FREQUENCY (kHz) FREQUENCY (kHz) Figure 21. Output Noise Density, VOUT = 5 V, VIN = 6.0 V, IOUT = 30 mA Figure 22. Output Noise Density, VOUT = 6 V, VIN = 7.0 V, IOUT = 30 mA VN, NOISE DENSITY (mVrms/√Hz) 30 25 20 15 10 5 0 0.01 0.1 1 10 FREQUENCY (kHz) 100 1000 Figure 23. Output Noise Density, VOUT = 12 V, VIN = 13 V, IOUT = 30 mA 750 500 250 0 5.10 IOUT (mA) VOUT (V) VN, NOISE DENSITY (mVrms/√Hz) 8 5.05 5.00 4.95 4.90 4.85 4.80 0.0 0.2 0.4 0.6 0.8 1.0 1.2 t (ms) 1.4 1.6 1.8 Figure 24. Load Transient Response at Output Current Step 1 mA to 500 mA, VOUT = 5 V http://onsemi.com 7 2.0 1000 NCP4629 TYPICAL CHARACTERISTICS 750 500 250 IOUT (mA) VOUT (V) 0 6.10 6.05 6.00 5.95 5.90 5.85 5.80 0.0 0.2 0.4 0.6 0.8 1.0 1.2 t (ms) 1.4 1.6 1.8 2.0 Figure 25. Load Transient Response at Output Current Step 1 mA to 500 mA, VOUT = 6 V 750 500 250 12.10 IOUT (mA) VOUT (V) 0 12.05 12.00 11.95 11.90 11.85 11.80 0.0 0.2 0.4 0.6 0.8 1.0 1.2 t (ms) 1.4 1.6 1.8 2.0 Figure 26. Load Transient Response at Output Current Step 1 mA to 500 mA, VOUT = 12 V 150 100 50 IOUT (mA) VOUT (V) 0 5.02 5.01 5.00 4.99 4.98 4.97 0 40 80 120 160 200 240 280 320 360 400 t (ms) Figure 27. Load Transient Response at Output Current Step 50 mA to 100 mA, VOUT = 5 V http://onsemi.com 8 NCP4629 TYPICAL CHARACTERISTICS 150 100 50 IOUT (mA) VOUT (V) 0 6.02 6.01 6.00 5.99 5.98 5.97 0 40 80 120 160 200 240 280 320 360 400 t (ms) Figure 28. Load Transient Response at Output Current Step 50 mA to 100 mA, VOUT = 6 V 150 100 50 IOUT (mA) VOUT (V) 0 12.02 12.01 12.00 11.99 11.98 11.97 0 40 80 120 160 200 240 280 320 360 400 t (ms) Figure 29. Load Transient Response at Output Current Step 50 mA to 100 mA, VOUT = 12 V 9 8 7 VIN (V) VOUT (V) 6 5.06 5.04 5.02 5.00 4.98 4.96 4.94 0 20 40 60 80 100 120 140 160 180 200 t (ms) Figure 30. Line Transient Response, VOUT = 5 V http://onsemi.com 9 NCP4629 TYPICAL CHARACTERISTICS 10 9 8 VIN (V) VOUT (V) 7 6.06 6.04 6.02 6.00 5.98 5.96 5.94 0 20 40 60 80 100 120 140 160 180 200 t (ms) Figure 31. Line Transient Response, VOUT = 6 V 16 15 14 VIN (V) 12.04 12.02 12.00 11.98 11.96 11.94 0 20 40 60 80 100 120 140 160 180 200 t (ms) Figure 32. Line Transient Response, VOUT = 12 V 9 Chip Enable 6 3 5 IOUT = 1 mA 4 IOUT = 100 mA 3 2 IOUT = 500 mA 1 0 −1 0 40 80 120 160 200 240 280 320 360 400 t (ms) Figure 33. Turn−on Behavior with CE, VOUT = 5 V http://onsemi.com 10 VCE (V) 0 VOUT (V) VOUT (V) 13 12.06 NCP4629 TYPICAL CHARACTERISTICS 10.5 Chip Enable 7.0 3.5 VCE (V) VOUT (V) 0.0 10 8 6 IOUT = 1 mA IOUT = 100 mA 4 2 IOUT = 500 mA 0 −2 0 40 80 120 160 200 240 280 320 360 400 t (ms) Figure 34. Turn−on Behavior with CE, VOUT = 6 V 19.5 Chip Enable 13 10 0 IOUT = 1 mA IOUT = 100 mA 8 6 VCE (V) VOUT (V) 6.5 IOUT = 500 mA 4 2 0 −2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 t (ms) Figure 35. Turn−on Behavior with CE, VOUT = 12 V 9 6 3 Chip Enable 4 VCE (V) VOUT (V) 0 5 IOUT = 1 mA 3 2 IOUT = 100 mA 1 0 −1 IOUT = 500 mA 0 1 2 3 4 5 t (ms) 6 7 8 Figure 36. Turn−off Behavior with CE, VOUT = 5 V http://onsemi.com 11 9 10 NCP4629 TYPICAL CHARACTERISTICS 10.5 7.0 3.5 0.0 VCE (V) VOUT (V) Chip Enable 6 IOUT = 1 mA 4 2 0 −2 IOUT = 100 mA IOUT = 500 mA 0 2 4 6 8 10 12 14 16 18 20 t (ms) Figure 37. Turn−off Behavior with CE, VOUT = 6 V 19.5 13.0 6.5 Chip Enable VCE (V) VOUT (V) 0 12 9 IOUT = 1 mA 6 3 0 −3 IOUT = 100 mA IOUT = 500 mA 0 4 8 12 16 20 24 28 32 t (ms) Figure 38. Turn−off Behavior with CE, VOUT = 12 V http://onsemi.com 12 36 40 NCP4629 APPLICATION INFORMATION Output Decoupling Capacitor (C2) A typical application circuit for NCP4629 series is shown in Figure 39. NCP4629x VIN VIN C1 470 n A 10 mF ceramic output decoupling capacitor is sufficient to achieve stable operation of the IC. If tantalum capacitor is used, and its ESR is high, the loop oscillation may result. The capacitor should be connected as close as possible to the output and ground pin. Larger values and lower ESR improves dynamic parameters. VOUT VOUT C2 10 m CE GND Enable Operation The enable pin CE may be used for turning the regulator on and off. The IC is switched on when a high level voltage is applied to the CE pin. The enable pin has an internal pull down current source. If the enable function is not needed connect CE pin to VIN. Figure 39. Typical Application Schematic When VOUT voltage could be higher than VIN voltage it is necessary to use protective diode D1. If there is possibility that VOUT voltage could be negative then it is necessary to use schottky diode D2. See Figure 40 for details. Do not force the voltage to the VOUT pin. Thermal As a power across the IC increase, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and also the ambient temperature affect the rate of temperature increase for the part. When the device has good thermal conductivity through the PCB the junction temperature will be relatively low in high power dissipation applications. The IC includes internal thermal shutdown circuit that stops operation of regulator, if junction temperature is higher than 160°C. After that, when junction temperature decreases below 135°C, the operation of voltage regulator would restart. While high power dissipation condition is, the regulator starts and stops repeatedly and protects itself against overheating. D1 NCP4629x VIN VIN C1 470 n CE VOUT VOUT C2 10 m GND D2 Figure 40. Typical Application Schematic with Protective Diodes PCB layout Pins number 2 and 3 must be wired to the GND plane while it is mounted on board. Make VIN and GND lines sufficient. If their impedance is high, noise pickup or unstable operation may result. Connect capacitors C1 and C2 as close as possible to the IC, and make wiring as short as possible. Input Decoupling Capacitor (C1) A 470 nF ceramic input decoupling capacitor should be connected as close as possible to the input and ground pin of the NCP4629. Higher values and lower ESR improves line transient response. ORDERING INFORMATION Nominal Output Voltage Description Marking Package Shipping† NCP4629HDT050T5G 5.0 V Enable High C1J050B DPAK−5 (Pb−Free) 3000 / Tape & Reel NCP4629HDT060T5G 6.0 V Enable High C1J060B DPAK−5 (Pb−Free) 3000 / Tape & Reel NCP4629HDT120T5G 12.0 V Enable High C1J120B DPAK−5 (Pb−Free) 3000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *To order other package and voltage variants, please contact your ON Semiconductor sales representative. http://onsemi.com 13 NCP4629 PACKAGE DIMENSIONS DPAK−5 (TO−252, 5 LEAD) CASE 369AE ISSUE O C A E b2 A B c2 L3 Z D H DETAIL A 1 2 3 4 E2 5 c e SIDE VIEW C A B b TOP VIEW 0.12 M BOTTOM VIEW H C L2 GUAGE PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. THERMAL PAD CONTOUR OPTIONAL, WITHIN DIMENSIONS b3, E2, L3 AND Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15mm PER SIDE. THESE DIMENSIONS TO BE MEASURED AT DATUM H. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. DIM A A1 b b2 c c2 D E E2 e H L L1 L2 L3 Z 0.10 C L A1 L1 DETAIL A RECOMMENDED SOLDERING FOOTPRINT* 5.70 6.00 10.50 5X 2.10 5X 1.27 PITCH 0.80 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 14 MILLIMETERS MIN MAX 2.10 2.50 0.00 0.13 0.40 0.60 5.14 5.54 0.40 0.60 0.40 0.60 5.90 6.30 6.40 6.80 5.04 REF 1.27 BSC 9.60 10.20 1.39 1.78 2.50 2.90 0.51 BSC 0.90 1.30 2.74 REF NCP4629 PACKAGE DIMENSIONS SOT−89, 5 LEAD CASE 528AB ISSUE O D E NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. LEAD THICKNESS INCLUDES LEAD FINISH. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5. DIMENSIONS L, L2, L3, L4, L5, AND H ARE MEASURED AT DATUM PLANE C. H DIM A b b1 c D D2 E e H L L2 L3 L4 L5 1 TOP VIEW c A 0.10 C C SIDE VIEW e b1 L 1 e b 2 L3 L4 RECOMMENDED MOUNTING FOOTPRINT* L2 4X 3 0.57 1.75 L5 5 MILLIMETERS MIN MAX 1.40 1.60 0.32 0.52 0.37 0.57 0.30 0.50 4.40 4.60 1.40 1.80 2.40 2.60 1.40 1.60 4.25 4.45 1.10 1.50 0.80 1.20 0.95 1.35 0.65 1.05 0.20 0.60 4 2.79 1.50 0.45 4.65 D2 BOTTOM VIEW 1.30 1.65 1 2X 2X 0.62 1.50 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 http://onsemi.com 15 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCP4629/D