http://www.variscite.com/images/stories/DataSheets/VAR-SOM-AM43/VAR-AM43CUSTOMBOARD_SCH_1_2_DOC_1_1A.PDF

5
4
3
2
1
01. Cover
VAR-AM43CustomBoard
Revision History
D
D
Document Carrier
C
A
1.0
Initial
1.1
1.1
Production
1.2
1.1A
Changed U1 package
Removed R2
D102.5 Disconnected
R21 pulled down
Updated notes section
CONTENT
PAGE NO.
B
1.0
C
SCHEMATIC PAGE
1
Cover
2
Block Diagram
3
VAR-SOM-AM43
4
Display,Touch,Camera
5
G. Ethernet
6
USB, Audio
7
Peripherals
8
DVK Exp Connectors
9
Power, Mechanics
B
Disclaimer:
A
SchematicS are for reference only.
Variscite LTD provides no warranty for the use of
these schematics.
Schematics are subject to change without notice.
Title
01. Cover
Size
A3
Document Number
VAR-AM43CustomBoard
Designer:
<Designer>
Sunday, October 11, 2015
Date:
5
4
3
2
Project
VAR-AM43CustomBoard
Approved By:
1
Sheet
1
Rev
1.1A
<Approved By>
9
of
5
4
02. Block Diagram
3
2
1
VAR-AM43CustomBoard
VAR-SOM-AM43
D
D
uSD
OV2659
Module
Ext.
connector
Ext.
connector
3.3V
DC-DC
24bit LCDCtrl
(WXGA)
18 bit
LVDS
Serializer
CAN
Transceiver
RX0/TX0
CAN0
CAN1
CAN
Transceiver
RX1/TX1
CAN1
RS485
Transceiver
RS232
Transceiver
USB to
UART
RS232
USB
LVDS
Ext.
connector
Sysboot
Boot Sel
Button
C
UART0
(Debug)
UART
ADC0 (8ch)
TSC (ch 0-7)
Ext.
connector
McASP0/SPI1
McASP0/SPI1
Ext.
connector
McASP1
TSC (ch 0-3)
FFC/FPC
UART3
Audio
Codec
I2C
I2C1
Line Out
Audio
AMP
Headphones
Line In
Ext.
connector
I2C0, I2C1
GPIO
GPIOs
RTC
BAT
Stereo
Jack
Stereo
Jack
B
SPI
SPI2
``
A
5V DC JACK/
Terminal
UART2
UART1
FFC/FPC
Buttons/
Leds
Ext.
connector
5V
Parallel
Camera1
CAN0
RS485
B
Camera1
POWER
Camera1
C
Ext.
connector
USB Type
Micro-AB
Ext.
connector
Ext.
connector
SD/MMC
MMC0
RTC
USB Type- A
Reset
USB Type
Micro-AB
USB OTG/HOST
USB Type- A
USB HOST
Dmic
Digital Mic
RX/TX + LEDs
RJ45
EMAC0
RGMII1
I2C1
Gb ETH
PHY
System Ctrl
USB 2.0 OTG
+ PHY (x2)
JTAG Ext.
connector
EMAC1
RGMII2
Gb ETH
PHY
RX/TX + LEDs
RJ45
A
Title
02. Block Diagram
Size
A3
Document Number
VAR-AM43CustomBoard
Designer:
<Designer>
Date:
Sunday, June 28, 2015
Project
VAR-AM43CustomBoard
Approved By:
Sheet
2
Rev
1.1A
<Approved By>
of
9
5
03. VAR-SOM-AM43
4
3
2
1
J1
CAM1_DATA6
CAM1_DATA5
CAM1_WEN_GPIO4_13
CAM1_FIELD_GPIO4_12
MDI_A_P
MDI_A_M
MDI_B_P
MDI_B_M
MDI_C_P
MDI_C_M
MDI_D_P
MDI_D_M
LED_ACT
LED_LINK_1000
LED_LINK_10_100
AM437X_USB0_VBUS_DET
AM437X_USB1_DRVVBUS
UART0_TXD
I2C1_SDA
UART2_TXD
AM437X_LCD_HSYNC
AM437X_LCD_DATA0
AM437X_LCD_DATA2
AM437X_LCD_DATA5
AM437X_LCD_DATA9
SPI2_CS0
AM437X_USB1_DP
AM437X_USB1_DM
AM437X_USB1_VBUS
C
VBAT_3P3V
1
AM437X_USB0_DP
AM437X_USB0_DM
AM437X_USB0_VBUS
2
C158
GPIO2_5
AM437X_DCAN1_TX/UART1_RXD
22uF
RS485_TXD_EN
MCASP0_ACLKR
AM437X_DCAN1_RX/UART1_TXD
AM437X_LCD_DATA10
MCASP0_AXR0/SPI1_D1
AM437X_LCD_DATA6
AM437X_LCD_DATA11
GPIO0_30
AM437X_LCD_DATA13
GPIO_1_14
AM437X_MMC0_DAT1
AM437X_MMC0_CLK
AM437X_MMC0_DAT3
AM437X_MMC0_CMD
AM437X_MMC0_DAT0
GPIO5_6
GPIO0_31
AM437X_AIN1
AM437X_AIN7
GPIO2_4
GPIO1_7
B
GPIO4_8
AM437X_PORZn
GPIO1_4
GPIO1_5
GPIO1_6
AM437X_LCD_DATA19
GPIO1_3
GPIO1_2
GPIO1_1
GPIO1_0
AM437X_LCD_DATA22
AM437X_LCD_DATA23
AM437X_LCD_DATA20
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
gpmc_a5/gmii2_txd0/rgmii2_td0/rmii2_txd0/gpmc_a21/pr1_mii1_txd0/eQEP1B_in/gpio1_21
uart3_txd/pr0_pru0_gpo19/pr0_pru0_gpi19/ehrpwm4B/gpio5_3
gpmc_a4/gmii2_txd1/rgmii2_td1/rmii2_txd1/gpmc_a20/pr1_mii1_txd1/eQEP1A_in/gpio1_20
uart3_rxd/pr0_pru0_gpo18/pr0_pru0_gpi18/ehrpwm4A/gpio5_2
gpmc_a3/gmii2_txd2/rgmii2_td2/mmc2_dat2/gpmc_a19/pr1_mii1_txd2/ehrpwm1B/gpio1_19
uart3_rtsn/hdq_sio/pr0_pru1_gpo19/pr0_pru1_gpi19/ehrpwm5B/gpio5_1
gpmc_a2/gmii2_txd3/rgmii2_td3/mmc2_dat1/gpmc_a18/pr1_mii1_txd3/ehrpwm1A/gpio1_18
uart3_ctsn/spi4_cs1/pr0_pru1_gpo18/pr0_pru1_gpi18/ehrpwm5A/gpio5_0
gpmc_a6/gmii2_txclk/rgmii2_tclk/mmc2_dat4/gpmc_a22/pr1_mii_mt1_clk/eQEP1_index/gpio1_22
GND#21
gpmc_a0/gmii2_txen/rgmii2_tctl/rmii2_txen/gpmc_a16/pr1_mii1_txen/ehrpwm1_tripzone_input/gpio1_16
gpmc_a7/gmii2_rxclk/rgmii2_rclk/mmc2_dat5/gpmc_a23/pr1_mii_mr1_clk/eQEP1_strobe/gpio1_23
cam1_pclk/xdma_event_intr6/spi1_cs3/pr0_pru1_gpo3/spi2_sclk/pr0_pru1_gpi3/ehrpwm1A/gpio4_11
gpmc_a1/gmii2_rxdv/rgmii2_rctl/mmc2_dat0/gpmc_a17/pr1_mii1_rxdv/ehrpwm0_synco/gpio1_17
cam1_data7/uart1_dtrn/uart2_rtsn/mmc2_dat3/pr0_pru1_gpo15/pr0_pru1_gpi15/pr1_edio_data_in1/gpio4_21
gpmc_a11/gmii2_rxd0/rgmii2_rd0/rmii2_rxd0/gpmc_a27/pr1_mii1_rxd0/mcasp0_axr1/gpio1_27
cam1_hd/xdma_event_intr4/spi0_cs3/pr0_pru1_gpo1/spi2_cs0/pr0_pru1_gpi1/ehrpwm0A/gpio4_9
gpmc_a10/gmii2_rxd1/rgmii2_rd1/rmii2_rxd1/gpmc_a26/pr1_mii1_rxd1/mcasp0_axr0/gpio1_26
GND#19
gpmc_a9/gmii2_rxd2/rgmii2_rd2/mmc2_dat7/gpmc_a25/pr1_mii1_rxd2/mcasp0_fsx/gpio1_25/rmii2_crs_dv
cam1_data6/uart1_dcdn/uart2_ctsn/mmc2_dat2/pr0_pru1_gpo14/pr0_pru1_gpi14/pr1_edio_data_in0/gpio4_20
gpmc_a8/gmii2_rxd3/rgmii2_rd3/mmc2_dat6/gpmc_a24/pr1_mii1_rxd3/mcasp0_aclkx/gpio1_24
cam1_data5/uart1_dsrn/uart2_txd/mmc2_dat1/pr0_pru1_gpo13/pr0_pru1_gpi13/pr1_edio_latch_in/gpio4_19
GND#20
cam1_wen/xdma_event_intr8/pr1_edio_sof/cam0_data11/pi2_d1/cam1_data11/EMU11/gpio4_13/ehrpwm3B
cam1_vd/xdma_event_intr5/spi1_cs2/pr0_pru1_gpo2/spi2_cs2/pr0_pru1_gpi2/ehrpwm0B/gpio4_10
cam1_field/xdma_event_intr7/ext_hw_trigger/cam0_data10/spi2_cs1/cam1_data10/ehrpwm1B/gpio4_12/ehrpwm3A
cam1_data4/uart1_rin/uart2_rxd/mmc2_dat0/pr0_pru1_gpo12/pr0_pru1_gpi12/pr1_edc_latch1_in/gpio4_18/uart0_dcdn
GND#8
cam1_data3/uart1_rtsn/spi3_sclk/mmc2_cmd/pr0_pru1_gpo11/pr0_pru1_gpi11/pr1_edc_latch0_in/gpio4_17
MDI_A+
cam0_data0/cam1_data9/I2C1_SDA/pr0_pru1_gpo16/pr0_pru1_gpi16/ehrpwm0_synco/gpio5_19
MDI_Acam1_data2/uart1_ctsn/spi3_cs0/mmc2_clk/pr0_pru1_gpo10/pr0_pru1_gpi10/ehrpwm1_tripzone_input/gpio4_16
GND#15
cam1_data1/uart1_txd/spi3_d1/I2C2_SCL/ehrpwm0_synci/gpio4_15
MDI_B+
cam1_data0/uart1_rxd/spi3_d0/I2C2_SDA/ehrpwm0_tripzone_input/gpio4_14
MDI_BETH_MDIO_CLK
GND#17
ETH_MDIO_DATA
MDI_C+
GND#24
MDI_Ccam0_data1/cam1_data8/I2C1_SCL/pr0_pru1_gpo17/pr0_pru1_gpi17/ehrpwm3_synco/gpio5_20
GND#16
cam0_data2/mmc1_clk/cam1_data10/qspi_clk/gpio4_24
MDI_D+
cam0_data3/mmc1_cmd/cam1_data11/qspi_csn/gpio4_25
MDI_Dspi0_cs1/uart3_rxd/eCAP1_in_PWM1_out/mmc0_pow/xdma_event_intr2/mmc0_sdcd/EMU4/gpio0_6/ehrpwm2A/timer0
GND#18
mcasp0_aclkx/ehrpwm0A/spi0_cs3/spi1_sclk/mmc0_sdcd/pr0_pru0_gpo0/pr0_pru0_gpi0/gpio3_14
LED_ACT
spi4_sclk/ehrpwm0_synci/gpio5_4
LED_LINK_1000
mcasp0_ahclkr/ehrpwm0_synci/mcasp0_axr2/spi1_cs0/eCAP2_in_PWM2_o/pr0_pru0_gpo3/pr0_pru0_gpi3/gpio3_17
LED_LINK_10_100
mcasp0_ahclkx/eQEP0_strobe/mcasp0_axr3/mcasp1_axr1/EMU4/pr0_pru0_gpo7/pr0_pru0_gpi7/gpio3_21/gpio0_3
uart0_ctsn/uart4_rxd/dcan1_tx/I2C1_SDA/spi1_d0/timer7/pr1_edc_sync0_out/gpio1_8
mcasp0_axr1/eQEP0_index/mcasp1_axr0/EMU3/pr0_pru0_gpo6/pr0_pru0_gpi6/gpio3_20/gpio0_2
pr1_mii1_col/gpio5_9
uart0_rtsn/uart4_txd/dcan1_rx/I2C1_SCL/spi1_d1/spi1_cs0/pr1_edc_sync1_out/gpio1_9
USB1_DRVVBUS/gpio3_13/gpio0_25
uart0_rxd/spi1_cs0/dcan0_tx/I2C2_SDA/eCAP2_in_PWM2_out/pr0_pru1_gpo4/pr0_pru1_gpi4/gpio1_10
uart0_txd/spi1_cs1/dcan0_rx/I2C2_SCL/eCAP1_in_PWM1_out/pr0_pru1_gpo5/pr0_pru1_gpi5/gpio1_11
eCAP0_in_PWM0_out/uart3_txd/spi1_cs1/pr1_ecap0_ecap_capin_apwm_o/spi1_sclk/mmc0_sdwp/xdma_event_intr2/gpio0_7/ehrpwm2B/timer1
spi0_d1/mmc1_sdwp/I2C1_SDA/ehrpwm0_tripzone_input/pr1_uart0_rxd/pr0_uart0_rxd/pr1_edio_data_out0/gpio0_4/ehrpwm1A
spi0_cs0/mmc2_sdwp/I2C1_SCL/ehrpwm0_synci/pr1_uart0_txd/pr0_uart0_txd/pr1_edio_data_out1/gpio0_5/ehrpwm1B
spi0_d0/uart2_txd/I2C2_SCL/ehrpwm0B/pr1_uart0_rts_n/pr0_uart0_rts_n/EMU3/gpio0_3
GND#26
dss_hsync/gpmc_a9/gpmc_a2/pr1_edio_data_in3/pr1_edio_data_out3/pr0_pru1_gpo7/pr0_pru1_gpi7/gpio2_23
dss_vsync/gpmc_a8/gpmc_a1/pr1_edio_data_in2/pr1_edio_data_out2/pr0_pru1_gpo6/pr0_pru1_gpi6/gpio2_22
dss_data0/gpmc_a0/pr1_mii_mt0_clk/ehrpwm2A/pr1_pru0_gpo0/pr1_pru0_gpi0/gpio2_6
dss_ac_bias_en/gpmc_a11/gpmc_a4/pr1_edio_data_in5/pr1_edio_data_out5/pr0_pru1_gpo9/pr0_pru1_gpi9/gpio2_25
dss_data2/gpmc_a2/pr1_mii0_txd3/ehrpwm2_tripzone_input/pr1_pru0_gpo2/pr1_pru0_gpi2/gpio2_8
dss_pclk/gpmc_a10/gpmc_a3/pr1_edio_data_in4/pr1_edio_data_out4/pr0_pru1_gpo8/pr0_pru1_gpi8/gpio2_24
dss_data5/gpmc_a5/pr1_mii0_txd0/eQEP2B_in/pr1_pru0_gpo5/pr1_pru0_gpi5/gpio2_11
dss_data1/gpmc_a1/pr1_mii0_txen/ehrpwm2B/pr1_pru0_gpo1/pr1_pru0_gpi1/gpio2_7
dss_data9/gpmc_a13/ehrpwm0_synco/mcasp0_fsx/uart5_rxd/pr1_mii0_rxd2/uart2_rtsn/gpio2_15
dss_data4/gpmc_a4/pr1_mii0_txd1/eQEP2A_in/pr1_pru0_gpo4/pr1_pru0_gpi4/gpio2_10
spi2_cs0/I2C1_SDA/ehrpwm2_tripzone_input/gpio3_25/gpio0_23
spi2_d0/ehrpwm5_tripzone_input/gpio3_22/gpio0_20
GND#22
spi0_sclk/uart2_rxd/I2C2_SDA/ehrpwm0A/pr1_uart0_cts_n/pr0_uart0_cts_n/EMU2/gpio0_2
USB1_DP
USB0_ID
USB1_DM
spi2_d1/ehrpwm1_tripzone_input/gpio3_23/gpio0_21
USB1_VBUS
mcasp0_fsx/ehrpwm0B/spi1_cs2/spi1_d0/mmc1_sdcd/pr0_pru0_gpo1/pr0_pru0_gpi1/gpio3_15
GND#5
spi2_sclk/I2C1_SCL/ehrpwm4_tripzone_input/gpio3_24/gpio0_22
USB0_DP
GND#23
USB0_DM
USB0_DRVVBUS/gpio0_18/gpio5_27
USB0_VBUS
VBAT#6
GND#12
VBAT#5
VBAT#1
VBAT#4
VBAT#2
GND#2
VBAT#3
GND#11
gpmc_be0n_cle/spi1_cs3/timer5/qspi_d3/pr1_mii1_rxlink/gpmc_a5/spi3_cs1/gpio2_5
VDDA_ADC
uart1_rxd/mmc1_sdwp/dcan1_tx/I2C1_SDA/pr1_uart0_rxd/pr1_pru0_gpi16/gpio0_14
GNDA_ADC
Backup_Battery
pr1_mii0_col/gpio5_8
pr1_mii1_rxlink/gpio5_13
gpmc_ad12/dss_data19/mmc1_dat4/mmc2_dat0/eQEP2A_in/pr1_mii0_txd2/pr1_pru0_gpi10/gpio1_12/mcasp0_aclkx/pr1_pru0_gpo10
mcasp0_aclkr/eQEP0A_in/mcasp0_axr2/mcasp1_aclkx/mmc0_sdwp/pr0_pru0_gpo4/pr0_pru0_gpi4/gpio3_18/gpio0_18
GND#1
uart1_txd/mmc2_sdwp/dcan1_rx/I2C1_SCL/pr1_uart0_txd/pr1_pru0_gpi16/gpio0_15
uart1_rtsn/timer5/dcan0_rx/I2C2_SCL/spi1_cs1/pr1_uart0_rts_n/pr1_edc_latch1_in/gpio0_13
GND#3
mcasp0_fsr/eQEP0B_in/mcasp0_axr3/mcasp1_fsx/EMU2/pr0_pru0_gpo5/pr0_pru0_gpi5/gpio3_19/gpio0_19
dss_data10/gpmc_a14/ehrpwm1A/mcasp0_axr0/pr1_mii0_rxd1/uart3_ctsn/gpio2_16
uart1_ctsn/timer6/dcan0_tx/I2C2_SDA/spi1_cs0/pr1_uart0_cts_n/pr1_edc_latch0_in/gpio0_12
mcasp0_axr0/ehrpwm0_tripzone_input/spi1_cs3/spi1_d1/mmc2_sdcd/pr0_pru0_gpo2/pr0_pru0_gpi2/gpio3_16
dss_data8/gpmc_a12/ehrpwm1_tripzone_input/mcasp0_aclkx/uart5_txd/pr1_mii0_rxd3/uart2_ctsn/gpio2_14
dss_data6/gpmc_a6/pr1_edio_data_in6/eQEP2_index/pr1_edio_data_out6/pr1_pru0_gpo6/pr1_pru0_gpi6/gpio2_12
dss_data7/gpmc_a7/pr1_edio_data_in7/eQEP2_strobe/pr1_edio_data_out7/pr1_pru0_gpo7/pr1_pru0_gpi7/gpio2_13
dss_data11/gpmc_a15/ehrpwm1B/mcasp0_ahclkr/mcasp0_axr2/pr1_mii0_rxd0/uart3_rtsn/gpio2_17/spi3_cs1
GND#7
gpmc_wait0/gmii2_crs/gpmc_csn4/rmii2_crs_dv/mmc1_sdcd/pr1_mii1_crs/uart4_rxd/gpio0_30/gpio5_30
dss_data3/gpmc_a3/pr1_mii0_txd2/ehrpwm0_synco/pr1_pru0_gpo3/pr1_pru0_gpi3/gpio2_9
dss_data13/gpmc_a17/eQEP1B_in/mcasp0_fsr/mcasp0_axr3/pr1_mii0_rxer/uart4_rtsn/gpio0_9/spi3_d0
VDDSHV11
gpmc_ad14/dss_data17/mmc1_dat6/mmc2_dat2/eQEP2_index/pr1_mii0_txd0/pr1_pru0_gpi16/gpio1_14/mcasp0_axr0
ADC0_AIN5
gpmc_ad15/dss_data16/mmc1_dat7/mmc2_dat3/eQEP2_strobe/pr1_ecap0_ecap_capin_apwm_o/gpio1_15/mcasp0_axr1/spi3_cs1
gpmc_oen_ren/spi0_cs2/timer7/qspi_d1/gpio2_3
mmc0_dat1/gpmc_a22/uart5_ctsn/uart3_rxd/uart1_dtrn/pr0_pru0_gpo10/pr0_pru0_gpi10/gpio2_28
mmc0_dat2/gpmc_a21/uart4_rtsn/timer6/uart1_dsrn/pr0_pru0_gpo9/pr0_pru0_gpi9/gpio2_27
mmc0_clk/gpmc_a24/uart3_ctsn/uart2_rxd/dcan1_tx/pr0_pru0_gpo12/pr0_pru0_gpi12/gpio2_30
dss_data12/gpmc_a16/eQEP1A_in/mcasp0_aclkr/mcasp0_axr2/pr1_mii0_rxlink/uart4_ctsn/gpio0_8/spi3_sclk
mmc0_dat3/gpmc_a20/uart4_ctsn/timer5/uart1_dcdn/pr0_pru0_gpo8/pr0_pru0_gpi8/gpio2_26
dss_data15/gpmc_a19/eQEP1_strobe/mcasp0_ahclkx/mcasp0_axr3/pr1_mii0_rxdv/uart5_rtsn/gpio0_11/spi3_cs0
mmc0_cmd/gpmc_a25/uart3_rtsn/uart2_txd/dcan1_rx/pr0_pru0_gpo13/pr0_pru0_gpi13/gpio2_31
dss_data14/gpmc_a18/eQEP1_index/mcasp0_axr1/uart5_rxd/pr1_mii_mr0_clk/uart5_ctsn/gpio0_10/spi3_d1
mmc0_dat0/gpmc_a23/uart5_rtsn/uart3_txd/uart1_rin/pr0_pru0_gpo11/pr0_pru0_gpi11/gpio2_29
spi4_d0/ehrpwm3_synci/gpio5_5
spi4_d1/ehrpwm0_tripzone_input/gpio5_6
gpmc_ad13/dss_data18/mmc1_dat5/mmc2_dat1/eQEP2B_in/pr1_mii0_txd1/pr1_pru0_gpi11/gpio1_13/mcasp0_fsx/pr1_pru0_gpo11
gpmc_wpn/gmii2_rxerr/gpmc_csn5/rmii2_rxerr/mmc2_sdcd/pr1_mii1_rxer/uart4_txd/gpio0_31/gpio5_31
ADC0_AIN2
MIC_IN_L
gpmc_advn_ale/spi0_cs3/timer4/qspi_d0/gpio2_2
ADC0_AIN1
ADC0_AIN6
MICDET
ADC0_AIN3
MICBIAS
ADC0_AIN0
MIC_IN_R
ADC0_AIN4
ADC0_AIN7
ADC0_VREFP
GND#6
ADC0_VREFN
gpmc_wen/spi1_cs2/timer6/qspi_d2/gpio2_4
LINEIN_RP
gpmc_ad7/mmc1_dat7/gpio1_7
AGND_AUD
LOWPWR_RSTn
LINEIN_LP
cam1_data8/xdma_event_intr3/spi0_cs2/pr0_pru1_gpo0/spi2_d0/pr0_pru1_gpi0/EMU10/gpio4_8/uart0_rtsn
LINEOUT_RP
Porz
LINEOUT_LP
gpmc_ad4/mmc1_dat4/gpio1_4
DMIC_CLK
cam1_data9/dss_data16/pr0_pru0_gpo17/spi2_cs3/pr0_pru0_gpi17/EMU9/gpio4_7/uart0_ctsn
DMIC_DATA
gpmc_ad5/mmc1_dat5/gpio1_5
I2C0_SCL/timer7/uart2_rtsn/eCAP1_in_PWM1_out/gpio3_6
gpmc_ad6/mmc1_dat6/gpio1_6
I2C0_SDA/timer4/uart2_ctsn/eCAP2_in_PWM2_out/gpio3_5
GND#4
cam0_field/dss_data21/cam0_data10/spi2_sclk/cam1_data10/EMU4/gpio4_2
cam0_pclk/dss_data19/pr0_pru0_gpo14/spi2_cs0/pr0_pru0_gpi14/EMU6/gpio4_4/I2C2_SDA
cam0_data9/dss_data17/pr0_pru0_gpo16/spi2_cs3/pr0_pru0_gpi16/EMU8/gpio4_6
gpmc_ad3/mmc1_dat3/gpio1_3
cam0_data6/mmc1_dat2/qspi_d2/ehrpwm1A/gpio4_28
gpmc_ad2/mmc1_dat2/gpio1_2
cam0_data7/mmc1_dat3/qspi_d3/ehrpwm1B/gpio4_29
gpmc_ad1/mmc1_dat1/gpio1_1
cam0_data4/mmc1_dat0/cam1_wen/qspi_d0/ehrpwm3A/gpio4_26
gpmc_ad0/mmc1_dat0/gpio1_0
cam0_data5/mmc1_dat1/qspi_d1/ehrpwm3B/gpio4_27
cam0_vd/dss_data22/pr1_edio_outvalid/spi2_d1/EMU11/EMU3/gpio4_1
cam0_data8/dss_data18/pr0_pru0_gpo15/spi2_cs2/pr0_pru0_gpi15/EMU7/gpio4_5/I2C2_SCL
cam0_hd/dss_data23/pr1_edio_sof/spi2_cs1/EMU10/EMU2/gpio4_0
GND#9
cam0_wen/dss_data20/cam0_data11/spi2_d0/cam1_data11/EMU5/gpio4_3
GND#14
GND#13
GND#10
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
UART3_TXD_CON
UART3_RXD_CON
UART3_RTS_CON
UART3_CTS_CON
RGMII2_RCLK
RGMII2_RCTL
RGMII2_RD0
RGMII2_RD1
RGMII2_RD2
RGMII2_RD3
D
CAM1_VSYNC
CAM1_DATA4
CAM1_DATA3
CAM1_DATA9
CAM1_DATA2
CAM1_DATA1
CAM1_DATA0
ETH_MDIO_CLK
ETH_MDIO_DATA
CAM1_DATA8
CAM1_DATA10
CAM1_DATA11
AM437X_MMC0_SDCD
MCASP0_ACLKX/SPI1_SCLK
GPIO5_4
MCASP0_AHCLKR/SPI1_CS0
MCASP0_AHCLKX
MCASP0_AXR1
UART0_RXD
AM437X_LCD_BACKLIGHT
I2C1_SCL
AM437X_LCD_VSYNC
AM437X_LCD_AC_BIAS_EN
AM437X_LCD_PCLK
AM437X_LCD_DATA1
AM437X_LCD_DATA4
SPI2_D0
UART2_RXD
AM437X_USB0_ID
SPI2_D1
MCASP0_FSX/SPI1_D0
SPI2_SCLK
C
AM437X_USB0_DRVVBUS
VBAT_3P3V
1
D
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
C150
VDDA_ADC
2
RGMII2_TD0
RGMII2_TD1
RGMII2_TD2
RGMII2_TD3
RGMII2_TCLK
RGMII2_TCTL
CAM1_PCLK
CAM1_DATA7
CAM1_HSYNC
22uF
RS485_SELn
GPIO1_12
GNDA_ADC
AM437X_DCAN0_RX/UART1_RTS
MCASP0_FSR
AM437X_DCAN0_TX/UART1_CTS
AM437X_LCD_DATA8
AM437X_LCD_DATA7
AM437X_LCD_DATA3
VDDSHV11
AM437X_AIN5
GPIO2_3
AM437X_MMC0_DAT2
AM437X_LCD_DATA12
AM437X_LCD_DATA15
AM437X_LCD_DATA14
GPIO5_5
GPIO1_13
AM437X_AIN2
GPIO2_2
AM437X_AIN6
AM437X_AIN3
AM437X_AIN0
AM437X_AIN4
LAYOUT NOTE:
Pay attention to routing of
sensitive analog lines
ADC0_VREFP
LINEIN_RP
LINEIN_LP
LINEOUT_RP
LINEOUT_LP
DMIC_CLK
DMIC_DATA
I2C0_SCL
I2C0_SDA
AM437X_LCD_DATA21
B
ADC0_VREFN
AGND_AUD
GPIO4_28
GPIO4_29
GPIO4_26
ETH2_RESETn
AM437X_LCD_DATA18
CONN_SODIMM_204P_SOCKET
Notes:
[1] VDDSHV11- 1.8V rail
[2] The following pins are referenced to 1.8V:
1,3,5,7,9,11,12,14,16,18,20,22,
116,131,135,137,151,150
[3] The following GPIOs are Muxed with NAND interface
and cannot be used with on SOM NAND simultaneously:
109,131,138,151,154,167,
169,177,181,183,189,191,193,195
A
A
[4] The following Pins are Muxed with WiF/BTi interface
and cannot be used with on SOM Wifi/BT Module simultaneously:
1,2,3,4,5,6,7,8,9,11,12,14,16,18,20,22
Title
03. VAR-SOM-AM437X
Size
A2
Document Number
VAR-AM43CustomBoard
Designer:
<Designer>
Date:
Sunday, October 11, 2015
5
4
3
2
1
Project
VAR-AM43CustomBoard
Approved By:
Sheet
3
R ev
1.1A
<Approved By>
of
9
5
4
3
04. Display,Touch,Camera
2
1
Touch
Resistive
LVDS
TS_YTS_XTS_Y+
TS_X+
BASE_PER_3V3
BASE_PER_3V3
C174 C173 C185
J101
1
2
3
4
5 M1
6 M2
AM437X_AIN3
AM437X_AIN1
AM437X_AIN2
AM437X_AIN0
C110 C111 C130 C131
D
51
52
54
55
56
2
3
4
6
7
8
10
11
12
14
15
16
18
19
20
22
AM437X_LCD_DATA3
AM437X_LCD_DATA4
AM437X_LCD_DATA5
C
D14
D15
D16
D17
D18
D19
D20
23
24
25
27
28
30
50
AM437X_LCD_DATA6
AM437X_LCD_DATA7
AM437X_LCD_HSYNC
AM437X_LCD_VSYNC
AM437X_LCD_AC_BIAS_EN
9
1
26
Differential Impedance: 100 ohms
Capacitive
LVDS Connector
R6
R7
BASE_PER_3V3
CLKSEL
C163
G4
10uF
CLKOUTM
CLKOUTP
Y0M
Y0P
Y1M
Y1P
Y2M
Y2P
Y3M
Y3P
G6
G7
B2
B3
BASE_PER_3V3
BASE_PER_3V3
17
G3
G5
D
4 POS FFC/FPC
40
39
48
47
46
45
42
41
38
37
CLKINCLKIN+
RXIN0RXIN0+
RXIN1RXIN1+
RXIN2RXIN2+
RXIN0C183
J15
1
3
5
7
9
11
13
15
17
19
BASE_PER_5V
RXIN1+
RXIN2-
10uF
CLKIN+
AM437X_LCD_BACKLIGHT
B4
1
3
5
7
9
11
13
15
17
19
R3
10K
R1
10K
2
4
6
8
10
12
14
16
18
20
2
4
6
8
10
12
14
16
18
20
RXIN0+
RXIN1-
J7
1
2
3
4
5
6
7 M1
8 M2
I2C1_SDA
I2C1_SCL
GPIO4_29
RXIN2+
CLKIN- BASE_PER_5V
CH81202M10100
B5
6 POS FFC/FPC
C
D21
D22 B7
D23
D24
D25
D26
D27 R6
B6
31
CLKIN
SHTDN
5
13
21
29
53
AM437X_LCD_PCLK
R5
470pF 470pF 470pF 470pF
LVDS Differential Pair, Follow
LVDS routing guidelines.
R145
10K
32
R141
10K
PLLGND
PLLGND
AM437X_LCD_DATA15
AM437X_LCD_DATA2
G2
R4
BASE_PER_3V3
33
35
AM437X_LCD_DATA13
AM437X_LCD_DATA14
D7
D8
D9
D10
D11
D12
D13
R3
LVDSGND
LVDSGND
LVDSGND
AM437X_LCD_DATA10
AM437X_LCD_DATA11
AM437X_LCD_DATA12
R2
36
43
49
AM437X_LCD_DATA23
D0
D1
D2
D3
D4
D5
D6
GND
GND
GND
GND
GND
AM437X_LCD_DATA18
AM437X_LCD_DATA19
AM437X_LCD_DATA20
AM437X_LCD_DATA21
AM437X_LCD_DATA22
PLLVCC
LVDSVCC
U116
LAYOUT NOTE:
VCC
IOVCC
IOVCC
34
44
100nF 100nF 100nF
BASE_PER_2V8A
BASE_PER_2V8
BASE_PER_2V8
SN75LVDS83B
BASE_PER_2V8A
FB100
C3 C7
120R 1.2A
10uF100nF
RN101-3
AGND_SENS
J102
Camera
BASE_PER_3V3
BASE_PER_3V3
4.7K
RN101-4 R110
NC
10K
4.7K
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
BASE_PER_1V5
BASE_PER_3V3
BASE_PER_2V8
BASE_PER_2V8
C135C134
SENSOR_SIO_D
10uF100nF
SENSOR_SIO_C
SENSOR_RESET
SENSOR_VSYNC
BASE_PER_3V3
SENSOR_HREF
C113
100nF
U100
SN74AVC4T245
Y101
1
2
OE
GND
VCC
CLK
4
3
CLKOUT_12MHZ R134
0R
1
2
3
4
5
6
7
8
CAM1_SRCCLK
CAM1_RESET
CAM1_SRCCLK
12MHz
CAM1_VSYNC
CAM1_HSYNC
16
15
14
13
12
11
10
9
C169
100nF
100nF
C164
U111
SN74AVC4T245
1
2
3
4
5
6
7
8
OE#
SENSOR_XCLK
SENSOR_RESET
SENSOR_VSYNC
SENSOR_HREF
CAM1_PCLK
VCCA VCCB
1DIR
1OE#
2DIR
2OE#
1A1 '0'- 1B1
1A2 B->A 1B2
2A1
2B1
2A2
2B2
GND
GND
17
C104
VCCA VCCB
1DIR
1OE#
2DIR
2OE#
1A1 '0'- 1B1
1A2 B->A 1B2
2A1
2B1
2A2
2B2
GND
GND
C112
1uF
BASE_PER_2V8
100nF
16
15
14
13
12
11
10
9
OE#
SENSOR_PCLK
R136
10K
NC
C6 C15
10uF100nF
SENSOR_Y9
SENSOR_XCLK
SENSOR_Y8
SENSOR_Y7
SENSOR_PCLK
SENSOR_Y6
SENSOR_Y2
SENSOR_Y5
SENSOR_Y3
SENSOR_Y4
OE#
R135
10K
17
R104
10K
PAD
BASE_PER_3V3
C161 100nF
PAD
B
R111
10K
BASE_PER_3V3
BASE_PER_2V8
BASE_PER_3V3
BASE_PER_2V8
16
15
14
13
12
11
10
9
C137
100nF
100nF
OE#
SENSOR_Y2
SENSOR_Y3
SENSOR_Y4
SENSOR_Y5
CAM1_DATA4
CAM1_DATA5
CAM1_DATA6
CAM1_DATA7
R5
C136
U104
SN74AVC4T245
1
2
3
4
5
6
7
8
VCCA VCCB
1DIR
1OE#
2DIR
2OE#
1A1 '0'- 1B1
1A2 B->A 1B2
2A1
2B1
2A2
2B2
GND
GND
PAD
CAM1_DATA0
CAM1_DATA1
CAM1_DATA2
CAM1_DATA3
VCCA VCCB
1DIR
1OE#
2DIR
2OE#
1A1 '0'- 1B1
1A2 B->A 1B2
2A1
2B1
2A2
2B2
GND
GND
PAD
A
U4
SN74AVC4T245
1
2
3
4
5
6
7
8
17
100nF
C17
17
C19
B
24 POS FFC/FPC
BASE_PER_3V3
BASE_PER_2V8
NC#1
AGND
SIO_D
AVDD
SIO_C
RESET
VSYNC
PWDN
HREF
DVDD
DOVDD
Y9
XCLK
Y8
DGND
Y7
PCLK
Y6
Y2
Y5
Y3
Y4
NC#23
NC#24
M1
M2
100nF
16
15
14
13
12
11
10
9
0.0R
AGND_SENS
C1
C4
R4
100nF 10K
100nF
OE#
SENSOR_Y6
SENSOR_Y7
SENSOR_Y8
SENSOR_Y9
AGND_SENS
U1
1
SENSOR_SIO_C
SENSOR_SIO_D
2
3
4
VL
IOVL1
IOVL2
GND
VCC
IOVCC1
IOVCC2
EN
NLSX4373DR2G
8
7
6
A
I2C0_SCL
I2C0_SDA
5
Title
04. Display,Touch,Camera
Size
A3
Document Number
VAR-AM43CustomBoard
Designer:
<Designer>
Date:
Sunday, June 28, 2015
Project
VAR-AM43CustomBoard
Approved By:
Sheet
4
Rev
1.1A
<Approved By>
of
9
5
4
05. G. Ethernet
3
2
1
LEDs - active HIGH, address 00010b
D
D
VDDIO_REG
PHYADDR 0
RGMII2_RD0
R127
10K
PHYADDR 1
RGMII2_RD1
R126
10K
PHYADDR 2
LED_ACT_PHY2
R10
10K
INT SELECT
LED_LINK_1000_PHY2
R11
10K
RN100-1
RN100-2
RN100-3
RN100-4
10K
10K
10K
10K
RN100-8
10K
MODE[3: 0] = 0000,
1000 BASE-T, RGMII
MODE
MODE
MODE
MODE
0
1
2
3
RGMII2_RCTL
RGMII2_RD2
RGMII2_RCLK
RGMII2_RD3
Ethernet PHY
VDDIO_REG VDDH_REG
C
R125
BASE_PER_3V3
FB1
120R 1.2A
FB101
120R 1.2A
0R NC
AVDD33
DVDDL
C
AVDDL
C153 C152 C154 C155
C132
C147 C148 C12
C13
C141
C146 C142
10uF
100nF 100nF 100nF
1uF
100nF
100nF 1uF
C151 C156 C157
1
100nF 100nF 100nF 100nF
DVDDL
L103
4.7uH
RGMII2_TCLK
RGMII2_TCTL
35
34
47
TXD0
TXD1
TXD2
TXD3
TRXP_3
TRXM_3
GTX_CLK
TX_EN
25
40
5
2
GPIO_1_14
GPIO4_28
ETH2_RESETn
Y100
1
AR8033_CLK_O
6
AR8033_CLK_I
7
3
2
C143
4
C149
25 Mhz
MDIO
MDC
1588v2
CLK25M
WOL_INT
INT_N
RESET_N
XTLO
XTLI
AR8033-AL1A-R
TRXP_0
TRXM_0
14
15
Differential Impedance: 100 ohms
J6
R1
R2
R3
R4
TRXP_1
TRXM_1
17
18
TRXP_2
TRXM_2
20
21
TRXP_3
TRXM_3
46
45
TP5
TP3
43
42
41
TP4
TP2
R129
22
TP1
R7
R8
R9
R10
R5
R6
TR1+
TR1TR2+
TR2-
SIP
SIN
SOP
SON
SD
PPS
LED_ACT
LED_LINK_10_100
LED_LINK_1000
RBIAS
10uF
L2
R113
49.9R 1% LED_ACT_PHY2
Y+
TR3+
TR3-
LED_LINK_10_100_PHY2
G_O_1 L3
TR4+
TR4TRCT1
TRCT2
L4
R112
B
49.9R 1% LED_LINK_1000_PHY2
G_O_2
SH1
SH2
100nF 100nF
DVDDL
L1
Y-
Yellow
11
12
Giga Ethernet Differential Pair,
Follow Giga Ethernet routing
guidelines.
C116 C115 C114
SGMII/
1000FX
P_GND
RN100-5 RN100-6 RN100-7
10K
10K
10K
48
1
LX_OUT
2
DVDDL
8
13
19
44
29
16
10
VDDH_REG
AVDDL#1
AVDDL#2
AVDDL#3
AVDDL#4
TRXP_2
TRXM_2
VDDSHV11
ETH_MDIO_DATA
ETH_MDIO_CLK
22pF
RX_CLK
RX_DV
49
BASE_PER_3V3
36
37
38
39
TRXP_1
TRXM_1
3
Orange
B
RGMII2_TD0
RGMII2_TD1
RGMII2_TD2
RGMII2_TD3
LX
TRXP_0
TRXM_0
RXD0
RXD1
RXD2
RXD3
LAYOUT NOTE:
Green
RGMII2_RCLK
RGMII2_RCTL
33
32
VDDIO_REG
VDD33
RGMII2_RD0
RGMII2_RD1
RGMII2_RD2
RGMII2_RD3
31
30
28
27
AVDD33
U107
4
100nF 100nF 10uF
SH1
SH2
RTA-164AAK1A
4.7K
C100
1nF 2KV
23
26
24
LED_ACT_PHY2
C140
LED_LINK_10_100_PHY2 C138
LED_LINK_1000_PHY2
C139
470pF
470pF
470pF
9
R124
2.37K 1%
22pF
A
A
Title
05. G. Ethernet
Size
A3
Document Number
VAR-AM43CustomBoard
Designer:
<Designer>
Date:
Sunday, June 28, 2015
Project
VAR-AM43CustomBoard
Approved By:
Sheet
5
Rev
1.1A
<Approved By>
of
9
4
USB
3
AM437X_USB1_DP
D
AM437X_USB1_DM_C
1
AM437X_USB1_DP_C
LAYOUT NOTE:
USB 2.0 Differential Pair, annotated
with a ring around the pair. Follow
USB 2.0 routing guidelines.
Length Match: +/- 100 mils
Differential Impedance: 90 ohms
VCC_USB1
J4
USB304FA-C1031301
1
5
2
3
4
VCC_USB1
Digital Microphone
1
L100
MCZ1210AH900L2T
2
3
4
1
C105
6
BASE_PER_3V3
47uF
U3
4
3
C18
C16
5
2
10uF
100nF
6
1
6
2
3
1
100nF
AM437X_USB1_VBUS
1.0K 1%
C127
C126
1uF
47uF
R117
10K
VCC_USB1 OTG_VBUS
IN
3
4
AM437X_USB1_DRVVBUS
AM437X_USB0_DRVVBUS
7
6
OUT1
OUT2
8
5
OC1
OC2
100nF 1
TPA6132A2
BASE_PER_5V
AM437X_USB0_VBUS_DET
14
12
Q102
NDS331N
1
R116
EN1
EN2
C125
R114
10K
Headphones
2
2
C177
C179
2.2uF
2.2uF 10
VDD
HPVDD
PGND
100K
GND
TPS2052BD
LINEOUT_RP
C181 1uF
AGND_AUD
C180 1uF
LINEOUT_LP
C175 1uF
AGND_AUD
C176 1uF
4
3
1
2
INRNEG
INRPOS
C
OUTR
OUTL
INLNEG
INLPOS
SGND
AM437X_USB0_DP
AM437X_USB0_ID
LAYOUT NOTE:
USB 2.0 Differential Pair, annotated
with a ring around the pair. Follow
USB 2.0 routing guidelines.
Length Match: +/- 100 mils
Differential Impedance: 90 ohms
B
5
2
6
1
2
1
15
STEREO JACK
8
CPP
CPN
C184
1uF
R102
130K 1%
LINEIN_LP
J3
USB304FA-C1031301
1
5
2
3
4
C182 1uF
Line In
LINEIN_RP
D102
IP4220CZ6
3 J17
HPOUTR
HPOUTL
9
17
100nF
VCC
DATAN
DATAP
ID
GND
J100
USB MICRO AB
3
11
1
AM437X_USB0_DP_C
4
HPVSS
5
16
6
7
S
S
1
2
3
4
5
AM437X_USB0_DM_C
4
EN
G0
G1
C22
100nF
C20
100nF
D9
6
LINEIN_RP_C
3 J18
LINEIN_LP_C
2
1
D4
TPD1E10B09DPYR
1
USB0 OTG/HOST
S
S
AM437X_USB0_DM
1uF
C178
10
11
L101
MCZ1210AH900L2T
2
3
C102
2
47uF
13
6
7
10K
10K
10K
EPAD
BASE_PER_3V3
R142
R143
R144
OTG_VBUS
C106
5
DATA
U115
U102
R105
10K
4
CLK
BASE_PER_3V3
3
2
VCC_USB1
C
VDD
L/R
GND
GND
MP45DT02
1
1.0K 1%
D
DMIC_DATA
BASE_PER_5V
OTG_VBUS
R107
DMIC_CLK
5
DATA
U2
6
2
3
1
C5
Power Distribution
R115
4
CLK
MP45DT02
D101
IP4220CZ6
AM437X_USB0_VBUS
VDD
L/R
GND
GND
B
STEREO JACK
TPD1E10B09DPYR
AM437X_USB1_DM
2
AUDIO
USB1 Host
2
5
06. USB, Audio
AGND_AUD
R14
0R
AGND_AUD
USB Debug
DEBUG_VBUS
3V3OUT
C195
C192 C196
PAD
UART0_TXD
VCCA VCCB
1DIR
1OE#
2DIR
2OE#
1A1 '0'- 1B1
1A2 B->A 1B2
2A1
2B1
2A2
2B2
GND
GND
17
UART0_RXD
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
12
11
5
14
CBUS0
CBUS1
CBUS2
CBUS3
100nF 4.7uF
FB103
120R 1.2A
USBDM
USBDP
USB_DEBUG_DM
7
6
USB_DEBUG_DP
3V3OUT
RESET#
DEBUG_VBUS_C
10
S
S
VCC
6
7
8
3V3OUT
U117
SN74AVC4T245
TXD
RXD
RTS#
CTS#
VCCIO
100nF
15
2
16
4
EPAD
GND
GND
100nF 100nF
A
U119
FT230XQ
C190
17
13
3
C191 C187
1
100nF
2
1
2
3
4
5
USB_DEBUG_DM_C
3
USB_DEBUG_DP_C
1
4
L104
MCZ1210AH900L2T
9
4
3
5
2
C197
LAYOUT NOTE:
USB 2.0 Differential Pair, annotated
with a ring around the pair. Follow
USB 2.0 routing guidelines.
Length Match: +/- 100 mils
Differential Impedance: 90 ohms
VCC
DATAN
DATAP
ID
GND
J22
USB MICRO AB
A
S
S
3V3OUT
10
11
BASE_PER_3V3
10nF
6
1
Title
06. USB, Audio
D10
IP4220CZ6
Size
A3
Document Number
VAR-AM43CustomBoard
Designer:
<Designer>
Date:
Sunday, June 28, 2015
Project
VAR-AM43CustomBoard
Approved By:
Sheet
6
Rev
1.1A
<Approved By>
of
9
5
4
07. Peripherals
3
2
1
LAYOUT NOTE:
RS232/RS485
Giga Ethernet Differential Pair,
Follow Giga Ethernet routing
guidelines.
RS-232 TRX
RJ45
Differential Impedance: 100 ohms
BASE_PER_3V3
RS232_SELn
4
c1+
C123
V+
1
100nF 3
3
U101
SN74LVC1G04DCKR
2
C124
c1-
100nF
VCC
RS485_SELn
4
BASE_PER_3V3
C145
c2+
GND
R3
R4
MDI_C_P
MDI_C_M
R7
R8
MDI_D_P
MDI_D_M
R9
R10
R5
R6
15
TR2+
TR2-
10uF
c2V-
6
L1
Y-
L2
470pF
R6
R7
10K
D
49.9R 1%
Y+
TR3+
TR3-
G_O_1 L3
LED_LINK_10_100
C10
470pF
TR4+
TR4TRCT1
TRCT2
100nF 100nF
L4
R9
49.9R 1%
G_O_2
SH1
SH2
C121
5
RN102-8 RN102-7
LED_ACT
C9
TR1+
TR1-
C119 C118 C117
100nF
C133 C144
MDI_B_P
MDI_B_M
100nF
C122
BASE_PER_3V3
16
R1
R2
Orange
1
2
MDI_A_P
MDI_A_M
Yellow
BASE_PER_3V3
U106
MAX3232D
5
D
J5
100nF
Green
C120
LED_LINK_1000
C11
SH1
SH2
470pF
R8
10K
100nF
RTA-164AAK1A
100nF 100nF
U105
SN74AVC4T245
UART2_RXD_RS485
UART2_RXD_RS232
UART2_TXD_RS485
UART2_TXD_RS232
UART2_RXD
UART2_TXD_RS232 11
10
T1IN
T2IN
UART2_RXD_RS232 12
9
T1OUT
T2OUT
R1OUT
R2OUT
R1IN
R2IN
C101
1nF 2KV
RS232_TXD
14
7
RS232_RXD
13
8
BASE_PER_3V3
RS232 Header
BASE_PER_3V3
RS-485 TRX
RS232_RXD
9
7
5
3
1
RS232_TXD
CH81102M10100
A
RS485_TXD_EN
UART2_TXD_RS485
1
2
3
4
5
6
7
B
NC1
R
RE
DE
D
GND
GND
VCC
VCC
A
B
Z
Y
NC2
14
13
12
11
10
9
8
AM437X_MMC0_CMD
AM437X_MMC0_DAT3
AM437X_MMC0_DAT2
CAN/RS485 Header
R138
120R 1%
J11
B
Z
B
Z
R140
120R 1%
CANL0
CANL1
1
3
5
7
9
2
4
6
8
10
D104
IP4220CZ6
A
Y
BASE_PER_3V3
CANH0
CANH1
BASE_PER_3V3
C194
C193
1uF
100nF
RN102-6
10K
J103
8
7
6
5
4
3
2
1
AM437X_MMC0_CLK
100nF 100nF
UART2_RXD_RS485
RS485_SELn
AM437X_MMC0_SDCD
AM437X_MMC0_DAT1
AM437X_MMC0_DAT0
C162 C159
U109
BASE_PER_3V3
RN102-1 RN102-2 RN102-3 RN102-4 RN102-5
10K
10K
10K
10K
10K
J8
10
8
6
4
2
BASE_PER_3V3
C
uSD CARD
17
C
10K
16
15
14
13
12
11
10
9
VCCA VCCB
1DIR
1OE#
2DIR
2OE#
1A1 '0'- 1B1
1A2 B->A 1B2
2A1
2B1
2A2
2B2
GND
GND
PAD
1
2
3
4
5
6
7
8
UART2_TXD
10K
D105
IP4220CZ6
BASE_PER_3V3
DAT1
DAT0
VSS
CLK
VDD
CMD
CD/DAT3
DAT2
SHL
SHL
SHL
SHL
CD
13
12
11
10
9
uSD Connector
4
3
4
3
5
2
5
2
6
1
6
1
B
SN65HVD35
Y
CH81102M10100
USER BUTTONS
CAN1
SW 4
GPIO5_6
C160
100nF
100nF
U108
8
A
AM437X_DCAN0_TX/UART1_CTS
AM437X_DCAN0_RX/UART1_RTS
1
4
5
U110
NC2
VCC
TXD
RXD
CANL
CANH
NC1
D6
C168
GND
SN65HVD232
3
8
R128
6
7
2
CANL0
CANH0
120R 1%
AM437X_DCAN1_TX/UART1_RXD
AM437X_DCAN1_RX/UART1_TXD
1
4
5
NC2
VCC
TXD
RXD
CANL
CANH
NC1
GND
SN65HVD232
3
R133
6
7
2
CANL1
CANH1
120R 1%
SW 5
1
3
2
4
FSM4JSMATR
GPIO5_5
D7
TPD1E10B09DPYR
BASE_PER_3V3
TPD1E10B09DPYR
BASE_PER_3V3
1
3
2
4
FSM4JSMATR
SW 6
GPIO5_4
D8
TPD1E10B09DPYR
CAN0
1
3
2
4
FSM4JSMATR
GP LED
GPIO4_26
GPIO4_8
R147
R146
A
330R
330R
D2
D3
Title
07. Peripherals
Size
A3
Document Number
VAR-AM43CustomBoard
Designer:
<Designer>
Date:
Sunday, June 28, 2015
Project
VAR-AM43CustomBoard
Approved By:
Sheet
7
Rev
1.1A
<Approved By>
of
9
5
08. DVK Exp Connectors
4
3
I2C/SPI
BASE_PER_3V3
2
1
Digital Audio/SPI
GPIO
D
RN101-1
4.7K
RN101-2
BASE_PER_3V3
4.7K
J9
BASE_PER_3V3
1
3
5
7
9
I2C0_SCL
I2C0_SDA
I2C1_SCL
I2C1_SDA
2
4
6
8
10
SPI2_SCLK
SPI2_D0
SPI2_D1
SPI2_CS0
MCASP0_ACLKX/SPI1_SCLK
MCASP0_AHCLKR/SPI1_CS0
MCASP0_AXR0/SPI1_D1
MCASP0_FSX/SPI1_D0
BASE_PER_3V3
J21
1
3
5
7
9
2
4
6
8
10
MCASP0_ACLKR
MCASP0_AHCLKX
MCASP0_AXR1
MCASP0_FSR
J20
1
3
5
7
9
GPIO1_0
GPIO1_1
GPIO1_2
GPIO1_3
D
2
4
6
8
10
GPIO1_4
GPIO1_5
GPIO1_6
GPIO1_7
CH81102M10100
CH81102V201
CH81102V201
Note:
(*) McASP interface is shared with on SOM WiFi module
and canno't be used simultaneously
Note:
(*) Pins 2-9 are Muxed with NAND interface
and cannot be used with on SOM NAND simultaneously
C
C
UART1
UART3
BASE_PER_3V3
BASE_PER_3V3
UART3_RXD_CON
J19
J16
10
8
6
4
2
UART3_CTS_CON
GPIO
BASE_PER_3V3
J14
9
7
5
3
1
UART3_RTS_CON
AM437X_DCAN0_TX/UART1_CTS
UART3_TXD_CON
AM437X_DCAN1_TX/UART1_RXD
10
8
6
4
2
9
7
5
3
1
1
3
5
7
9
AM437X_DCAN0_RX/UART1_RTS
GPIO1_13
GPIO1_12
GPIO0_31
GPIO0_30
AM437X_DCAN1_RX/UART1_TXD
2
4
6
8
10
GPIO2_3
GPIO2_4
GPIO2_5
GPIO2_2
CH81102V201
CH81102M10100
CH81102M10100
Note:
(*) Pins 2,3,4,6,7,8 are Muxed with NAND interface
and cannot be used with on SOM NAND simultaneously
(**) Pins 3,5,7,9 are Referenced to 1.8V rail
B
B
CAMERA Header
A/D
BASE_PER_5V
C14
BASE_PER_1V5 VDDA_ADC
ADC0_VREFP
Note:
(*) ADC0_VREFP can be supplied by
SOM's VDDA_ADC Rail or by on board 1.5V LDO
100nF
J13
1
3
5
7
9
11
13
15
17
19
21
23
CAM1_DATA0
CAM1_DATA1
CAM1_DATA2
CAM1_PCLK
CAM1_DATA3
CAM1_DATA4
CAM1_DATA5
CAM1_W EN_GPIO4_13
CAM1_SRCCLK
A
R31
100R
NC
1
3
5
7
9
11
13
15
17
19
21
23
2
4
6
8
10
12
14
16
18
20
22
24
2
4
6
8
10
12
14
16
18
20
22
24
LAYOUT NOTE:
CAM1_VSYNC
CAM1_HSYNC
CAM1_DATA6
CAM1_DATA7
CAM1_DATA8
CAM1_DATA9
CAM1_FIELD_GPIO4_12
CAM1_DATA10
CAM1_DATA11
I2C0_SCL
I2C0_SDA
R122
0R
NC
R123
0R
Route sensitive analog inputs
with the same path as analog ground and vcc
J10
1
3
5
7
9
AM437X_AIN0
AM437X_AIN1
AM437X_AIN2
AM437X_AIN3
2
4
6
8
10
AM437X_AIN4
AM437X_AIN5
AM437X_AIN6
AM437X_AIN7
C8
CH81102V201
10uF
CH81242M10100
R12
0R
A
GNDA_ADC
R13
NC 0R
ADC0_VREFN
Title
08. DVK Exp Connectors
Size
A3
Document Number
VAR-AM43CustomBoard
Designer:
<Designer>
Date:
Sunday, October 11, 2015
Project
VAR-AM43CustomBoard
Approved By:
Sheet
8
Rev
1.1A
<Approved By>
of
9
U103
Assembly
Options
R121
L102
VIN
C108
LX
5
LX 1
510R
6.8uH
10uF
FB
8
C103
D1
2
D100
DC 2.0mm
1
TPD1E10B09DPYR
4
3
2
1
J12
R118
47uF
PGOOD
COMP
6
1M
R106
3
10K
7
1
R109
33K
C129
RT
VCC_5V
GND
SS
EN
D
VCC_3V3
R120
68K 1%
R101
100K
SOM Power
2
9
2
C2
C128
C107
47uF
47uF
47uF
R119
21.5K 1%
Q101
VCC_3V3
BASE_PER_3V3
4
3
100K 6
2
1
VCC_5V
1
4
2 Pin Terminal Block
3.3V Base
VCC_3V3
2
VCC_5V
1
Note:
3 x 47uF caps required
for full load operation
1
2
1
NC
2
3.3V Digital 4A
DC-IN - 5V
J2
D
3
2
4
2
5
09. Power, Mechanics
VBAT_3P3V
R130
R108
0.0R
VDDSHV11
5
1
560pF
TPS27082L
C109
RT8070ZQW
10nF
C
RTC Battery
R139
1.47K 1%
D103
BAT54C
Q100
2.8V Base
BASE_PER_5V
4
3
100K 6
2
VCC_3V3 BASE_PER_3V3
8
120R 1.2A
C189 C188 C186
7
JBT100
CR1225-HOLDER
10uF
10uF
100nF
3
4
3
Vcc
Fout
U114
1
C171
3
U118
FB102
XI
XO
IRQ2# SDA
GND SCL
1
Y102
32.768KHz
2
R100
5
6
1uF
2
VDDSHV11
5
1
3
VCC_5V
2
1
-
++
+
ISL12057 - RTC
BASE_PER_3V3
2
2
1
RTC_IN
C
5V Base
VIN
1.5V Base
BASE_PER_2V8
1
C170
C166
1uF
1uF
VIN
3
EN
GND
VCC_3V3 BASE_PER_3V3 U112
5
VOUT
4
NC
C165
EN
2
GND
1uF
4
NC
1
TLV70228DBVR
I2C1_SDA
I2C1_SCL
BASE_PER_1V5
5
VOUT
TLV70215DBVR
R103 TPS27082L
10K
ISL12057IUZ
B
B
Reset
4
100nF
GND
D5
SW 1
TDA01H0SB1R
2
1 R148
3
10K
NC7SP125P5X
R150
A
SYSBOOT[0]
SYSBOOT[1]
SYSBOOT[2]
SYSBOOT[3]
SYSBOOT[4]
SYSBOOT[5]
SYSBOOT[6]
SYSBOOT[7]
SYSBOOT[8]
SYSBOOT[9]
SYSBOOT[10]
SYSBOOT[11]
SYSBOOT[12]
SYSBOOT[13]
SYSBOOT[14]
SYSBOOT[15]
SYSBOOT[16]
SYSBOOT[17]
SYSBOOT[18]
0/1
0
0/1
0
0
1
0
0
0
0
0
0
0
0
1
0
0
1
0
10K
AM437X_LCD_DATA0
AM437X_LCD_DATA1
AM437X_LCD_DATA2
AM437X_LCD_DATA3
AM437X_LCD_DATA4
AM437X_LCD_DATA5
AM437X_LCD_DATA6
AM437X_LCD_DATA7
AM437X_LCD_DATA8
AM437X_LCD_DATA9
AM437X_LCD_DATA10
AM437X_LCD_DATA11
AM437X_LCD_DATA12
AM437X_LCD_DATA13
AM437X_LCD_DATA14
AM437X_LCD_DATA15
AM437X_LCD_VSYNC
AM437X_LCD_HSYNC
AM437X_LCD_AC_BIAS_EN
R151
0R
R152
100K
R30
R28
R153
R26
R27
R25
R23
R24
R131
R22
R20
R21
R132
R19
R137
R18
R15
R17
R16
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
100K
2X SOM CONN HOLES
HOLE5
HOLE3
HOLE4
SMTSO-M2-3-ET
NC
SMTSO-M2-3-ET
NC
NC
Boot Select
SYSBOOT
[18:3]
SYSBOOT
[2:0]
000
4X Chassis Holes
1uF
SW1
SW2
BOOT
OFF
OFF
NAND
HOLE2
HOLE6
NC
HOLE1
NC
EARTH
2
C199
AM437X_PORZn
C21
NC
1
1
3
2
4
FSM4JSMATR
EARTH
VCC_3V3
10K
1
SW 2
TDA01H0SB1R
1 R149
EARTH
2
1
1
VCC
EARTH
U120
5
1
VCC_3V3
TPD1E10B09DPYR
SW 3
Fiducial
FD1
FD2
FD3
A
FD4
VPC1
001
ON
OFF
SD
100
OFF
ON
eMMC
NC
NC
NC
NC
FD101 FD102 FD103 FD104
0100100000000100
Title
09. Power, Mechanics
PCB
100
ON
ON
eMMC
NC
NC
NC
NC
Size
A3
Document Number
VAR-AM43CustomBoard
Designer:
<Designer>
Date:
Sunday, June 28, 2015
Project
VAR-AM43CustomBoard
Approved By:
Sheet
9
Rev
1.1A
<Approved By>
of
9