PHILIPS 74HC7266D

INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC7266
Quad 2-input EXCLUSIVE-NOR
gate
Product specification
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors
Product specification
Quad 2-input EXCLUSIVE-NOR gate
74HC7266
FEATURES
• Output capability: standard
• ICC category: SSI
GENERAL DESCRIPTION
The 74HC7266 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard no. 7A.
The 74HC7266 provide the EXCLUSIVE-NOR function with active push-pull output.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL
PARAMETER
CONDITIONS
UNIT
HC
tPHL/ tPLH
propagation delay nA, nB to nY
CI
input capacitance
CPD
power dissipation capacitance per gate
CL = 15 pF; VCC = 5 V
note 1
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in V
∑ (CL × VCC2 × fo) = sum of outputs
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2
11
ns
3.5
pF
17
pF
Philips Semiconductors
Product specification
Quad 2-input EXCLUSIVE-NOR gate
74HC7266
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1, 5, 8, 12
1A to 4A
data inputs
2, 6, 9, 13
1B to 4B
data inputs
3, 4, 10, 11
1Y to 4Y
data outputs
7
GND
ground (0 V)
14
VCC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
FUNCTION TABLE
INPUTS
OUTPUT
nA
nB
nY
L
L
H
H
L
H
L
H
H
L
L
H
Notes
1. H = HIGH voltage level
L = LOW voltage level
Fig.4 Functional diagram.
December 1990
Fig.5 Logic diagram (one gate).
3
Philips Semiconductors
Product specification
Quad 2-input EXCLUSIVE-NOR gate
74HC7266
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: SSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
−40 to +85
+25
min. typ.
max.
−40 to +125
min. max. min.
UNIT
VCC WAVEFORMS
(V)
max.
tPHL/ tPLH
propagation delay
nA, nB to nY
39
14
11
115
23
20
145
29
25
175
35
30
ns
2.0
4.5
6.0
Fig.6
tTHL/ tTLH
output transition time
19
7
6
75
15
13
95
19
16
110
22
19
ns
2.0
4.5
6.0
Fig.6
AC WAVEFORMS
(1) HC : VM = 50%; VI = GND to VCC.
Fig.6 Waveforms showing the input (nA, nB) to output (nY) propagation delays and the output transition times.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
4