INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT85 4-bit magnitude comparator Product specification File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification 4-bit magnitude comparator 74HC/HCT85 weighted (A0 to A3 and B0 to B3), where A3 and B3 are the most significant bits. FEATURES • Serial or parallel expansion without extra gating The operation of the “85” is described in the function table, showing all possible logic conditions. The upper part of the table describes the normal operation under all conditions that will occur in a single device or in a series expansion scheme. In the upper part of the table the three outputs are mutually exclusive. In the lower part of the table, the outputs reflect the feed forward conditions that exist in the parallel expansion scheme. • Magnitude comparison of any binary words • Output capability: standard • ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT85 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. For proper compare operation the expander inputs (IA>B, IA=B and IA<B) to the least significant position must be connected as follows: IA<B = IA>B = = LOW and IA=B = HIGH. For words greater than 4-bits, units can be cascaded by connecting outputs QA<B, QA>Β and QA=B to the corresponding inputs of the significant comparator. The 74HC/HCT85 are 4-bit magnitude comparators that can be expanded to almost any length. They perform comparison of two 4-bit binary, BCD or other monotonic codes and present the three possible magnitude results at the outputs (QA>B, QA=B and QA<B). The 4-bit inputs are QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC tPHL/ tPLH propagation delay HCT CL = 15 pF; VCC = 5 V An, Bn to QA>B, QA<B 20 22 ns An, Bn to QA=B 18 20 ns IA<B,, IA=B, IA>B to QA<B, QA>B 15 15 ns IA=B to QA=B 11 15 ns 3.5 3.5 pF 18 20 pF CI input capacitance CPD power dissipation capacitance per package notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. December 1990 2 Philips Semiconductors Product specification 4-bit magnitude comparator 74HC/HCT85 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 2 IA<B A < B expansion input 3 IA=B A = B expansion input 4 IA>B A > B expansion input 5 QA>B A > B output 6 QA=B A = B output 7 QA<B A < B output 8 GND ground (0 V) 9, 11, 14, 1, B0 to B3 word B inputs 10, 12, 13, 15 A0 to A3 word A inputs 16 VCC positive supply voltage Fig.1 Pin configuration. December 1990 Fig.2 Logic symbol. 3 Fig.3 IEC logic symbol. Philips Semiconductors Product specification 4-bit magnitude comparator 74HC/HCT85 Fig.4 Functional diagram. APPLICATIONS • Process controllers • Servo-motor control FUNCTION TABLE COMPARING INPUTS CASCADING INPUTS OUTPUTS A3, B3 A2, B2 A1, B1 A0, B0 IA>B IA<B IA=B QA>B QA<B QA=B A3>B3 A3<B3 A3=B3 A3=B3 X X A2>B2 A2<B2 X X X X X X X X X X X X X X X X X X X X H L H L L H L H L L L L A3=B3 A3=B3 A3=B3 A3=B3 A2=B2 A2=B2 A2=B2 A2=B2 A1>B1 A1<B1 A1=B1 A1=B1 X X A0>B0 A0<B0 X X X X X X X X X X X X H L H L L H L H L L L L A3=B3 A3=B3 A3=B3 A2=B2 A2=B2 A2=B2 A1=B1 A1=B1 A1=B1 A0=B0 A0=B0 A0=B0 H L L L H L L L H H L L L H L L L H A3=B3 A3=B3 A3=B3 A2=B2 A2=B2 A2=B2 A1=B1 A1=B1 A1=B1 A0=B0 A0=B0 A0=B0 X H L X H L H L L L L H L L H H L L Notes 1. H = HIGH voltage level L = LOW voltage level X = don’t care December 1990 4 Philips Semiconductors Product specification 4-bit magnitude comparator 74HC/HCT85 Fig.5 Logic diagram. December 1990 5 Philips Semiconductors Product specification 4-bit magnitude comparator 74HC/HCT85 DC CHARACTERISTICS FOR 74HC For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) TEST CONDITIONS 74HC SYMBOL PARAMETER +25 min. typ. −40 to +85 max. min. max. −40 to +125 UNIT min. VCC WAVEFORMS (V) max. tPHL/ tPLH propagation delay An, Bn to QA>B or QA<B 63 23 18 195 39 33 245 49 42 295 59 50 ns 2.0 4.5 6.0 Fig.6 tPHL/ tPLH propagation delay An, Bn to QA=B 58 21 17 175 35 30 220 44 37 265 53 45 ns 2.0 4.5 6.0 Fig.6 tPHL/ tPLH propagation delay IA<B, IA=B, IA>B to QA<B, QA>B 50 18 14 140 28 24 175 35 30 210 42 36 ns 2.0 4.5 6.0 Fig.6 tPHL/ tPLH propagation delay IA=B to QA=B 39 14 11 120 24 20 150 30 26 180 36 31 ns 2.0 4.5 6.0 Fig.6 tTHL/ tTLH output transition time 19 7 6 75 15 13 95 19 16 110 22 19 ns 2.0 4.5 6.0 Fig.6 December 1990 6 Philips Semiconductors Product specification 4-bit magnitude comparator 74HC/HCT85 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: MSI Note to HCT types The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications. To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT UNIT LOAD COEFFICIENT IA<B IA>B IA=B An, Bn 1.00 1.00 1.50 1.50 AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 min. typ. −40 to +85 max. min. max. −40 to +125 UNIT min. VCC WAVEFORMS (V) max. tPHL/ tPLH propagation delay An, Bn to QA>B or QA<B 26 44 55 66 ns 4.5 Fig.6 tPHL/ tPLH propagation delay An, Bn to QA=B 24 40 50 60 ns 4.5 Fig.6 tPHL/ tPLH propagation delay IA<B, IA=B, IA>B to QA<B, QA>B 18 31 39 47 ns 4.5 Fig.6 tPHL/ tPLH propagation delay IA=B to QA=B 18 31 39 47 ns 4.5 Fig.6 tTHL/ tTLH output transition time 7 15 19 22 ns 4.5 Fig.6 December 1990 7 Philips Semiconductors Product specification 4-bit magnitude comparator 74HC/HCT85 AC WAVEFORMS (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.6 Waveforms showing the word A inputs (An), word B inputs (Bn) and expansion inputs (In) to the outputs (Qn) propagation delays and the output transition times. APPLICATION INFORMATION Fig.7 Series cascading; comparing 12-bit words. December 1990 8 Philips Semiconductors Product specification 4-bit magnitude comparator 74HC/HCT85 Fig.8 Parallel cascading; comparing 12-bit words. PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines”. December 1990 9