INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT151 8-input multiplexer Product specification File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification 8-input multiplexer 74HC/HCT151 FEATURES • True and complement outputs • Multifunction capability • Permits multiplexing from n lines to 1 line • Non-inverting data path • See the “251” for the 3-state version • Output capability: standard • ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT151 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC tPHL/ tPLH propagation delay CL = 15 pF; VCC = 5 V In to Y, Y 17 19 ns Sn to Y, Y 19 20 ns E to Y 12 13 ns E to Y 14 18 ns 3.5 3.5 pF 40 40 pF CI input capacitance CPD power dissipation capacitance per package notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. December 1990 HCT 2 Philips Semiconductors Product specification 8-input multiplexer 74HC/HCT151 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 4, 3, 2, 1, 15, 14, 13, 12 I0 to I7 multiplexer inputs 5 Y multiplexer output 6 Y complementary multiplexer output 7 E enable input (active LOW) 8 GND ground (0 V) 11, 10, 9 S0, S1, S2 select inputs 16 VCC positive supply voltage Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. December 1990 3 Philips Semiconductors Product specification 8-input multiplexer 74HC/HCT151 FUNCTION TABLE INPUTS OUTPUTS E S2 S1 S0 I0 I1 I2 I3 I4 I5 I6 I7 Y Y H X X X X X X X X X X X H L L L L L L L L L L L L L L L H H L H X X X X L H X X X X X X X X X X X X X X X X X X X X X X X X H L H L L H L H L L L L L L L L H H H H L L H H X X X X X X X X L H X X X X L H X X X X X X X X X X X X X X X X H L H L L H L H L L L L H H H H L L L L L L H H X X X X X X X X X X X X X X X X L H X X X X L H X X X X X X X X H L H L L H L H L L L L H H H H H H H H L L H H X X X X X X X X X X X X X X X X X X X X X X X X L H X X X X L H H L H L L H L H Notes 1. H = HIGH voltage level L = LOW voltage level X = don’t care. Fig.4 Functional diagram. December 1990 Fig.5 Logic diagram. 4 Philips Semiconductors Product specification 8-input multiplexer 74HC/HCT151 DC CHARACTERISTICS FOR 74HC For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) TEST CONDITIONS 74HC SYMBOL PARAMETER +25 min. typ. −40 to +85 max. min. max. −40 to +125 min. UNIT VCC WAVEFORMS (V) max. tPHL/ tPLH propagation delay In to Y 52 19 15 170 34 29 215 43 37 255 51 43 ns 2.0 4.5 6.0 Fig.6 tPHL/ tPLH propagation delay In to Y 58 21 17 185 37 31 230 46 39 280 56 48 ns 2.0 4.5 6.0 Fig.6 tPHL/ tPLH propagation delay Sn to Y 61 22 18 185 37 31 230 46 39 280 56 48 ns 2.0 4.5 6.0 Fig.7 tPHL/ tPLH propagation delay Sn to Y 61 22 18 205 41 35 255 51 43 310 62 53 ns 2.0 4.5 6.0 Fig.7 tPHL/ tPLH propagation delay E to Y 41 15 12 125 25 21 155 31 26 190 38 32 ns 2.0 4.5 6.0 Fig.7 tPHL/ tPLH propagation delay E to Y 47 17 14 145 29 25 180 36 31 220 44 38 ns 2.0 4.5 6.0 Fig.7 tTHL/ tTLH output transition time 19 7 6 75 15 13 95 19 16 110 22 19 ns 2.0 4.5 6.0 Figs 6 and 7 December 1990 5 Philips Semiconductors Product specification 8-input multiplexer 74HC/HCT151 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: MSI Note to HCT types The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications. To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT UNIT LOAD COEFFICIENT In Sn E 0.45 1.50 0.30 AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 min. tPHL/ tPLH typ. −40 to +85 max. min. max. −40 to +125 min. UNIT VCC (V) WAVEFORMS max. propagation delay In to Y 22 38 48 57 ns 4.5 Fig.6 tPHL/ tPLH propagation delay In to Y 22 38 48 57 ns 4.5 Fig.6 tPHL/ tPLH propagation delay Sn to Y 23 41 51 62 ns 4.5 Fig.7 tPHL/ tPLH propagation delay Sn to Y 25 43 54 65 ns 4.5 Fig.7 tPHL/ tPLH propagation delay E to Y 16 29 36 44 ns 4.5 Fig.7 tPHL/ tPLH propagation delay E to Y 21 36 45 54 ns 4.5 Fig.7 tTHL/ tTLH output transition time 7 15 19 22 ns 4.5 December 1990 6 Figs 6 and 7 Philips Semiconductors Product specification 8-input multiplexer 74HC/HCT151 AC WAVEFORMS (1) HC : VM = 50%; VI = GND to VCC. HCT : VM = 1.3 V; VI = GND to 3 V. Fig.6 Waveforms showing the multiplexer input (In) to outputs (Y and Y) propagation delays and the output transition times. (1) HC : VM = 50%; VI = GND to VCC. HCT : VM = 1.3 V; VI = GND to 3 V. Fig.7 Waveforms showing the select input (Sn) and enable input (E) to outputs (Y and Y) propagation delays and the output transition times. PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines”. December 1990 7