PHILIPS TDA8540

INTEGRATED CIRCUITS
DATA SHEET
TDA8540
4 × 4 video switch matrix
Product specification
Supersedes data of April 1993
File under Integrated Circuits, IC02
Philips Semiconductors
1995 Feb 06
Philips Semiconductors
Product specification
4 × 4 video switch matrix
TDA8540
FEATURES
• I2C-bus or non-I2C-bus mode (controlled by
DC voltages)
• S-VHS or CVBS processing
• 3-state switches for all channels
• Selectable gain for the video channels
• sub-address facility
GENERAL DESCRIPTION
• Slave receiver in the I2C mode
The TDA8540 has been designed for switching between
composite video signals, therefore the minimum of four
input lines are provided as requested for switching
between two S-VHS sources. Each of the four outputs can
be set to a high impedance state, to enable parallel
connection of several devices.
• Auxiliary logic outputs for audio switching
• System expansion possible up to 7 devices
(28 sources)
• Static short-circuit proof outputs
• ESD protection.
APPLICATIONS
• Colour Television (CTV) receivers
• Peritelevision sets
• Satellite receivers.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCC
supply voltage
7.2
−
8.8
V
ICC
supply current
−
20
30
mA
ISO
isolation ‘OFF’ state
60
80
−
dB
B
3 dB bandwidth
12
−
−
MHz
αct
crosstalk attenuation between
channels
60
70
−
dB
at f = 5 MHz
ORDERING INFORMATION
PACKAGE
TYPE
NUMBER
NAME
TDA8540
DIP20
plastic dual in-line package; 20 leads (300 mil)
SOT146-1
TDA8540T
SO20
plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
1995 Feb 06
DESCRIPTION
2
VERSION
Philips Semiconductors
Product specification
4 × 4 video switch matrix
TDA8540
BLOCK DIAGRAM
handbook, full pagewidth
VCC(D0,1)
15
SWITCH MATRIX
IN3
IN2
IN1
IN0
AGND
4
12
PEAKCLAMP
DRIVER
3
3
GAIN
10
PEAKCLAMP
DRIVER
2
1
GAIN
8
PEAKCLAMP/
BIAS
DRIVER
1
14
GAIN
6
PEAKCLAMP/
BIAS
DRIVER
0
16
GAIN
2
CL0 to CL1
VCC
DGND
VCC(D2,3)
4
9
4
2
2
DECODER
1 OF 4
2
SUPPLY
OUT2
OUT1
G0 to G3
4
2
EN0 to EN3
4
17
D1
I 2 C RECEIVER
2
power reset
11
7
5
18
19
MLA279 - 2
S0
S1
S2
SCL
SDA
Fig.1 Block diagram.
1995 Feb 06
OUT0
4
DECODER DECODER
1 OF 4
1 OF 4
TDA8540
13
20
4
DECODER
1 OF 4
OUT3
3
D0
Philips Semiconductors
Product specification
4 × 4 video switch matrix
TDA8540
PINNING
SYMBOL
PIN
DESCRIPTION
OUT2
1
video output 2
D0
2
control output 0
OUT3
3
video output 3
VCC(D2,3)
4
driver supply voltage; for
drivers 2 and 3
S2
5
sub-address input 2
IN0
6
video input 0 (CVBS or
chrominance signal)
S1
7
sub-address input 1
IN1
8
video input 1 (CVBS or
chrominance signal)
AGND
9
analog ground
IN2
10
video input 2 (CVBS or luminance
signal)
S0
11
sub-address input 0
IN3
12
video input 3 (CVBS or luminance
signal)
VCC
13
general supply voltage
OUT1
14
video output 1
VCC(D0,1)
15
driver supply voltage; for
drivers 0 and 1
OUT0
16
video output 0
D1
17
control output 1
SCL
18
serial clock input
SDA
19
serial data input/output
DGND
20
digital ground
1995 Feb 06
handbook, halfpage
OUT2
1
20 DGND
D0
2
19 SDA
OUT3
3
18 SCL
VCC(D2,3)
4
17 D1
S2
5
16 OUT0
TDA8540
IN0
6
15 VCC(D0,1)
S1
7
14 OUT1
IN1
8
13 VCC
AGND
9
12 IN3
IN2 10
11 S0
MLA277 - 2
Fig.2 Pinning configuration.
4
Philips Semiconductors
Product specification
4 × 4 video switch matrix
TDA8540
FUNCTIONAL DESCRIPTION
Table 1
The TDA8540 is controlled via a bidirectional I2C-bus.
3 bits of the I2C address can be selected via the address
pin, thus providing a facility for parallel connection of
7 devices.
I2C-bus sub-addressing
SUB-ADDRESS
S2
S1
S0
A2
A1
A0
L
L
L
0
0
0
Control options via the I2C-bus:
L
L
H
0
0
1
• The input signals can be clamped at their negative peak
(top sync).
L
H
L
0
1
0
L
H
H
0
1
1
• The gain factor of the outputs can be selected between
1× or 2×.
H
L
L
1
0
0
H
L
H
1
0
1
• Each of the four outputs can individually be connected
to one of the four inputs.
H
H
L
1
1
0
H
• Each output can individually be set in a high impedance
state.
H
non
addressable
I2C-bus control
• Two binary output data lines can be controlled for
switching accompanying sound signals.
After power-up the outputs are initialized in the high
impedance state, and D0 and D1 are at a LOW level.
The SDA and SCL pins (pins 19 and 18) can be connected
to the I2C-bus or to DC switching voltage sources. Address
inputs S0 to S2 (pins 11, 7 and 5) are used to select
sub-addresses or switching to the non-I2C mode. Inputs
S0 to S2 can be connected to the supply voltage (HIGH) or
the ground (LOW). In this way no peripheral components
are required for selection.
Table 2
H
I2C
Detailed description of the I2C-bus specification, with
applications, is given in brochure “The I2C-bus and how to
use it”. This brochure may be ordered using the code
9398 393 40011.
The TDA8540 is a slave receiver and the protocol is given
in Table 2.
The TDA8540 protocol
SEQUENCE
S(1)
SLV(2)
A(3)
SUB
A(3)
DATA
A(3)
DATA
A(3)
P(4)
Notes
1. S = START condition.
2. Data transmission to the TDA8540 starts with the slave address (SLV).
3. A = acknowledge bit, generated by TDA8540.
4. P = STOP condition.
Table 3
Data transmission to the TDA8540 begins with SLV
A6
MSB
A5
A4
A3
A2
A1
A0
R/W
LSB
1
0
0
1
A2(1)
A1(1)
A0(1)
0(2)
Notes
1. A2 to A0: pin programmable slave address bits.
2. R/W = 0; write only.
After the SLV, a second byte, SUB, is required for selecting the functions, as shown in Table 4.
1995 Feb 06
5
Philips Semiconductors
Product specification
4 × 4 video switch matrix
Table 4
TDA8540
The second byte: SUB
7 MSB
6
5
4
3
2
1
0 LSB
0
0
0
0
0
0
RS1
RS0
Options for SUB:
If SUB = 00H: access to switch control (SW1)
If SUB = 01H: access to gain/clamp/data control (GCO)
If SUB = 02H: access to output enable control (OEN).
Remarks:
If more than one data byte is sent, the SUB byte will be automatically incremented.
If more than 3 data bytes are sent, the internal counter will roll over and the device will then rewrite the first register.
Data Bytes
SWI (SUB = 00H): selects which input is connected to the different outputs, as shown in Table 5.
Table 5
SWI (SUB = 00H) selection of inputs connected to outputs
7 MSB
6
5
4
3
2
1
0 LSB
S31
S30
S21
S20
S11
S10
S01
S00
Table 6
Selection of inputs
Sj1 AND Sj0(1)
OUTPUT
OUTj
00
01
10
11
IN0
IN1
IN2
IN3
Note
1. For j = 0 to 3.
Example: if S21 = 0 and S20 = 1, then OUT2 is connected to IN1.
GCO (SUB = 01H):
• Selects the gain of each output.
• Selects the clamp action or mean value on inputs 0 and 1.
• Determines the value of the auxiliary outputs D1 and D0.
Table 7
GCO byte
7 MSB
6
5
4
3
2
1
0 LSB
G3(1)
G2(1)
G1(1)
G0(1)
CL1(2)
CL0(2)
D1(3)
D0(3)
Notes
1. For j = 0 to 3: if Gj = 0 (1), then output j has a gain of 2 (1).
2. If CL0 (CL1) = 0, then input signal on IN0 (IN1) is clamped.
3. For j = 0 or 1: if Dj = 0 (1), then logical output j is LOW (HIGH).
1995 Feb 06
6
Philips Semiconductors
Product specification
4 × 4 video switch matrix
TDA8540
OEN (SUB = 02H): selects, for each output, if the output is active or high impedance, see Table 8.
Table 8
OEN (SUB = 02H) determines which output is active or high impedance
7 MSB
6
5
4
3
2
1
0 LSB
X(1)
X(1)
X(1)
X(1)
EN3(2)
EN2(2)
EN1(2)
EN0(2)
Notes
1. X = don’t care.
2. For j = 0 to 3: if ENj = 0 (1), then OUT j is high impedance (active).
After a power-on reset:
• The outputs are set to a high impedance state; the outputs are connected to IN0; the gains are set at two and inputs
IN0 and IN1 are clamped.
• Programming of the device is necessary because the outputs are in high impedance state.
Non-I2C-bus control
If the S0, S1 and S2 pins are all connected to VCC the device will enter the non-I2C-bus mode.
After a power-on reset:
• Gain is set at two for all outputs.
• All inputs are clamped.
• All outputs are active.
• The matrix position is given by the SDA and SCL voltage level.
Table 9
Non-I2C-bus control
SCL AND SDA
OUTPUT
00
01
10
11
OUT3
IN3
IN2
IN1
IN0
OUT2
IN2
IN3
IN0
IN1
OUT1
IN1
IN0
IN3
IN2
OUT0
IN0
IN1
IN2
IN3
SCL and SDA act as normal input pins:
SCL interchanges (OUT3 and OUT2) with (OUT1 and OUT0).
SDA interchanges OUT3 with OUT2 and OUT1 with OUT0.
Remark: For use with chrominance signals, the clamp action must be overruled by external bias.
1995 Feb 06
7
Philips Semiconductors
Product specification
4 × 4 video switch matrix
TDA8540
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage (pin 13)
−0.3
+9.1
V
Ptot
total power dissipation
−
750
mW
VCC(D0,1), VCC(D2,3)
driver supply voltage
−0.3
+13.8
V
IN0 to IN3
video input voltage
−0.3
+7.2
V
OUT0 to OUT3
video output voltage
−0.3
+7.2
V
D0, D1
control output voltage
−0.3
+7.2
V
SDA, SDL
I2C
−0.3
+8.8
V
input/output voltage
S0 to S2
sub-address input voltage
−0.3
+8.8
V
Tstg
IC storage temperature
−55
+125
°C
Tj
junction temperature
−
+150
°C
Ves
electrostatic handling
HBM; note 1
−1500
+1500
V
MM; note 2
−200
+200
V
Notes
1. Human Body Model (HBM): in accordance with UZW-BO/FQ-A302.
2. Machine Model (MM): in accordance with UZW-BO/FQ-B302 (stress reference pins: AGND and DGND
short-circuited and VCC).
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
VALUE
UNIT
SOT146-1
60 (typ.)
K/W
SOT163-1
85 (typ.)
K/W
thermal resistance from junction to ambient in free air
OPERATING CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
General
VCC
supply voltage (pin 13)
7.2
−
8.8
V
Tamb
operating ambient temperature
0
−
70
°C
−
100
−
nF
Video inputs (pins 6, 8, 10 and 12)
CI
external capacitor
VI(p-p)
C signal amplitude (peak-to-peak value)
note 1
−
−
1
V
VI(p-p)
CVBS or Y-signal amplitude
(peak-to-peak value)
note 2
−
−
1.5
V
Video drivers (pins 4 and 15)
RD
external collector resistor
note 3
−
25
−
Ω
CD
external decoupling capacitor
note 4
−
22
−
µF
1995 Feb 06
8
Philips Semiconductors
Product specification
4 × 4 video switch matrix
SYMBOL
TDA8540
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Sub-address S0, S1 and S2 (pins 5, 7 and 11)
VIH
HIGH level input voltage
4
−
VCC
V
VIL
LOW level input voltage
0
−
1
V
Notes
1. Only for pins 6 and 8 when clamp action is not selected for these pins.
2. On all the video input pins, when non-I2C-bus control mode is selected or when clamp action is selected on
pins 6 and 8 (by I2C-bus control).
3. Connected between VCC and pin 4 or pin 15.
4. Connected between AGND and pin 4 or pin 15.
CHARACTERISTICS
VCC = 8 V; Tamb = 25 °C; gain condition, clamp condition and OFF state are controlled by the I2C-bus;
unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Supply
ICC
supply current
without load
−
20
30
mA
OFF state
−
12
−
mA
−
0.4
1
µA
Video inputs: IN0 to IN3 when the clamp is active (see Figs 3 and 4)
ILI
input leakage current
VI = 3 V
Vclamp
input clamping voltage
II = 5 µA
−
2.2
−
V
Iclamp
input clamping current
VI = 0 V
1.2
−
−
mA
−
2.9
−
V
−
10
−
kΩ
100
−
−
kΩ
−
5
−
Ω
60
−
−
dB
Video inputs: IN0 and IN2 when the clamp is not active (see Fig.3)
Vbias
DC input bias level
RI
input resistance
II = 0
Video outputs: OUT0 to OUT3 (see Fig.5)
ZO
output impedance
RO
output resistance
ISO
isolation
VO
output top sync level; (Y or CVBS)
0.4
0.7
1
V
Vbias
output mean value for chrominance
signals
G = 2; load = 150 Ω
1.5
1.9
2.2
V
G = 1; without load
1
1.3
1.6
V
voltage gain
G = 1; f = 1 MHz
−1
0
+1
dB
G = 2; f = 1 MHz
5
6
7
dB
note 1
−
0.5
3
%
Gv
OFF state
OFF state; f = 5 MHz
Gdiff
differential gain
ϕdiff
differential phase
note 1
−
0.6
−
deg
NL
non linearity
note 2
−
0.5
2
%
αct
crosstalk attenuation between channels
note 3
60
70
−
dB
SVRR
supply voltage rejection
note 4
36
55
−
dB
1995 Feb 06
9
Philips Semiconductors
Product specification
4 × 4 video switch matrix
SYMBOL
∆G
αct
TDA8540
PARAMETER
CONDITIONS
100 kHz < f < 5 MHz
maximum gain variation
MIN.
−
TYP.
0.5
MAX. UNIT
−
dB
100 kHz < f < 8.5 MHz −
1
−
dB
100 kHz < f < 12 MHz
−
3
−
dB
60
−
−
dB
crosstalk attenuation of I2C-bus signals
Auxiliary outputs D0 and D1 (open collector)
IOH
HIGH level output current
VOH = 5.5 V
−
−
10
µA
VOL
LOW level output voltage
IOL = 4 mA
−
−
0.4
V
I2C-bus inputs SCL and SDA
IIH
HIGH level input current
VIH = 3.0 V
−
−
10
µA
IIL
LOW level input current
VIL = 1.5 V
−10
−
−
µA
Ci
input capacitance
−
−
10
pF
IOL = 3 mA
−
−
0.4
V
I2C-bus output SDA
VOL
LOW level output voltage
Sub-address S0, S1 and S2
IIH
HIGH level input current
VIH = VCC
−
−
10
µA
IIL
LOW level input current
VIL = 0 V
−
−
10
µA
Notes
1. Gain set at 2; RL = 150 Ω; test signal D2 from CCIR 330.
2. Gain set at 2; RL = 150 Ω; test signal D1 from CCIR 17.
3. Measured from any selected input to output; f = 5 MHz; RL = 150 Ω; gain set at 2; VI = 1.5 V (peak-to-peak value).
This measurement requires an optimized board.
V ripple (supply)
4. Supply voltage ripple rejection: 20 log -------------------------------------- ;
V ripple (on output)
measured at f = 1 kHz with V ripple (supply max) = 100 mV (peak-to-peak value).
The supply voltage rejection ratio is >36 dB at fmax = 100 kHz.
1995 Feb 06
10
Philips Semiconductors
Product specification
4 × 4 video switch matrix
TDA8540
book, full pagewidth
V ref =
2.2 V + V be
6V
CLAMP
CONTROL
IN0 or
IN1
TDA8540
MLA282 - 1
Fig.3 IN0 and IN1 inputs.
handbook, halfpage VCC
VCC(D0,1) ( VCC(D2,3) )
handbook, halfpage
TDA8540
6V
V ref =
2.2 V + Vbe
IN2 or
IN3
OUT0 (OUT2)
OUT1 (OUT3)
TDA8540
MLA280
MLA281 - 1
Fig.4 IN2 and IN3 inputs.
1995 Feb 06
Fig.5 Driver output stage.
11
Philips Semiconductors
Product specification
4 × 4 video switch matrix
TDA8540
APPLICATION INFORMATION
handbook, full pagewidth
25 Ω
VCC
R
100 µF
Ci
100 nF
25 Ω
R
D
22 µF
CD
22 µF
CD
VCC(D2,3)
IN3
VCC
D
4
VCC(D0,1)
15
12
3
Ci
100 nF
1
IN2
video
sources
Ci
100 nF
Ci
100 nF
10
14
IN1
IN0
16
TDA8540
8
13
2
20
DGND
9
11
7
5
OUT1
S0
S1
S2
18
outputs
OUT0
D1
10
kΩ
10
kΩ
digital
supply
(+5 V)
audio
source
control
D0
19
AGND
address
inputs
SCL SDA
serial data
and
clock signals
VCC = analog supply (+8 V).
Fig.6 Application diagram.
1995 Feb 06
OUT2
6
17
VCC
OUT3
12
MLA278 - 3
Philips Semiconductors
Product specification
4 × 4 video switch matrix
TDA8540
PACKAGE OUTLINES
seating plane
26.92
26.54
8.25
7.80
3.2
max
3.60
3.05
4.2
max
0.51
min
2.0
max
2.54
(9x)
0.53
max
0.254 M
0.38 max
7.62
1.73 max
10.0
8.3
MSA258
20
11
6.40
6.22
1
10
Dimensions in mm.
Fig.7 Plastic dual in-line package; 20 leads (300 mil); DIP20; SOT146-1.
1995 Feb 06
13
Philips Semiconductors
Product specification
4 × 4 video switch matrix
TDA8540
13.0
12.6
handbook, full pagewidth
7.6
7.4
10.65
10.00
0.1 S
S
A
0.9 (4x)
0.4
20
11
2.45
2.25
1.1
1.0
0.3
0.1
2.65
2.35
0.32
0.23
pin 1
index
1
1.1
0.5
10
0 to 8
detail A
1.27
0.49
0.36
0.25 M
(20x)
Dimensions in mm.
Fig.8 Plastic small outline package; 20 leads; body width 7.5 mm (SO20; SOT163-1).
1995 Feb 06
14
o
MBC234 - 1
Philips Semiconductors
Product specification
4 × 4 video switch matrix
TDA8540
SOLDERING
REPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING
IRON OR PULSE-HEATED SOLDER TOOL)
Plastic small outline packages
During placement and before soldering, the component
must be fixed with a droplet of adhesive. After curing the
adhesive, the component can be soldered. The adhesive
can be applied by screen printing, pin transfer or syringe
dispensing.
Fix the component by first soldering two, diagonally
opposite, end pins. Apply the heating tool to the flat part of
the pin only. Contact time must be limited to 10 s at up to
300 °C. When using proper tools, all other pins can be
soldered in one operation within 2 to 5 s at between 270
and 320 °C. (Pulse-heated soldering is not recommended
for SO packages.)
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder bath is
10 s, if allowed to cool to less than 150 °C within 6 s.
Typical dwell time is 4 s at 250 °C.
For pulse-heated solder tool (resistance) soldering of VSO
packages, solder is applied to the substrate by dipping or
by an extra thick tin/lead plating before package
placement.
BY WAVE
A modified wave soldering technique is recommended
using two solder waves (dual-wave), in which a turbulent
wave with high upward pressure is followed by a smooth
laminar wave. Using a mildly-activated flux eliminates the
need for removal of corrosive residues in most
applications.
Plastic dual in-line packages
BY DIP OR WAVE
The maximum permissible temperature of the solder is
260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.
BY SOLDER PASTE REFLOW
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.
Reflow soldering requires the solder paste (a suspension
of fine solder particles, flux and binding agent) to be
applied to the substrate by screen printing, stencilling or
pressure-syringe dispensing before device placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt, infrared, and
vapour-phase reflow. Dwell times vary between 50 and
300 s according to method. Typical reflow temperatures
range from 215 to 250 °C.
REPAIRING SOLDERED JOINTS
Apply a low voltage soldering iron below the seating plane
(or not more than 2 mm above it). If its temperature is
below 300 °C, it must not be in contact for more than 10 s;
if between 300 and 400 °C, for not more than 5 s.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 min at 45 °C.
1995 Feb 06
15
Philips Semiconductors
Product specification
4 × 4 video switch matrix
TDA8540
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1995 Feb 06
16
Philips Semiconductors
Product specification
4 × 4 video switch matrix
TDA8540
NOTES
1995 Feb 06
17
Philips Semiconductors
Product specification
4 × 4 video switch matrix
TDA8540
NOTES
1995 Feb 06
18
Philips Semiconductors
Product specification
4 × 4 video switch matrix
TDA8540
NOTES
1995 Feb 06
19
Philips Semiconductors – a worldwide company
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SCD38
© Philips Electronics N.V. 1994
All rights are reserved. Reproduction in whole or in part is prohibited without the
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Date of release: 1995 Feb 06
9397 747 30011