INTEGRATED CIRCUITS DATA SHEET TEA6880H Up-level Car radio Analog Signal Processor (CASP) Product specification File under Integrated Circuits, IC01 2000 May 08 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H CONTENTS 12 INTERNAL CIRCUITRY 13 PACKAGE OUTLINE 14 SOLDERING 14.1 Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods 1 FEATURES 1.1 1.2 1.3 1.4 General Stereo decoder and noise blanking Weak signal processing Audio pre-amplifier 2 GENERAL DESCRIPTION 3 ORDERING INFORMATION 4 QUICK REFERENCE DATA 5 BLOCK DIAGRAM 15 DATA SHEET STATUS 6 PINNING 16 DEFINITIONS 7 FUNCTIONAL DESCRIPTION 17 DISCLAIMERS 7.1 7.2 7.3 7.4 18 PURCHASE OF PHILIPS I2C COMPONENTS 7.5 7.5.1 7.5.2 7.5.3 7.5.4 7.5.5 7.5.6 7.5.7 7.5.8 Stereo decoder FM noise blanker AM noise blanker Multipath/fading detection and weak signal control Tone/volume control Source selector Loudness Volume 1 Treble Bass Volume 2 RSA selector Chime adder 8 LIMITING VALUES 9 THERMAL CHARACTERISTICS 10 CHARACTERISTICS 11 I2C-BUS PROTOCOL 11.1 11.2 11.3 11.4 11.5 11.6 11.7 11.8 11.9 11.10 11.11 11.12 11.13 11.14 11.15 11.16 Read mode: 1st data byte Read mode: 2nd data byte Subaddress byte for write Write mode: subaddress 0H Write mode: subaddress 1H Write mode: subaddress 2H Write mode: subaddress 3H Write mode: subaddress 4H Write mode: subaddress 5H Write mode: subaddress 6H Write mode: subaddress 7H Write mode: subaddress 8H Write mode: subaddress 9H Write mode: subaddress AH Write mode: subaddress BH Write mode: subaddress CH 2000 May 08 14.2 14.3 14.4 14.5 2 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) 1 TEA6880H FEATURES 1.1 General • I2C-bus compatible • Digital alignment/adjustment via I2C-bus: – FM noise blanker sensitivity • Volume 1 control from +20 to −56 dB in 1 dB steps; programmable 20 dB loudness control included – FM stereo noise canceller – FM High Cut Control (HCC) • Volume 2 control from 0 to −56 dB in 1 dB steps, −56, −58.5, −62, −68 dB and mute – FM stereo separation. • FM audio processing hold for RDS updating; holds the detectors for the FM weak signal processing in their present state • Programmable loudness control with bass boost as well as bass and treble boost • FM bandwidth limiting; limits the bandwidth of the FM audio signal with external capacitors • Bass control from −18 to +18 dB in 2 dB steps with selectable characteristic • Treble control from −14 to +14 dB in 2 dB steps • AM stereo input; AM stereo audio can be fed in at the pins for the de-emphasis capacitors; this will provide 8 dB of gain to the AM audio. 1.2 • Analog Step Interpolation (ASI) minimizes pops by smoothing out the transitions in the audio signal when a switch is made • Audio Blend Control (ABC) minimizes pops by automatically incrementing the volume and loudness controls through each step between their present settings and the new settings Stereo decoder and noise blanking • FM stereo decoder • Accepts FM multiplex signal and AM audio at input • Rear Seat Audio (RSA) can select different sources for the front and rear speakers • Pilot detector and pilot canceller • De-emphasis selectable between 75 and 50 µs • Chime input: can be sent to any audio output, at any volume level • AM noise blanker: impulse noise detector and an audio hold. 1.3 • Chime adder circuit: chime input can also be summed with left front and/or right front audio, or be turned off. Weak signal processing • FM weak signal processing: six signal condition detectors, soft mute, stereo noise canceller (blend), and High Cut Control (roll-off). 1.4 2 The TEA6880H is a monolithic bipolar integrated circuit providing the stereo decoder function and ignition noise blanking facility combined with source selector and tone/volume control for AM/FM car radio applications. The device operates with a power supply voltage range of 7.8 to 9.2 V and a typical current consumption of 40 mA. Audio pre-amplifier • Source selector for 6 sources: 2 stereo inputs external (A and B), 1 symmetrical stereo input (C), 1 symmetrical mono input (D), 1 internal stereo input (AM or FM), and 1 chime/diagnostic mono input 3 GENERAL DESCRIPTION ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TEA6880H QFP64 2000 May 08 DESCRIPTION plastic quad flat package; 64 leads (lead length 1.95 mm); body 14 × 20 × 2.8 mm 3 VERSION SOT319-2 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) 4 TEA6880H QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VCC supply voltage 7.8 8.5 9.2 V ICC supply current 32 40 48 mA Stereo decoder path S/N signal-to-noise ratio − 78 − dB THD total harmonic distortion − 0.1 − % αcs channel separation 40 − − dB Vo(rms) output voltage level at pins ROPO and FM: 91% modulation; LOPO AM: 100% modulation; fmod = 400 Hz 840 950 1060 mV Tone volume control Vo(rms) maximum output voltage level at pins LF, LR, RF and RR VCC = 8.5 V; THD ≤ 0.1% 2000 − − mV Gv voltage gain 1 dB steps −112 − +20 dB Gstep(vol) step resolution (volume) − 1 − dB Gbass bass control −18 − +18 dB Gtreble treble control −14 − +14 dB − 2 − dB Gstep(treble, bass) step resolution (bass and treble) (S + N)/N signal-plus-noise to noise ratio Vo = 2.0 V; Gv = 0 dB; unweighted − 107 − dB THD total harmonic distortion Vo(rms) = 1.0 V; Gv = 0 dB − 0.01 − % RR100 ripple rejection Vr(rms) < 200 mV; f = 100 Hz; Gv = 0 dB − 70 − dB CMRR common mode rejection ratio differential stereo input 48 53 − dB 2000 May 08 4 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) 5 TEA6880H BLOCK DIAGRAM fref (75.4 kHz) handbook, full pagewidth from NICE 100 nF (AFSAMPLE) audio processing hold (for RDS update) 10 nF 68 kΩ 470 kΩ 6.8 nF 100 nF AM mono input 33 nF 220 kΩ 51 50 49 48 47 100 nF 44 45 46 22 nF 100 kΩ 43 52 A trigger sensitivity 120 kHz HIGH-PASS AMPLIFIER AM GATE NOISE & INTERFERENCE DETECTOR AGC 220 nF 10 nF RIN 182 kΩ 220 nF 100 kΩ 82 kΩ 60 kHz HIGH-PASS & USN DETECTOR pilot ind. STEREO DECODER PLL PEAK DETECTOR (SNC) detector hold 38 kHz sensitivity C 56 57 33 pF 10 nF test AVERAGE DETECTOR (MUTE/HCC) 19 kHz 10 µF B 54 55 MPXRDS FM PULSE FORMER PULSE SEPARATOR 53 AMNBIN MPX input 6.8 nF 58 INPUT BUFFER & 80 kHz LOW-PASS start/ slope sep.adj. mute slope MATRIX & SOFT-MUTE mute start 3.3 nF 59 3.3 nF 60 2.7 nF 61 2.7 nF 62 4.7 nF 63 4.7 nF 64 PEAK DETECTOR (WBAM2) V/I CONVERTER detector reset TEA6880H PEAK DETECTOR (USN2) SNC 38 kHz AVERAGE DETECTOR (WBAM1) FM BUFFER & FM NB-GATES HCC 50/75 µs DE-EMPHASIS & AM STEREO INPUT STEREO DECODER OUTPUT D start/ slope E detector hold BUS AVERAGE DETECTOR (USN1) LEVEL ADC (6-BIT) de-emphasis switch detector hold I2C-BUS & CONTROL LOGIC bus controls detector reset F 20 kHz BAND-PASS & AMWB DETECTOR LEVEL INPUT BUFFER test G sensitivity H 1 2 4 3 5 6 7 22 kΩ 10 nF 22 kΩ I2C-bus to NICE from AM/FM level detector I2C-bus MHB427 VDD(I2C-bus) Fig.1 Block diagram (continued in Fig.2). 2000 May 08 5 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H handbook, full pagewidth 3.3 kΩ AM noise blanker flag 330 pF 42 41 10 nF 220 nF 40 39 left rear output left front output right front output right rear output 220 nF 15 nF 38 36 37 35 33 34 A CHIME ADDER (G = −20 dB) & SWITCH B AM PULSE FORMER BUS PEAK TO AVERAGE DETECTOR VOLUME 2 LEFT FRONT BUS CHIME ADDER (G = −20 dB) & SWITCH BUS BUS BUS REAR SEAT AUDIO SWITCH VOLUME 2 LEFT REAR BUS BUS VOLUME 2 RIGHT REAR VOLUME 2 RIGHT FRONT BUS D ASI WBAM ADC (3-BIT) ANALOG STEP INTERPOLATION (ASI) LEFT TREBLE BAND BUS RIGHT BASS BAND ASI ABC LEFT BASS BAND ABC 32 C BUS 31 RIGHT TREBLE BAND BUS 30 220 nF 3.3 kΩ 220 nF 10 nF BUS E BUS USN ADC (3-BIT) VOLUME 1 LEFT AUDIO BLEND CONTROL (ABC) VOLUME 1 RIGHT LOUDNESS LEFT ASI/ABC control LOUDNESS RIGHT BUS 29 68 nF 4.7 kΩ 43 kΩ 680 nF 28 BUS 27 TEA6880H BUS BUS CKVR 26 25 INTERNAL POWER SUPPLY A left 100 nF 23 220 nF CKIR 24 BUS 220 nF CKIL A right CVHS 220 nF 47 µF F SOURCE SELECTOR & REAR SEAT AUDIO SELECTOR G 22 100 nF 21 100 nF 20 H 8 9 100 nF VCC (+8.5 V) input diagnostic & chime 11 10 68 nF 12 CKVL 43 kΩ 680 pF 4.7 kΩ 13 220 nF 14 15 16 220 nF 220nF B right address select B left 17 CELFI 22 µF 18 19 1 µF C right C common Fig.2 Block diagram (continued from Fig.1). 2000 May 08 6 1 µF MHB428 D input mono symmetric 1 µF C left Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) 6 TEA6880H PINNING SYMBOL PIN DESCRIPTION SDAQ 1 data output (to TEA6840H) SCLQ 2 clock output (to TEA6840H) LEVEL 3 FM and AM level input (from TEA6840H) SCL 4 I2C-bus clock SDA 5 I2C-bus data DGND 6 digital ground TBL 7 time constant for FM modulation detector VCC 8 supply voltage CHIME 9 chime tone input AGND 10 analog ground LLN 11 loudness left network LOPI 12 left option port input (terminal impedance typical 100 kΩ) LOPO 13 left option port output BRI 14 channel B right stereo input (terminal impedance typical 100 kΩ) ADR 15 address select BLI 16 channel B left stereo input (terminal impedance typical 100 kΩ) SCAP 17 supply filter capacitor CRIP 18 channel C right symmetrical input (terminal impedance typical 30 kΩ) CCOM 19 channel C common input (terminal impedance typical 30 kΩ) CLIP 20 channel C left symmetrical input (terminal impedance typical 30 kΩ) MONOC 21 mono common input (terminal impedance typical 30 kΩ) MONOP 22 mono symmetrical input (terminal impedance typical 30 kΩ) VHS 23 half supply filter capacitor ARI 24 channel A right stereo input (terminal impedance typical 100 kΩ) AMNCAP 25 peak-to-average detector capacitor for AM noise blanker ALI 26 channel A left stereo input (terminal impedance typical 100 kΩ) ROPO 27 right option port output ROPI 28 right option port input (terminal impedance typical 100 kΩ) RLN 29 loudness right network RTC 30 right treble capacitor RBI 31 right bass network input RBO 32 right bass network output RF 33 right front output RR 34 right rear output ASICAP 35 analog step interpolate capacitor LR 36 left rear output LF 37 left front output LBO 38 left bass network output LBI 39 left bass network input LTC 40 left treble capacitor 2000 May 08 7 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) SYMBOL TEA6880H PIN DESCRIPTION AMPCAP 41 AM blanking time capacitor AMHOLD 42 AM noise blanker flag AMHCAP 43 AM noise blanker hold capacitor Iref 44 temperature independent reference current TWBAM2 45 time constant for AM wideband peak detector TUSN2 46 time constant for ultrasonic noise peak detector PHASE 47 phase detector fref 48 frequency reference input (75.4 kHz from TEA6840H) PILOT 49 pilot on/off output AFSAMPLE 50 reset for multipath detector (from TEA6840H for RDS update) FMHOLD 51 FM audio processing hold input (from TEA6840H for RDS update) AMHIN 52 AM signal input (from TEA6840H) AMNBIN 53 AM noise blanker input (from TEA6840H) TMUTE 54 time constant for soft mute MPXRDS 55 unmuted MPX input (from TEA6840H for RDS update) TSNC 56 time constant for stereo noise canceller MPXIN 57 MPX input (from TEA6840H) FMNCAP 58 FM noise detector capacitor DEEML 59 left de-emphasis capacitor DEEMR 60 right de-emphasis capacitor FMLBUF 61 left AM/FM audio buffer capacitor FMRBUF 62 right AM/FM audio buffer capacitor TWBAM1 63 time constant for AM wideband average detector TUSN1 64 time constant for ultrasonic noise average detector 2000 May 08 8 Philips Semiconductors Product specification 52 AMHIN 53 AMNBIN 54 TMUTE 55 MPXRDS 56 TSNC 57 MPXIN 58 FMNCAP TEA6880H 59 DEEML 60 DEEMR 61 FMLBUF 62 FMRBUF handbook, full pagewidth 63 TWBAM1 64 TUSN1 Up-level Car radio Analog Signal Processor (CASP) SDAQ 1 51 FMHOLD SCLQ 2 50 AFSAMPLE LEVEL 3 49 PILOT SCL 4 48 fref SDA 5 47 PHASE DGND 6 46 TUSN2 TBL 7 45 TWBAM2 VCC 8 44 Iref 43 AMHCAP CHIME 9 TEA6880H AGND 10 42 AMHOLD 41 AMPCAP LLN 11 LOPI 12 40 LTC LOPO 13 39 LBI 38 LBO BRI 14 ADR 15 37 LF BLI 16 36 LR 35 ASICAP SCAP 17 Fig.3 Pin configuration. 2000 May 08 9 RBO 32 RBI 31 RTC 30 RLN 29 ROPI 28 ROPO 27 ALI 26 AMNCAP 25 ARI 24 VHS 23 33 RF MONOP 22 CCOM 19 MONOC 21 34 RR CLIP 20 CRIP 18 MHB408 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) 7 7.1 TEA6880H The matrix is followed by the FM noise suppression gates, which are combined with FM single poles and High Cut Control (HCC). The single pole is defined by internal resistors and external capacitors. From the gate circuits audio is fed to the switchable de-emphasis, where the demodulated AM stereo signal can be fed in. After de-emphasis the signal passes to the output buffers and is fed to the radio input of the source selector. For HCC, the time constant of the single pole contained in the output buffer can be changed to higher values. This function is controlled by an average detector contained in the multipath and fading detector. FUNCTIONAL DESCRIPTION Stereo decoder The MPX input is the null-node of an operational amplifier with internal feedback resistor. Adapting the stereo decoder input to the level of the MPX signal, coming from the FM demodulator output, is realized by the value of the input series resistor RIN. To this input a second source (AM detector output) can be fed by current addition. The input amplifier is followed by an integrated 4th order Bessel low-pass filter with a cut-off frequency of 80 kHz. It provides necessary signal delay for FM noise blanking and damping of high frequency interferences coming to the stereo decoder input. 7.2 The input of the ignition noise blanker is coupled to the MPXRDS (pin 55) input signal and to the IF level input (pin 3). Both signals are fed via separate 120 kHz filters and rectifiers to an adder circuit. The output signal of the adder circuit is fed in parallel to the noise detector and the interference detector. The noise detector is a negative peak detector. Its output controls the trigger sensitivity (prevention to false triggering at noisy input signals) and the gain of the MPX high-pass filter. The output of the interference detector, when receiving a steep pulse, fires a monoflop, contained in the pulse former circuitry. The time constant of the monoflop is defined by an internal capacitor and its output activates the blanking gates in the audio. Output of this filter is fed to the soft mute control circuitry, the output is voltage to current converted and then fed to phase detector, pilot detector and pilot canceller circuits, contained in the stereo decoder PLL block. For regeneration of the 38 kHz subcarrier, a PLL is used. The fully integrated oscillator is adjusted by means of a digital auxiliary PLL into the capture range of the main PLL. The auxiliary PLL needs an external reference frequency (75.4 kHz) which is provided by the TEA6840H. The required 19 and 38 kHz signals are generated by division of the oscillator output signal in a logical circuitry. The 19 kHz quadrature phase signal is fed to the 19 kHz phase detector, where it is compared with the incoming pilot tone. The DC output signal of the phase detector controls the oscillator (PLL). 7.3 AM noise blanker The AM noise blanking pulse is derived from the AM audio signal which is fed into pin 53 with the help of a peak-to-average comparator. The blanking time is set by a pulse former with external capacitor. The blanking pulse is fed to the gate in the AM audio path and out to pin AMHOLD to operate the gate built into the external AM stereo processor. The pilot presence detector is driven by an internally generated in-phase 19 kHz signal. Its pilot dependent DC output voltage is fed to a threshold switch, which activates the pilot indicator bit and turns the stereo decoder to stereo operation. The same DC voltage is used to control the amplitude of an anti-phase internally generated 19 kHz signal. In the pilot canceller, the pilot tone is compensated by this anti-phase 19 kHz signal. 7.4 The pilot cancelled signal is fed to the matrix. There, the side signal is demodulated and combined with the main signal to left and right audio channel. Compensation for roll-off in the incoming MPX signal caused by IF filters and FM demodulator is typically realized by an external compensation network at pin 57, individual alignment is achieved by I2C-bus controlled amplification of the side signal (DAA). A smooth mono to stereo takeover is achieved by controlling the efficiency of the matrix with help of the SNC peak detector. 2000 May 08 FM noise blanker Multipath/fading detection and weak signal control For FM signal quality dependent controls there is built-in a combination of six detectors driven by the level information direct, by the AC components on the level via a 20 kHz band-pass filter (AM wideband) or the high notes present at the FM demodulator output via a 60 kHz high-pass filter (ultrasonic noise). The relation between DC level and the AC components is programmable by the I2C-bus (2 bits each). Output of level buffer, AM wideband detector and ultrasonic noise detector are analog-to-digital converted and readable by the I2C-bus. 10 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H 7.5 For the time of fast RDS updating soft mute, SNC and HCC can be put on hold and the AM wideband peak detector and the ultrasonic noise peak detector are put on reset by a switch signal delivered from the TEA6840H via pin 51 (FMHOLD). The tone/volume control part consists of the following functions: • Source selector • Loudness The six separate detecting circuits are: • Volume 1 1. The AM wideband noise peak detector is driven from a 20 kHz band-pass filter connected to the level buffer output. The time constant is defined by an external capacitor at pin 45 (TWBAM2). The output voltage of the detector is analog-to-digital converted by 3-bit. • Treble • Bass • Volume 2 • Rear Seat Audio (RSA) selector 2. The AM wideband noise average detector is driven from a 20 kHz band-pass filter connected to the level buffer output. The time constant is defined by an external capacitor at pin 63 (TWBAM1). The output of the detector is connected to the Stereo Noise Control (SNC) circuit. • Chime adder • Analog step interpolation • Audio blend control. The stages loudness, volume 1, bass, and volume 2 include the Analog Step Interpolation (ASI) function. This minimizes pops by smoothing out the transitions in the audio signal during switching. The transition time is I2C-bus programmable in a range of 1 : 24 in four steps. 3. The ultrasonic noise peak detector is driven from a 60 kHz high-pass filter connected to the MPX signal from pin 55 (MPXRDS). The time constant is defined by an external capacitor at pin 46 (TUSN2). The output voltage of the detector is analog-to-digital converted by 3-bit. The stages loudness, volume 1, and volume 2 also have the Audio Blend Control (ABC) function. This minimizes pops by automatically incrementing the volume and loudness controls through each step between their present settings and the new settings. The speed of the ABC function is correlated with the transition time of the ASI function. 4. The ultrasonic noise average detector is driven from a 60 kHz high-pass filter connected to the MPX signal from pin 55 (MPXRDS). The time constant is defined by an external capacitor at pin 64 (TUSN1). The output of the detector is connected to soft mute control and stereo noise control circuits. All stages are controlled via the I2C-bus. 5. For soft mute and high cut control purposes an average detector with externally defined time constant (TMUTE, pin 54) is provided. The detector is driven by level output only. Soft mute as well as high cut control can be switched off by the I2C-bus. 6. The stereo noise control peak detector with externally defined time constant (TSNC, pin 56) is driven by DC level output, AM wideband and ultrasonic noise outputs. It provides the stereo blend facility (SNC). Starting point and slope of stereo blend can be chosen by the I2C-bus controlled reference voltage. 2000 May 08 Tone/volume control 11 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) 7.5.1 TEA6880H 7.5.5 SOURCE SELECTOR The source selector allows the selection between 6 sources: The bass control is the next stage. The characteristic of the bass curves depends upon the external circuits at pins LBO/LBI (left channel) and RBO/RBI (right channel) and also upon the setting of BSYM bit (MSB of the bass control byte). With BSYM = 1, an equalizer characteristic and with BSYM = 0, a shelving characteristic is obtained. Figures 17 and 18 show the bass curves with an external circuit of 2 × 220 nF and R = 3.3 kΩ for each channel with different values for BSYM. Figure 19 shows the bass curves with an external capacitor of 47 nF for each channel and BSYM = 0, for boost and cut. • 2 external stereo inputs (ALI, ARI, BLI and BRI) • 1 external symmetrical stereo input (CLIP, CRIP and CCOM) • 1 external symmetrical mono input (MONOP and MONON) • 1 internal stereo input (AM/FM) • 1 chime/diagnostic mono input (CHIME). Via the chime/diagnostic mono input a chime input signal can be sent to any audio output, at any volume level. 7.5.2 7.5.6 7.5.7 VOLUME 1 7.5.8 CHIME ADDER With the chime adder circuit the chime input signal can be summed with the left front and/or right front audio, or be turned off. TREBLE The output signal of the volume 1 control is fed into the treble control stage. The control range is between +14 and −14 dB in steps of 2 dB. Fig.20 shows the control characteristic with external capacitors of 10 nF. 2000 May 08 RSA SELECTOR The RSA selector provides the possibility to select an alternative source for the rear channels. In this event rear channels are only controlled by volume 2 function. The volume 1 control follows behind the loudness circuit. The control range of volume 1 is between +20 and −36 dB in steps of 1 dB. 7.5.4 VOLUME 2 The four volume 2 blocks are located at the end of the tone/volume control. In addition to volume control (same settings as volume 2) also the balance and fader functions are performed by individual attenuation offsets for the four attenuators. The control range of these attenuators is 56 dB in steps of 1 dB and additional the steps −58.5 dB, −62 dB, −68 dB, and a mute step. LOUDNESS The output of the source selector is fed into the loudness circuit via the external capacitors CKVL (pins LOPO and LOPI) and CKVR (pins ROPO and ROPI). Depending on the external circuits for the left and the right channel only a bass boost or bass and treble boost is available. With the external circuits shown in Figs 13 and 15 the curves from Figs 14 and 16 will be obtained (without influence of CKVL respectively CKVR). 7.5.3 BASS 12 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H 8 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER CONDITIONS MIN. −0.3 VCC supply voltage Vi voltage at pins (except pins 4 and 5) VCC ≤ 10 V MAX. UNIT +10 V VSS − 0.3 VCC V voltage at pins 4 and 5 VSS − 0.3 9.7 V Ptot total power dissipation − 480 mW Tstg storage temperature −65 +150 °C Tamb operating ambient temperature −40 +85 °C Ves electrostatic handling for all pins note 1 −200 +200 V note 2 −2000 +2000 V Notes 1. Machine model (R = 0 Ω, C = 200 pF). 2. Human body model (R = 1.5 kΩ, C = 100 pF). 9 THERMAL CHARACTERISTICS SYMBOL Rth(j-a) 2000 May 08 PARAMETER CONDITIONS thermal resistance from junction to ambient in free air 13 VALUE UNIT 48 K/W PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VCC supply voltage 7.8 8.5 9.2 V ICC supply current VCC = 8.5 V 32 40 48 mA VHS half supply voltage VCC = 8.5 V 3.75 4.25 4.75 V Iref reference current VCC = 8.5 V; Rext = 100 kΩ 35 37 39 µA − 1.89 − V FM signal path 14 Vi(MPX)(p-p) MPX input signal (peak-to-peak value) Ri = 182 kΩ ∆Vi(MPX) overdrive margin of MPX input signal THD = 1% Ii AF input current Ii(max) maximum AF input current THD = 1% 6 − − dB − 3.66 − µA 7.32 − − µA Vo(rms) AF mono output signal (RMS value) 91% modulation without pilot 890 1000 1110 mV ∆Vout AF mono channel balance without pilot; V13/V27 −1 − +1 dB αcs channel separation aligned setting of data byte 1, bit 0 to bit 3; m = 30% modulation plus 9% pilot L = 1; R = 0 40 47 70 dB L = 0; R = 1 40 47 70 dB − 0.1 0.3 % L = 1; R = 0 − 0.1 0.3 % L = 0; R = 1 − 0.1 0.3 % THD total harmonic distortion Vi(MPX)(p-p) = 1.89 V; fmod = 1 kHz without pilot Philips Semiconductors SYMBOL Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 10 CHARACTERISTICS FM part: input signal Vi(MPX)(p-p) = 1.89 V; m = 100% (∆f = ±75 kHz, fmod = 400 Hz); de-emphasis of 75 µs and series resistor at input RIN = 182 kΩ; FM audio measurements are taken at pins 13 and 27. Tone part: RS = 600 Ω; RL = 10 kΩ, AC-coupled; CL = 2.5 nF; CLK = square-wave (5 to 0 V) at 100 kHz; stereo source = A channel input; volume 1 attenuator = 0 dB; loudness = 0 dB, off; volume 2 attenuators = 0 dB; bass linear; treble linear; input voltage = 1 V, f = 1 kHz. Tone part audio measurements are taken at pins 33 and 37. VCC = 8.3 to 8.7 V; VSS = 0; Tamb = 25 °C; unless otherwise specified. This IC shall not radiate noise in the audio system such that it disturbs any other circuit. This IC shall also not be susceptible to the radiation of any other circuit. Vi(MPX)(p-p) = 1.89 V; fmod = 5 kHz f = 20 Hz to 15 kHz 75 78 − dB α19 pilot signal suppression f = 19 kHz 40 50 − dB α38 subcarrier suppression f = 38 kHz 35 50 − dB α57 f = 57 kHz 40 − − dB α76 f = 76 kHz 50 60 − dB Product specification signal-to-noise ratio TEA6880H S/N CONDITIONS MIN. TYP. MAX. UNIT IM2 second order intermodulation for fspur = 1 kHz fmod = 10 kHz; note 1 − 60 − dB IM3 third order intermodulation for fspur = 1 kHz fmod = 13 kHz; note 1 − 58 − dB α57(RDS) traffic radio (RDS) f = 57 kHz; note 2 − 70 − dB α67 Subsidiary Communication Authorization (SCA) f = 67 kHz; note 3 70 − − dB α114 Adjacent Channel Interference (ACI) α190 PSRR power supply ripple rejection RS59; RS60 de-emphasis output source resistance f = 114 kHz; note 4 − 80 − dB f = 190 kHz; note 4 − 70 − dB f = 100 Hz; Vripple(rms) = 100 mV − 30 − dB data byte 3, bit 5 = 1; 75 µs 20 22.7 25.4 kΩ data byte 3, bit 5 = 0; 50 µs 13.4 15.2 17 kΩ V61,62 = 5.5 ±1 V 50 − 200 µA oscillator frequency − 228 − kHz frequency range of free running oscillator 190 − 270 kHz fref reference frequency − 75.4 − kHz Vi(fref) reference frequency input voltage 30 100 500 mV Zi(48) input impedance 100 − − kΩ stereo on; STIN = 1 − 27 37 mV stereo off; STIN = 0 9 22 − mV I61; I62 current capacity of FM buffer PLL VCO fosc Philips Semiconductors PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL 15 PLL pilot detector Vi(pilot)(rms) pilot threshold voltage for automatic switching by pilot input voltage (RMS value) hys(pilot) hysteresis of pilot threshold voltage − 2 − dB V49-10 switching voltage for external mono control (pin 49) 0.3 − 0.7 V AM signal path AMON = 1 and AMST = 0; Ri = 220 kΩ; ViAM(mono) = 250 mV 195 245 295 mV Gv AM stereo audio buffer voltage gain subaddress 0H: AMON = 1 and AMST = 1; input signal at pin 59 or 60; coupled with 220 nF; Vi(59,60) = 200 mV; fi = 1 kHz; note 5 7 8 9 dB Ri(59,60) input resistance for AM stereo left and right AMON = 1 and AMST = 1; note 6 80 100 120 kΩ Product specification AC output voltage at pins 13 and 27 TEA6880H VLOPO; VROPO CONDITIONS MIN. TYP. MAX. UNIT Noise blanker FM PART 20 30 40 µs − 20 50 nA charge current (into 4 V) −16 −12.5 −9.5 µA discharge current (from 5.5 V) 45 70 100 µA tsup interference suppression time Ioffset gate input offset current at pins during suppression pulse duration Ich(FMNCAP) Idch(FMNCAP) during AF suppression time Trigger Threshold Control (TTC), dependency on MPX signal at MPXRDS input V58-10 trigger threshold variation voltage Vi(MPXRDS) = 0 V 4.5 5 5.5 V ∆V58-10 trigger threshold voltage Vi(MPXRDS) = 10 mV; f = 120 kHz 15 40 60 mV ∆V7-10 trigger threshold variation with audio frequency f = 15 kHz Vi(MPXRDS) = 100 mV; f = 120 kHz 75 100 200 mV Vi(MPXRDS) = 670 mV − 500 − mV Philips Semiconductors PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL Trigger Threshold Control (TTC), dependency on level detector input signal 16 V58-10 trigger threshold voltage VLEVEL(AC) = 0 V 4.5 5 5.5 V ∆V58-10 trigger threshold voltage as a function of VLEVEL(AC) VLEVEL(AC) = 10 mV; f = 120 kHz − 0 − mV VLEVEL(AC) = 200 mV; f = 120 kHz − 40 − mV NBS1 = 1; NBS0 = 1 − 60 − mV NBS1 = 1; NBS0 = 0 − 100 − mV NBS1 = 0; NBS0 = 1 − 150 − mV NBS1 = 0; NBS0 = 0 − 200 − mV NBS1 = 1; NBS0 = 1 − 250 − mV NBS1 = 1; NBS0 = 0 − 275 − mV NBS1 = 0; NBS0 = 1 − 300 − mV NBS1 = 0; NBS0 = 0 − 320 − mV Trigger sensitivity measurement with pulse (on MPX signal) at MPXRDS input Vpulse trigger sensitivity tpulse = 10 µs; write mode; data byte 3, bits 6 and 7: Trigger sensitivity measurement with pulse (on level signal) at AM/FM level input Vpulse trigger sensitivity TEA6880H Product specification tpulse = 10 µs; V3-10 = 0.5 V; write mode; data byte 3, bits 6 and 7: CONDITIONS MIN. TYP. MAX. UNIT AM PART mmod trigger threshold − 140 − % th hold time (suppression time) 400 500 600 µs VAMPCAP(AC) AF voltage at pin 43 ViAM(mono) = 50 mV (RMS); f = 1 kHz 16 22 30 mV αAMGATE attenuation of blanking gate ViAM(mono) = 50 mV (RMS); gate open: internal voltage; gate closed: VDC42-10 = 4 V; note 7 −60 −70 −80 dB tsup(AMHOLD) suppression time at pin 42 tpulse = 10 µs; repetition rate = 50 Hz; Vpulse = 1.7 V (pin 53); V3-10 = 0.5 V 400 500 600 µs V(25-10)DC detector voltage; Vext(53-10)DC − 0.7 V V53(AC) = 0 V; V(3-10)DC = 3.5 V 3.3 3.8 4.3 V f42 trigger sensitivity tpulse = 10 µs; repetition rate = 50 Hz; Vpulse = 1.7 V (pin 53); V3-10 = 4 V 45 50 55 Hz Ioffset gate input offset current at pins during suppression pulse duration during AF suppression time −50 0 +50 nA Muting average detector (pin 54); see Fig.12 17 Vi(LEVEL) input voltage on pin LEVEL 0.5 − 4 V Gv voltage gain pin 3 to pin 54 − 0 − dB ∆VTMUTE offset between pins 3 and 54 − 1.5 − V ∆VTMUTE/K temperature dependence at pin 54 − 3.3 − mV/K Philips Semiconductors PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL MUTING AVERAGE DETECTOR TIME CONSTANT Ich(TMUTE) TMUTE charge current − 0.2 − µA Idch(TMUTE) TMUTE discharge current − −0.2 − µA VO DC output voltage 2 − 5 V TEST CONDITION Ich(test) capacitor charge current data byte 6, bit 7 = 1 − 12 − µA Idch(test) capacitor discharge current data byte 6, bit 7 = 1 − −12 − µA Product specification TEA6880H CONDITIONS MIN. TYP. MAX. UNIT AM wideband average detector (pin 63); see Fig.6 VTWBAM1 VCTWBAM1 VO DC voltage at TWBAM1 w.r.t pin 10 DC voltage coefficient VLEVEL(AC) = 400 mV; VLEVEL(DC) = 3.5 V; fi = 24 kHz; write mode; data byte 1, bits 4 and 5: AWS1 = 1; AWS0 = 1 − 4.10 − V AWS1 = 1; AWS0 = 0 − 3.60 − V AWS1 = 0; AWS0 = 1 − 3.00 − V AWS1 = 0; AWS0 = 0 − 2.35 − V AWS1 = 1; AWS0 = 1 0.69 0.82 0.98 AWS1 = 1; AWS0 = 0 0.60 0.72 0.86 AWS1 = 0; AWS0 = 1 0.50 0.60 0.71 AWS1 = 0; AWS0 = 0 0.40 0.47 0.56 1.5 − 5.5 V VLEVEL(AC) = 400 mV; VLEVEL(DC) = 3.5 V; fi = 24 kHz; write mode; note 8; data byte 1, bits 4 and 5: DC output voltage Philips Semiconductors PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL AM WIDEBAND AVERAGE DETECTOR TIME CONSTANT 18 Ich(TWBAM1) TWBAM1 charge current 11.5 15 19.5 µA Idch(TWBAM1) TWBAM1 discharge current −19.5 −15 −11.5 µA USS1 = 1; USS0 = 1 − 4.25 − V USS1 = 1; USS0 = 0 − 4.00 − V USS1 = 0; USS0 = 1 − 3.50 − V USS1 = 0; USS0 = 0 − 2.60 − V USS1 = 1; USS0 = 1 0.71 0.85 1.00 USS1 = 1; USS0 = 0 0.67 0.80 0.95 USS1 = 0; USS0 = 1 0.60 0.70 0.85 USS1 = 0; USS0 = 0 0.44 0.52 0.62 1.5 − 5.5 Ultrasonic noise average detector (pin 64); see Fig.5 VTUSN1 VCTUSN1 DC voltage coefficient VMPXRDS(AC) = 350 mV; VLEVEL(DC) = 3.5 V; fi = 80 kHz; write mode; note 9; data byte 1, bits 6 and 7: V Product specification DC output voltage VMPXRDS(AC) = 350 mV; VLEVEL(DC) = 3.5 V; fi = 80 kHz; write mode; data byte 1, bits 6 and 7: TEA6880H VO DC voltage at TUSN1 w.r.t. pin 10 CONDITIONS MIN. TYP. MAX. UNIT ULTRASONIC NOISE AVERAGE DETECTOR TIME CONSTANT Ich(TUSN1) TUSN1 charge current 11.5 15 19.5 µA Idch(TUSN1) TUSN1 discharge current −19.5 −15 −11.5 µA 0.5 − 4.75 V − 0 − dB V(3-10)DC = 0.5 V 1.75 2.00 2.25 V V(3-10)DC = 3.5 V 4.50 5.00 5.50 V − 3.3 − mV/K USS1 = 1; USS0 = 1 − 4.25 − V USS1 = 1; USS0 = 0 − 4.00 − V USS1 = 0; USS0 = 1 − 3.50 − V USS1 = 0; USS0 = 0 − 2.60 − V USS1 = 1; USS0 = 1 0.71 0.85 1.00 USS1 = 1; USS0 = 0 0.67 0.80 0.95 USS1 = 0; USS0 = 1 0.60 0.70 0.85 USS1 = 0; USS0 = 0 0.44 0.52 0.62 2 − 5 Peak detector for stereo noise control (SNC, pin 56) DEPENDENCY ON LEVEL VOLTAGE; see Fig.12 VLEVEL input voltage G gain pin 3 to pin 56 VTSNC DC voltage at TSNC referred to DC level voltage at pin 3 ∆VTSNC/K without MPXRDS and LEVEL (AC) input temperature dependence at pin 56 DEPENDENCY ON ULTRASONIC NOISE; see Fig.5 VTSNC DC voltage at TSNC w.r.t. pin 10 19 VCTSNC VO DC voltage coefficient DC output voltage VMPXRDS(AC) = 350 mV; V(3-10)DC = 3.5 V; fi = 80 kHz; write mode; data byte 1, bits 6 and 7: Philips Semiconductors PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL VMPXRDS(AC) = 350 mV; V(3-10)DC = 3.5 V; fi = 80 kHz; write mode; note 10; data byte 1, bits 6 and 7: V Product specification TEA6880H CONDITIONS MIN. TYP. MAX. UNIT DEPENDENCY ON AM WIDEBAND NOISE; see Fig.6 VTSNC VCTSNC VO DC voltage at TSNC DC voltage coefficient VLEVEL(AC) = 400 mV; VLEVEL(DC) = 3.5 V; fi = 24 kHz; write mode; data byte 1, bits 4 and 5: AWS1 = 1; AWS0 = 1 − 4.10 − V AWS1 = 1; AWS0 = 0 − 3.60 − V AWS1 = 0; AWS0 = 1 − 3.00 − V AWS1 = 0; AWS0 = 0 − 2.35 − V AWS1 = 1; AWS0 = 1 0.69 0.82 0.98 AWS1 = 1; AWS0 = 0 0.60 0.72 0.86 AWS1 = 0; AWS0 = 1 0.50 0.60 0.71 AWS1 = 0; AWS0 = 0 0.40 0.47 0.56 1.5 − 5.5 V VLEVEL(AC) = 400 mV; VLEVEL(DC) = 3.5 V; fi = 24 kHz; write mode; note 11; data byte 1, bits 4 and 5: DC output voltage Philips Semiconductors PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL DETECTOR TIME CONSTANT 20 Ich(TSNC) TSNC charge current − −2.3 − µA Idch(TSNC) TSNC discharge current − 65 − µA TEST CONDITION Ich(test) charge current for testing data byte 6, bit 7 = 1; V(3-10)DC = 2 V; V(56-10)DC = 2.8 V − −1.5 − mA Idch(test) discharge current for testing data byte 6, bit 7 = 1; V(3-10)DC = 2 V; V(56-10)DC = 4.2 V − 200 − µA Product specification TEA6880H CONDITIONS MIN. TYP. MAX. UNIT Ultrasonic noise peak detector (pin 46); see Fig.5 VTUSN2 VCTUSN2 VO DC voltage at TUSN2 w.r.t. pin 10 DC voltage coefficient VMPXRDS(AC) = 350 mV; V(3-10)DC = 3.5 V; fi = 80 kHz; write mode; data byte 1, bits 6 and 7: USS1 = 1; USS0 = 1 − 4.25 − V USS1 = 1; USS0 = 0 − 4.00 − V USS1 = 0; USS0 = 1 − 3.50 − V USS1 = 0; USS0 = 0 − 2.60 − V USS1 = 1; USS0 = 1 0.71 0.85 1.00 USS1 = 1; USS0 = 0 0.67 0.80 0.95 USS1 = 0; USS0 = 1 0.60 0.70 0.85 USS1 = 0; USS0 = 0 0.44 0.52 0.62 1.5 − 5.5 V VMPXRDS(AC) = 350 mV; V(3-10)DC = 3.5 V; fi = 80 kHz; write mode; note 12; data byte 1, bits 6 and 7: DC output voltage Philips Semiconductors PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL 21 DETECTOR TIME CONSTANT Ich(TUSN2) TUSN2 charge current − −1.6 − µA Idch(TUSN2) TUSN2 discharge current − 21 − µA AWS1 = 1; AWS0 = 1 − 4.10 − V AWS1 = 1; AWS0 = 0 − 3.60 − V AWS1 = 0; AWS0 = 1 − 3.00 − V AWS1 = 0; AWS0 = 0 − 2.35 − V AWS1 = 1; AWS0 = 1 0.69 0.82 0.98 AWS1 = 1; AWS0 = 0 0.60 0.72 0.86 AWS1 = 0; AWS0 = 1 0.50 0.60 0.71 AWS1 = 0; AWS0 = 0 0.40 0.47 0.56 2 − 5 AM wideband peak detector (pin 45); see Fig.6 VTWBAM2 VCTWBAM2 DC voltage coefficient VLEVEL(AC) = 400 mV; VLEVEL(DC) = 3.5 V; fi = 24 kHz; write mode; note 13; data byte 1, bits 4 and 5: V Product specification DC output voltage VLEVEL(AC) = 400 mV; VLEVEL(DC) = 3.5 V; fi = 24 kHz; write mode; data byte 1, bits 4 and 5: TEA6880H VO DC voltage at TWBAM2 w.r.t pin 10 CONDITIONS MIN. TYP. MAX. UNIT DETECTOR TIME CONSTANT Ich(TWBAM2) TWBAM2 charge current − −1.6 − µA Idch(TWBAM2) TWBAM2 discharge current − 21 − µA −0.5 0 +0.5 dB MST1 = 0; MST0 = 0; VTMUTE = 0.42VTUSN1 without AC 3 6 9 dB MST1 = 0; MST0 = 1; VTMUTE = 0.45VTUSN1 without AC 3 6 9 dB MST1 = 1; MST0 = 0; VTMUTE = 0.47VTUSN1 without AC 3 6 9 dB MST1 = 1; MST0 = 1; VTMUTE = 0.49VTUSN1 without AC 3 6 9 dB MSL1 = 0; MSL0 = 0; VTMUTE(DC) = 0.35VTUSN1 without AC 7 10 13 dB MSL1 = 0; MSL0 = 1; VTMUTE(DC) = 0.38VTUSN1 without AC 7 10 13 dB MSL1 = 1; MSL0 = 0; VTMUTE(DC) = 0.39VTUSN1 without AC 7 10 13 dB MSL1 = 1; MSL0 = 1; VTMUTE(DC) = 0.395VTUSN1 without AC 7 10 13 dB Soft mute; see Figs 7 and 4 α0dB attenuation at pins 13 and 27 VTMUTE = 3.5 V; VTUSN1 = 3.5 V α6dB start of muting; AC attenuation at pins 13 and 27 see Fig.4; write mode; data byte 0, bits 0 and 1; MSL0 = 1; MSL1 = 1 22 α10dB AC attenuation for setting of mute slope at pins 13 and 27 Philips Semiconductors PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL MST1 = 0; MST0 = 0; see Fig.7 Product specification TEA6880H CONDITIONS MIN. TYP. MAX. UNIT Stereo Noise Control (SNC) αcs(start) αcs(slope) start of channel separation slope of channel separation 23 aligned at L = 1 and R = 0; data byte 2: SST[3:0] = 1111; VTSNC or VTUSN1 or VTWBAM1 = 0.63VTUSN1 without AC; see note 14 and Fig.9 4.5 6 7.5 dB aligned at L = 1 and R = 0; data byte 2: SST[3:0] = 1000; VTSNC or VTUSN1 or VTWBAM1 = 0.70VTUSN1 without AC; see note 14 and Fig.9 4.5 6 7.5 dB aligned at L = 1 and R = 0; data byte 2: SST[3:0] = 0000; VTSNC or VTUSN1 or VTWBAM1 = 0.74VTUSN1 without AC; see note 14 and Fig.9 4.5 6 7.5 dB SSL1 = 0; SSL0 = 0 3 5 7 dB SSL1 = 0; SSL0 = 1 5 7 9 dB SSL1 = 1; SSL0 = 0 11 13 15 dB aligned at L = 1 and R = 0; data byte 2: SST[3:0] = 1000; VTSNC = 0.72VTUSN1 without AC; see note 15 and Fig.8; data byte 2, bits 4 and 5: Philips Semiconductors PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL SSL1 = 1; SSL0 = 1 (not defined) Product specification TEA6880H CONDITIONS MIN. TYP. MAX. UNIT High Cut Control (HCC) αHCC(start) αHCC(slope) AC attenuation for start of HCC AC attenuation for slope of HCC 24 αHCC(max) maximum HCC attenuation AF = 10 kHz; VMPXIN = 200 mV; HSL1 = 1; HSL0 = 0; data byte 0 SMUT = 0 and MONO = 1; write mode; see note 16 and Fig.10; data byte 3, bits 2 and 3: HST1 = 1; HST0 = 1; V(3-10)DC = 1.30 V 1.5 3 4.5 dB HST1 = 1; HST0 = 0; V(3-10)DC = 1.45 V 1.5 3 4.5 dB HST1 = 0; HST0 = 1; V(3-10)DC = 1.90 V 1.5 3 4.5 dB HST1 = 0; HST0 = 0; V(3-10)DC = 2.10 V 1.5 3 4.5 dB HSL1 = 1; HSL0 = 1 5.5 7.5 9.5 dB HSL1 = 1; HSL0 = 0 4 6 8 dB HSL1 = 0; HSL0 = 1 2 4 6 dB HSL1 = 0; HSL0 = 0 1 3 5 dB AF = 10 kHz; VMPXIN = 200 mV; C61-10, C62-10 = 2.7 nF; HST1 = 1; HST0 = 1; data byte 0 SMUT = 0 and MONO = 1; write mode; see note 16 and Fig.11; data byte 3, bits 0 and 1: Philips Semiconductors PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL AF = 10 kHz; VTMUTE = 2 V; data byte 0, SMUT = 0 and MONO = 1; data byte 3, bit 1 = bit 0 = 1 C61-10, C62-10 = 2.7 nF; data byte 3 bit 4 = 1 8 10 14.5 dB C61 -10, C62-10 = 680 pF; data byte 3 bit 4 = 0 8 10 14.5 dB Product specification TEA6880H CONDITIONS MIN. TYP. MAX. UNIT 840 mV Analog-to-digital converters LEVEL ANALOG-TO-DIGITAL CONVERTER (6-BIT) VLEVEL(min) lower limit of conversion range 600 720 VLEVEL(max) upper limit of conversion range 3.2 3.4 3.6 V ∆VLEVEL bit resolution − 44 − mV ULTRASONIC NOISE ANALOG-TO-DIGITAL CONVERTER (3-BIT) VTUSN(min) lower limit of conversion range 1.9 2.1 2.4 V VTUSN(max) upper limit of conversion range 3.8 4.1 4.5 V ∆VTUSN bit resolution 280 330 380 mV 1.9 2.1 2.4 V AM WIDEBAND NOISE ANALOG-TO-DIGITAL CONVERTER (3-BIT) VTWBAM(min) lower limit of conversion range VTWBAM(max) upper limit of conversion range 3.8 4.1 4.5 V ∆VTWBAM bit resolution 280 330 380 mV Philips Semiconductors PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL Tone/volume control 25 Gv(max) maximum voltage gain RS ≤ 10 Ω; RL ≥ 10 MΩ 19 20 21 dB Gv(signal) signal voltage gain Tamb = 25 °C −0.75 0 +0.75 dB Tamb = −40 to +85 °C −1 0 +1 dB THD ≤ 0.5% − 2000 − mV THD = 1%; Gv = 3 dB 2300 − − mV RL = 2 kΩ; CL = 10 nF; THD = 1% 2000 − − mV 50 Vo(rms) output voltage level Vi(rms) input sensitivity Vo = 500 mV; Gv = 20 dB − − mV fro roll-off frequency high frequency (−1 dB) 20000 − − Hz low frequency (−1 dB) − 35 45 Hz low frequency (−3 dB) − 20 25 Hz low frequency (−1 dB) − 18 23 Hz low frequency (−3 dB) − 10 13 Hz 74 80 − dB input A; CKIL = CKIR = 100 nF; CKVL = CKVR = 220 nF channel separation Vi = 1 V; frequency range 250 Hz to 20 kHz Product specification αcs TEA6880H input C; CKICL = CKICR = 1 µF; CKVL = CKVR = 220 nF total harmonic distortion 26 chime adder total harmonic distortion PSRR TYP. MAX. UNIT valid for input channel A, B or C; same for all 4 outputs refer to inputs Vi(rms) = 1 V; f = 1 kHz; volume 1 attenuator: −6 dB; equalizer bands flat − 0.05 0.1 % Vi(rms) = 2 V; f = 1 kHz; VCC = 8.3 V; volume 1 attenuator: −13 dB; equalizer bands flat − 0.1 0.3 % Vi(rms) = 2 V; f = 1 kHz; VCC = 8.5 V; volume 1 attenuator: 0 dB; equalizer bands flat − 0.05 0.1 % Vi(rms) = 1 V; f = 1 kHz; VCC = 8.3 V; volume 1 attenuator: 0 dB; equalizer bands flat − 0.01 0.1 % Vi(rms) = 2.3 V; f = 1 kHz; VCC = 9 V; volume 1 attenuator: −13 dB; equalizer bands flat − 0.13 0.3 % Vi(rms) = 1 V; f = 20 Hz to 20 kHz; volume 1 attenuator: −6 dB; equalizer bands flat − 0.05 0.2 % Vi(rms) = 2 V; f = 20 Hz to 20 kHz; VCC = 8.3 V; volume 1 attenuator: −13 dB; equalizer bands flat − 0.1 0.3 % Vi(rms) = 2.3 V; f = 20 Hz to 20 kHz; VCC = 9 V; volume 1 attenuator: −13 dB; equalizer bands flat − 0.1 0.3 % Vi(rms) = 0.5 V; f = 25 Hz; volume 1 attenuator: 0 dB; equalizer bass boost: +8 dB − 0.1 0.2 % Vi(rms) = 0.5 V; f = 4 kHz; volume 1 attenuator: 0 dB; equalizer treble boost: +8 dB − 0.15 0.3 % Vi(rms) = 0.5 V; f = 1 kHz; VCC = 8.5 V; no input signal at input A − 0.04 0.1 % f = 20 to 100 Hz 35 46 − dB f = 1 to 20 kHz 50 65 − dB f = 1 kHz stereo source: A, B, C or mono; VCC = 8.5 V + 0.2 V (RMS) 50 75 − dB SCAP = 22 µF; VHS = 47 µF − 250 − ms SCAP = 10 µF; VHS = 10 µF − 100 − ms Product specification turn-on time from VCC applied to 66% final DC voltage at outputs MIN. TEA6880H tturn-on power supply ripple rejection C23 = 47 µF; C17 = 22 µF CONDITIONS Philips Semiconductors THD PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL CMRR noise voltage CCIR-ARM weighted (RMS value) without input signal and shorted AF inputs input common mode rejection CONDITIONS MIN. TYP. MAX. UNIT 27 volume 1 attenuator: +20 dB − 65 100 µV volume 1 attenuator: +20 dB; symmetrical input − 100 140 µV volume 1 attenuator: 0 dB − 10 14 µV volume 1 attenuator: 0 dB; symmetrical input − 12.5 18 µV volume 1 attenuator: 0 dB; bass and treble boost: 6 dB − 16 25 µV volume 1 attenuator: 0 dB; bass and treble boost: 6 dB; symmetrical input − 22 32 µV volume 1 attenuator: −9 dB − 9 14 µV minimum volume; volume 1 attenuator: −18 dB; loudness: −20 dB; volume 2 attenuator: −22 dB − 5 8 µV mute selected: data byte 8, AMUT = 1 − 3.5 5 µV volume setting: −20 dB; volume 1 attenuator: −10 dB; loudness: −10 dB; A-weighted − 5.7 8 µV C channel input; Vi(rms) = 1 V; f = 20 Hz to 20 kHz on 48 CLIP, CRIP and CCOM 53 − dB C channel input; Vi(rms) = 1 V; f = 1 kHz on CLIP, CRIP and CCOM 48 53 − dB C channel input; Vi(rms) = 1 V; f = 20 Hz to 20 kHz on 63 CLIP, CRIP and CCOM; volume attenuator: −15 dB 68 − dB source = mono input 40 45 − dB crosstalk between bus inputs and signal outputs clock frequency = 50 kHz; repetition burst rate = 300 Hz; total initialization; note 17 − 110 − dB tABC Audio Blend Control (ABC) step time CASICAP = 22 nF; write mode; data byte 4, bits 6 and 7: ASI1 = 0; ASI0 = 0 − 0.83 − ms ASI1 = 0; ASI0 = 1 − 3.33 − ms ASI1 = 1; ASI0 = 0 − 8.33 − ms ASI1 = 1; ASI0 = 1 − 20 − ms Product specification mono input common mode rejection TEA6880H CMRRmono αct Philips Semiconductors Vnoise(rms) PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL CONDITIONS MIN. TYP. MAX. UNIT Source selector Zi(stereo) stereo input impedance (A and B input) 80 100 120 kΩ Zi(sym) symmetrical input impedance (C and mono input) 24 30 36 kΩ Zi(CHIME) CHIME input impedance (chime input) 80 100 120 kΩ Zo output impedance at ROPO and LOPO − 80 100 Ω RL output load resistance at ROPO and LOPO 10 − − kΩ CL output load capacitance at ROPO and LOPO 0 − 2500 pF Gv source selector voltage gain αS input isolation of one selected source to any other input Vi(rms) maximum input voltage (RMS value) −0.2 0 +0.2 dB f = 1 kHz 90 105 − dB f = 12.5 kHz 80 95 − dB f = 20 Hz to 20 kHz 75 90 − dB THD < 0.5%; VCC = 8.5 V 2.0 2.15 − V THD < 0.5%; VCC = 7.8 V 1.8 1.9 − V 80 100 120 kΩ Philips Semiconductors PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL Loudness control 28 Zi input impedance at ROPI and LOPI Gloudness loudness control, maximum gain f = 1 kHz; loudness on/off −0.2 0 +0.2 dB loudness control, minimum gain f = 1 kHz; loudness on/off −18.5 −20 −21.5 dB ∆Gloudness gain, loudness on referred to loudness off f = 1 kHz; Gloudness = −20 dB −1.5 0 +1.5 dB Gstep step resolution gain f = 1 kHz − 1 − dB step error between any adjoining step f = 1 kHz − − 0.5 dB 17 18.5 19 dB 4 5 6 dB f = 30 Hz −1 − 0 dB f = 10 kHz LBmax maximum loudness boost; without influence of compared to 1 kHz; loudness on coupling capacitors f = 30 Hz f = 10 kHz compared to 1 kHz; loudness off 0 dB 14 15.5 dB fref = 30 Hz; fmeas = 300 Hz; bass and treble boost 12 13.5 15 dB Product specification − 12.5 TEA6880H −1 fref = 30 Hz; fmeas = 300 Hz; bass boost only CONDITIONS MIN. TYP. MAX. UNIT Volume 1 control Gv voltage gain −36 − +20 dB Gstep step resolution gain − 1 − dB step error between any adjoining step − − 0.5 dB ∆Ga attenuator gain set error Gv = +20 to −36 dB −1 0 +1 dB ∆Gtrack gain tracking error Gv = +20 to −36 dB − 0 1 dB treble gain control, maximum boost f = 10 kHz; Vi(rms) = 200 mV 13 14 15 dB maximum attenuation f = 10 kHz 13 14 15 dB step resolution gain f = 10 kHz − 2 − dB step error between any adjoining step f = 10 kHz − − 0.5 dB bass gain control, maximum boost external T-filter; f = 60 Hz; BSYB = 1; Vi(rms) = 200 mV 16 18 20 dB maximum attenuation external T-filter; f = 60 Hz; BSYC = 0 16 18 20 dB external T-filter; f = 60 Hz; BSYC = 1 13 14.4 15.5 dB Treble control Gtreble Gstep Bass control Gbass 29 Gstep step resolution gain f = 60 Hz; boost; BSYB = 1 − 2 − dB f = 60 Hz; cut; BSYC = 0 − 2 − dB f = 60 Hz; cut; BSYC = 1 1.2 1.6 1.9 dB step error between any adjoining step f = 60 Hz − − 0.5 dB fc centre frequency Cbass = 2 × 220 nF; Rbass = 3.3 kΩ 50 60 70 Hz Qe equalizer quality factor Vi(rms) = 200 mV; boost = 12 dB 0.8 0.9 1.1 EQbow equalizer bowing Vi(rms) = 200 mV; bass and treble boost = 12 dB; reference flat frequency response − 2.1 3.3 dB −68 − 0 dB Philips Semiconductors PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL Volume 2 control Gv Gv = 0 to −56 dB − 1 − dB Gv = 0 to −56 dB − − 0.5 dB − −58.5 − dB − −62 − dB − −68 − dB additional steps Product specification step resolution step error between any adjoining step TEA6880H Gstep voltage gain αmute mute attenuation ∆Ga attenuator gain set error CONDITIONS MIN. 100 TYP. 110 MAX. UNIT − dB f = 20 Hz to 20 kHz 75 85 − dB Gv = 0 to −32 dB −1 − +1 dB Gv = −32 to −68 dB −2 − +2 dB Gv = 0 to −56 dB ∆Gtrack gain tracking error − 0 1 dB Zo output impedance − 80 120 Ω RL output load resistance 2 − − kΩ Co(L) output load capacitance 0 − 10 nF Ro(L) DC load resistance at output to ground 4.7 − − kΩ Chime adder Vi(rms) = 1 V; chime input; chime adder on −21 −20 −19 dB Vi(CHIME)(rms) maximum chime input voltage (sine wave) main output voltage Vo(rms) < 1.5 V; chime input; chime adder on 2.0 − − V k k × Vi(CHIME)(p-p) < 5.7 V − Vo(p-p) 0.22 0.25 0.28 Gv(CHIME) chime adder voltage gain factor for Vi(CHIME) to avoid internal clipping Philips Semiconductors PARAMETER Up-level Car radio Analog Signal Processor (CASP) 2000 May 08 SYMBOL Digital part (SDA, SDAQ, SCL, SDA, SCLQ, FMHOLD, AFSAMPLE); note 18 30 VIH HIGH-level input voltage 3 5 9.7 V VIL LOW-level input voltage −0.3 +0.3 +1.5 V −10 − +10 µA −10 − +10 µA − − 0.4 V IIH HIGH-level input current IIL LOW-level input current VOL LOW-level output voltage SDA VCC = 0 to 9.5 V IL = 3 mA Digital part (SDAQ and SCLQ); note 18 Io(sink) output sink current − − 600 µA Rpu pull-up resistance − − 22 kΩ CL load capacitance − − 20 pF Digital part (ADR); note 18 3 − VCC V LOW-level input voltage −0.3 − +1.5 V IIH HIGH-level input current − − 150 µA IIL LOW-level input current −80 − − µA Product specification HIGH-level input voltage TEA6880H VIH VIL Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H Notes to the characteristics 1. Intermodulation suppression; Beat Frequency Components (BFC): V o(signal) ( at 1 kHz ) IM2 = ----------------------------------------------------- ; f s = ( 2 × 10 kHz ) – 19 kHz V o(spurious) ( at 1 kHz ) V o(signal) ( at 1 kHz ) IM3 = ----------------------------------------------------- ; f s = ( 3 × 13 kHz ) – 38 kHz V o(spurious) ( at 1 kHz ) measured with 91% mono signal; fmod = 10 kHz or 13 kHz; 9% pilot signal. 2. RDS suppression: V o(signal) ( at 1 kHz ) α 57(RDS) = -------------------------------------------------------------------------V o(spurious) ( at 1 kHz ± 23 Hz ) measured with 91% stereo signal; fmod = 1 kHz; 9% pilot signal; 5% RDS subcarrier (fs = 57 kHz; fmod = 23 Hz; AM m = 0.6). 3. Subsidiary Communication Authorization (SCA): V o(signal) ( at 1 kHz ) α 67 = ----------------------------------------------------- ; f s = ( 2 × 38 kHz ) – 67 kHz V o(spurious) ( at 9 kHz ) measured with 81% mono signal; fmod = 1 kHz; 9% pilot signal; 10% SCA subcarrier (fs = 67 kHz, unmodulated). 4. Adjacent Channel Interference (ACI): V o(signal) ( at 1 kHz ) α 114 = ----------------------------------------------------- ; f s = 110 kHz – ( 3 × 38 kHz ) V o(spurious) ( at 4 kHz ) V o(signal) ( at 1 kHz ) α 190 = ----------------------------------------------------- ; f s = 186 kHz – ( 5 × 38 kHz ) V o(spurious) ( at 4 kHz ) measured with 90% mono signal; fmod = 1 kHz; 9% pilot signal; 1% spurious signal (fs = 110 kHz or 186 kHz, unmodulated). 5. AM stereo audio buffer gain: V 13 V 27 G = 20 log --------- ; G = 20 log --------V 59 V 60 6. Input resistance for AM stereo left and right: ∆V 59,60 R i(59,60) = -------------------∆I i(59,60) 7. Attenuation of blanking gate: V AMPCAP at gate open α AMGATE = 20 log ----------------------------------------------------------V AMPCAP at gate close 8. TWBAM1 DC voltage coefficient: V TWBAM1 with AC voltage at pin 3 VC TWBAM1 = --------------------------------------------------------------------------------------V TWBAM1 without AC voltage 9. TUSN1 DC voltage coefficient: V TUSN1 with AC voltage at pin 55 VC TUSN1 = -------------------------------------------------------------------------------------V TUSN1 without AC voltage 10. TSNC DC voltage coefficient: V TSNC with AC voltage at pin 55 VC TSNC = -----------------------------------------------------------------------------------V TSNC without AC voltage 2000 May 08 31 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H 11. TSNC DC voltage coefficient: V TSNC with AC voltage at pin 3 VC TSNC = -------------------------------------------------------------------------------V TSNC without AC voltage 12. TUSN2 DC voltage coefficient: V TUSN2 with AC voltage at pin 55 VC TUSN2 = -------------------------------------------------------------------------------------V TUSN2 without AC voltage 13. TWBAM2 DC voltage coefficient: V TWBAM2 with AC voltage at pin 3 VC TWBAM2 = --------------------------------------------------------------------------------------V TWBAM2 without AC voltage 14. Start of channel separation: V LOPO(AC) α cs(start) = 20log -------------------------V ROPO(AC) 15. Slope of channel separation: V LOPO(AC) α cs(slope) = 20log -------------------------V ROPO(AC) 16. AC attenuation for start and slope of HCC: V 13,27 α HCC(10 kHz) = 20log -------------------------------------------------------------------------------V 13, 27 without High Cut active 17. Crosstalk between bus inputs and signal outputs: V bus(p-p) α ct = 20log --------------------V o(rms) 18. The characteristics are in accordance with the I2C-bus specification. This specification, “The I2C-bus and how to use it”, can be ordered using the code 9398 393 40011. 2000 May 08 32 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H 11 I2C-BUS PROTOCOL Table 1 S(1) Write mode CHIP ADDRESS (write) Table 2 S(1) A(2) SUBADDRESS A(2) DATA BYTE(S) A(2) P(3) A(2) DATA BYTE 1 A(2) DATA BYTE 2 A(2) P(3) Read mode CHIP ADDRESS (read) Notes 1. S = START condition. 2. A = acknowledge. 3. P = STOP condition. Table 3 Chip address byte CHIP ADDRESS 0 0 1 1 0 Notes 1. Defined by address pin ADR. 2. 0: receiver and 1: transmitter. 2000 May 08 READ/WRITE 33 0 0/1(1) R/W(2) Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) 11.1 TEA6880H Read mode: 1st data byte Table 4 Format of 1st data byte 7 6 5 4 3 2 1 0 STIN RDSU LVL5 LVL4 LVL3 LVL2 LVL1 LVL0 Table 5 Description of 1st data byte bits BIT SYMBOL DESCRIPTION 7 STIN Stereo indicator. This bit indicates if a pilot signal has been detected. If STIN = 0, then no pilot signal detected. If STIN = 1, then a pilot signal has been detected. 6 RDSU Measure mode. This bit selects the measure mode for the RDS flags. If RDSU = 0, then continuous mode selected. If RDSU = 1, then RDS update mode selected. 5 to 0 LVL[5:0] Table 6 ADC voltage level. These 6 bits determine the ADC voltage level, see Table 6. Level setting ADC VLEVEL (V) LVL5 LVL4 LVL3 LVL2 LVL1 LVL0 3.600 1 1 1 1 1 1 3.553 1 1 1 1 1 0 3.506 1 1 1 1 0 1 3.460 1 1 1 1 0 0 3.413 1 1 1 0 1 1 3.366 1 1 1 0 1 0 3.319 1 1 1 0 0 1 3.272 1 1 1 0 0 0 3.225 1 1 0 1 1 1 3.179 1 1 0 1 1 0 3.132 1 1 0 1 0 1 3.085 1 1 0 1 0 0 3.038 1 1 0 0 1 1 2.991 1 1 0 0 1 0 2.944 1 1 0 0 0 1 2.898 1 1 0 0 0 0 2.851 1 0 1 1 1 1 2.804 1 0 1 1 1 0 2.757 1 0 1 1 0 1 2.710 1 0 1 1 0 0 2.663 1 0 1 0 1 1 2.617 1 0 1 0 1 0 2.570 1 0 1 0 0 1 2.523 1 0 1 0 0 0 2.476 1 0 0 1 1 1 2.429 1 0 0 1 1 0 2.383 1 0 0 1 0 1 2000 May 08 34 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H VLEVEL (V) LVL5 LVL4 LVL3 LVL2 LVL1 LVL0 2.336 1 0 0 1 0 0 2.289 1 0 0 0 1 1 2.242 1 0 0 0 1 0 2.195 1 0 0 0 0 1 2.148 1 0 0 0 0 0 2.102 0 1 1 1 1 1 2.055 0 1 1 1 1 0 2.008 0 1 1 1 0 1 1.961 0 1 1 1 0 0 1.914 0 1 1 0 1 1 1.867 0 1 1 0 1 0 1.821 0 1 1 0 0 1 1.774 0 1 1 0 0 0 1.727 0 1 0 1 1 1 1.680 0 1 0 1 1 0 1.633 0 1 0 1 0 1 1.587 0 1 0 1 0 0 1.540 0 1 0 0 1 1 1.493 0 1 0 0 1 0 1.446 0 1 0 0 0 1 1.399 0 1 0 0 0 0 1.352 0 0 1 1 1 1 1.306 0 0 1 1 1 0 1.259 0 0 1 1 0 1 1.212 0 0 1 1 0 0 1.165 0 0 1 0 1 1 1.118 0 0 1 0 1 0 1.071 0 0 1 0 0 1 1.025 0 0 1 0 0 0 0.978 0 0 0 1 1 1 0.931 0 0 0 1 1 0 0.884 0 0 0 1 0 1 0.837 0 0 0 1 0 0 0.790 0 0 0 0 1 1 0.744 0 0 0 0 1 0 0.697 0 0 0 0 0 1 0.650 0 0 0 0 0 0 2000 May 08 35 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) 11.2 TEA6880H Read mode: 2nd data byte Table 7 Format of 2nd data byte 7 6 5 4 3 2 1 0 − USN2 USN1 USN0 − WBA2 WBA1 WBA0 Table 8 Description of 2nd data byte BIT SYMBOL 7 − 6 USN2 5 USN1 4 USN0 3 − 2 WBA2 1 WBA1 0 WBA0 Table 9 DESCRIPTION This bit is not used and must be set to logic 1. Ultrasonic noise ADC. These 3 bits select the voltage level for the ultrasonic noise ADC, see Table 9. This bit is not used and must be set to logic 1. AM wideband noise ADC. These 3 bits select the voltage level for the AM wideband ADC, see Table 10. Ultrasonic noise ADC VTUSN2 (V) USN2 USN1 USN0 4.500 1 1 1 4.157 1 1 0 3.814 1 0 1 3.471 1 0 0 3.129 0 1 1 2.786 0 1 0 2.443 0 0 1 2.100 0 0 0 VTWBAM2 (V) WBA2 WBA1 WBA0 4.500 1 1 1 4.157 1 1 0 3.814 1 0 1 3.471 1 0 0 3.129 0 1 1 2.786 0 1 0 2.443 0 0 1 2.100 0 0 0 Table 10 AM wideband noise ADC 2000 May 08 36 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) 11.3 TEA6880H Subaddress byte for write Table 11 Format for subaddress byte 7 6 5 4 3 2 1 0 AIOF BOUT − − SAD3 SAD2 SAD1 SAD0 Table 12 Description of subaddress byte BIT SYMBOL DESCRIPTION 7 AIOF Auto-increment control. This bit controls the auto-increment function. If AIOF = 0, then the auto-increment is on. If AIOF = 1, then auto-increment is off. 6 BOUT I2C-bus output control. This bit enables/disables the I2C-bus output SDAQ and SCLQ to the TEA6840H. If BOUT = 0, then the I2C-bus output is disabled. If BOUT = 1, then the I2C-bus output is enabled. 5 − 4 − 3 SAD3 2 SAD2 1 SAD1 0 SAD0 These 2 bits are not used; both must be set to logic 0. Data byte select. These 4 bits select which data byte is to be addressed; see Table 13. Table 13 Selection of data byte ADDRESSED DATA BYTE MNEMONIC SAD3 SAD2 SAD1 SAD0 Alignment 0 ALGN0 0 0 0 0 Alignment 1 ALGN1 0 0 0 1 Alignment 2 ALGN2 0 0 1 0 Alignment 3 ALGN3 0 0 1 1 ASI time source selector SSEL 0 1 0 0 Bass control BASS 0 1 0 1 Treble control TRBL 0 1 1 0 Loudness control LOUD 0 1 1 1 Volume 1 VOLU1 1 0 0 0 Volume 2, left front VOL2_LF 1 0 0 1 Volume 2, right front VOL2_RF 1 0 1 0 Volume 2, left rear VOL2_LR 1 0 1 1 Volume 2, right rear VOL2_RR 1 1 0 0 Not used(1) − 1 1 0 1 Not used(1) − 1 1 1 0 Not used(1) − 1 1 1 1 Note 1. Not tested; function not guaranteed. 2000 May 08 37 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) 11.4 TEA6880H Write mode: subaddress 0H Table 14 Format of data byte Alignment 0 (ALGN0) 7 6 5 4 3 2 1 0 AMON AMST SEAR SMUT MMUT MONO MST1 MST0 Table 15 Description of ALGN0 bits BIT SYMBOL DESCRIPTION 7 AMON 6 AMST 5 SEAR Search mode selection. If SEAR = 0, then mute and SNC detectors normal. If SEAR = 1, then mute and SNC detectors fast. 4 SMUT Soft mute enable. If SMUT = 0, then soft mute off. If SMUT = 1, then soft mute enabled. 3 MMUT Muting of MPX output. If MMUT = 0, then MPX output not muted. If MMUT = 1, then MPX output muted. 2 MONO Stereo decoder mode selection. If MONO = 0, then Stereo mode selected. If MONO = 1, then Mono mode selected. 1 MST1 Start of muting. These 2 bits determine the value of VTMUTE; see Table 17 and Fig.4. 0 MST0 AM/FM mode selection. These 2 bits select the AM/FM mode and source; see Table 16. Table 16 Setting of AM/FM mode SELECTED MODE AMON AMST AM stereo mode, note 1 1 1 AM mode, active input AMHIN 1 0 Not allowed 0 1 FM mode, active input MPXIN 0 0 Note 1. MPX input (MPXIN) and AM input (AMHIN) muted, stereo decoder in mono mode and de-emphasis terminals (DEEML and DEEMR) are audio signal inputs. Table 17 Setting of start of muting (αMUTE = 6 dB) 2000 May 08 VTMUTE (V) MST1 MST0 2.45 1 1 2.30 1 0 2.15 0 1 2.00 0 0 38 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H MHB413 0 handbook, full pagewidth αMUTE (dB) (1) (2) (3) (4) 10 20 1.0 1.5 2.0 2.5 3.0 VTMUTE (V) VTUSN1 (V) Data byte ALGN2: MSL0 = 1, MSL1 = 1 Data byte ALGN0 CURVE MST1 MST0 (1) 0 0 (2) 0 1 (3) 1 0 (4) 1 1 Fig.4 Soft mute attenuation versus VTMUTE and VTUSN1 input voltage (fixed slope). 2000 May 08 39 3.5 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) 11.5 TEA6880H Write mode: subaddress 1H Table 18 Format of data byte Alignment 1 (ALGN1) 7 6 5 4 3 2 1 0 USS1 USS0 AWS1 AWS0 CHS3 CHS2 CHS1 CHS0 Table 19 Description of ALGN1 bits BIT SYMBOL 7 USS1 6 USS0 5 AWS1 4 AWS0 3 CHS3 2 CHS2 1 CHS1 0 CHS0 DESCRIPTION Ultrasonic noise sensitivity. These 2 bits determine the ultrasonic noise sensitivity levels, see Table 20 and Fig.5. AM wideband sensitivity. These 2 bits determine the AM wideband sensitivity levels, see Table 21 and Fig.6. Channel separation alignment. These 4 bits select the channel separation alignment, see Table 22. Table 20 Setting of ultrasonic noise sensitivity (VMPXRDS(AC) = 350 mV) SLOPE (V/V) USS1 USS0 −2.1 1 1 −2.9 1 0 −4.4 0 1 −6.8 0 0 2000 May 08 40 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H MHB411 6 handbook, full pagewidth V TUSN2 VTUSN1 VTSNC (V) 5 (1) 4 (2) (3) 3 (4) 2 1 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 VMPXRDS (80kHz) (V) Data byte ALGN1 CURVE USS1 USS0 (1) 1 1 (2) 1 0 (3) 0 1 (4) 0 0 Fig.5 Ultrasonic noise peak and average detector output voltage versus MPX signal input and stereo noise control peak detector output voltage versus MPX signal input. 2000 May 08 41 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H Table 21 Setting of AM wideband sensitivity (VLEVEL(AC) = 400 mV) SLOPE (V/V) AWS1 AWS0 −2.2 1 1 −3.3 1 0 −4.9 0 1 −6.5 0 0 MHB410 6 full pagewidth Vhandbook, TWBAM2 VTWBAM1 VTSNC (V) 5 (1) 4 (2) (3) 3 (4) 2 1 0 0 200 400 600 800 1000 VLEVELAC(24kHz)p-p (mV) Data byte ALGN1 CURVE AWS1 AWS0 (1) 1 1 (2) 1 0 (3) 0 1 (4) 0 0 Fig.6 AM wideband peak and average detector output voltage versus level AC signal input and stereo noise control peak detector output voltage versus level AC signal input. 2000 May 08 42 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H Table 22 Setting of channel separation alignment CHANNEL SEPARATION ALIGNMENT CHS3 CHS2 CHS1 CHS0 Not used(1) 1 1 1 1 Not used(1) 1 1 1 0 Not used(1) 1 1 0 1 Not used(1) 1 1 0 0 Not used(1) 1 0 1 1 Not used(1) 1 0 1 0 Setting 9, minimum gain of side signal 1 0 0 1 Setting 8 1 0 0 0 Setting 7 0 1 1 1 Setting 6 0 1 1 0 Setting 5 0 1 0 1 Setting 4 0 1 0 0 Setting 3 0 0 1 1 Setting 2 0 0 1 0 Setting 1 0 0 0 1 Setting 0, maximum gain of side signal 0 0 0 0 Note 1. Not tested; function not guaranteed. 11.6 Write mode: subaddress 2H Table 23 Format of data byte Alignment 2 (ALGN2) 7 6 5 4 3 2 1 0 MSL1 MSL0 SSL1 SSL0 SST3 SST2 SST1 SST0 Table 24 Description of ALGN2 bits BIT SYMBOL 7 MSL1 6 MSL0 5 SSL1 4 SSL0 3 SST3 2 SST2 1 SST1 0 SST0 2000 May 08 DESCRIPTION Soft mute slope alignment. These 2 bits determine the value of VTMUTE(DC); see Table 25 and Fig.7. Stereo noise control slope alignment. These 2 bits determine the value of αcs; see Table 26 and Fig.8. Stereo noise control start alignment. These 4 bits determine the stereo noise control start alignment; see Table 27 and Fig.9. 43 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H Table 25 Setting of soft mute slope alignment VTMUTE(DC) MSL1 MSL0 0.395VTUSN1 without AC 1 1 0.390VTUSN1 without AC 1 0 0.380VTUSN1 without AC 0 1 0.350VTUSN1 without AC 0 0 MHB412 0 handbook, full pagewidth αMUTE (dB) 10 (1) (2) (3) 20 (4) 30 40 1.0 1.5 2.0 2.5 3.0 VTUSN1 (V) VTMUTE (V) Data byte ALGN0: MST0 = 0, MST1 = 0 Data byte ALGN2 CURVE MSL1 MSL0 (1) 0 0 (2) 0 1 (3) 1 0 (4) 1 1 Fig.7 Soft mute attenuation versus input voltages VTUSN1 and VTMUTE (fixed start). 2000 May 08 44 3.5 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H Table 26 Setting of stereo noise control slope alignment (VTSNC = 0.72VTUSN1 without AC) αcs (dB) SSL1 SSL0 Not defined 1 1 13 1 0 7 0 1 5 0 0 MHB414 50 handbook, full pagewidth αcs (dB) 40 30 20 (1) (2) (3) 10 0 2.5 3.0 3.5 4.0 VTSNC (V) Data byte ALGN2: SST = 1000 Data byte ALGN2 CURVE SSL0 SSL1 (1) 0 1 (2) 1 0 (3) 0 0 Fig.8 Channel separation versus voltage at pins 56, 63 and 64 (fixed start). 2000 May 08 45 4.5 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H Table 27 Setting of stereo noise control start alignment (αcs = 6 dB) START ALIGNMENT SST3 SST2 SST1 SST0 VTSNC = 0.63VTUSN1 without AC 1 1 1 1 VTSNC 1 1 1 0 VTSNC 1 1 0 1 VTSNC 1 1 0 0 VTSNC 1 0 1 1 VTSNC 1 0 1 0 VTSNC 1 0 0 1 VTSNC = 0.70VTUSN1 without AC 1 0 0 0 VTSNC 0 1 1 1 VTSNC 0 1 1 0 VTSNC 0 1 0 1 VTSNC 0 1 0 0 VTSNC 0 0 1 1 VTSNC 0 0 1 0 VTSNC 0 0 0 1 VTSNC = 0.74VTUSN1 without AC 0 0 0 0 2000 May 08 46 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H MHB415 50 handbook, full pagewidth αcs (dB) 40 30 (1) (2) (3) 20 10 0 2.5 3.0 3.5 4.0 VTSNC (V) Data byte ALGN2: SSL1 = 0, SSL0 = 1 Data byte ALGN2 CURVE SST3 SST2 SST1 SST0 (1) 0 0 0 0 (2) 1 0 0 0 (3) 1 1 1 1 Fig.9 Channel separation versus voltage at pins 56, 63 and 64 (fixed slope). 2000 May 08 47 4.5 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) 11.7 TEA6880H Write mode: subaddress 3H Table 28 Format of data byte Alignment 3 (ALGN3) 7 6 5 4 3 2 1 0 NBS1 NBS0 DE75 HCCS HST1 HST0 HSL1 HSL0 Table 29 Description of ALGN3 bits BIT SYMBOL DESCRIPTION 7 NBS1 6 NBS0 5 DE75 De-emphasis. If DE75 = 1, then de-emphasis is 75 µs. If DE75 = 1, then de-emphasis is 50 µs. 4 HCCS HCC control switch. With static roll-off: HCCS = 1, C61 = C62 = 2.7 nF. Without static roll-off: HCCS = 0, C61 = C62 = 680 pF. 3 HST1 2 HST0 HCC start alignment. These 2 bits determine the alignment for the start of high cut control; see Table 31 and Fig.10. 1 HSL1 0 HSL0 Noise blanker sensitivity. These 2 bits determine the noise blanker sensitivity levels; see Table 30. HCC slope alignment. These 2 bits determine the alignment for the slope of high cut control; see Table 32 and Fig.11. Table 30 Setting of noise blanker sensitivity Vpulse(p)(MPX) (mV) Vpulse(p)(level) (mV) NBS1 NBS0 12 110 1 1 24 120 1 0 60 150 0 1 120 200 0 0 Table 31 Setting of alignment for start of high cut control (α10kHz = 3 dB) V(3-10)DC (V) HST1 HST0 1.30 1 1 1.45 1 0 1.90 0 1 2.10 0 0 2000 May 08 48 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H MHB417 0 handbook, full pagewidth α10kHz (dB) −2 −4 (1) (2) (3) (4) −6 −8 −10 −12 2 1 3 Data byte ALGN3: HSL1 = 1, HSL0 = 0 Data byte ALGN3 CURVE HST1 HST0 (1) 1 1 (2) 1 0 (3) 0 1 (4) 0 0 Fig.10 High cut control versus VTMUTE (fixed slope). 2000 May 08 49 VTMUTE (V) 4 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H Table 32 Setting of alignment for slope of high cut control (VTMUTE = 2.4 V) α10kHz (dB) HSL1 HSL0 7.5 1 1 6.0 1 0 4.0 0 1 3.0 0 0 MHB416 0 handbook, full pagewidth α10kHz (dB) −2 −4 −6 −8 (1) (2) (3) (4) −10 −12 2 1 3 Data byte ALGN3: HST1 = 1, HST0 = 1 Data byte ALGN3 CURVE HSL1 HSL0 (1) 0 0 (2) 0 1 (3) 1 0 (4) 1 1 Fig.11 High cut control versus VTMUTE (fixed start). 2000 May 08 50 VTMUTE (V) 4 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) 11.8 TEA6880H Write mode: subaddress 4H Table 33 Format of data byte Source Selector (SSEL) 7 6 5 4 3 2 1 0 ASI1 ASI0 RSA2 RSA1 RSA0 MSS2 MSS1 MSS0 Table 34 Description of SSEL bits BIT SYMBOL DESCRIPTION 7 ASI1 6 ASI0 ASI/ABC speed selection. These 2 bits select the ASI/ABC speed (time per step), see Table 35. 5 RSA2 4 RSA1 3 RSA0 2 MSS2 1 MSS1 0 MSS0 Rear seat audio selector. These 3 bits select the source for the rear outputs, see Table 36. Main source selector. These 3 bits select the source for the main control part, see Table 37. Table 35 ASI/ABC speed selection (C35 = 15 nF) ASI/ABC SPEED (ms) ASI1 ASI0 20 1 1 8.33 1 0 3.33 0 1 0.83 0 0 Table 36 Selected source for rear outputs SELECTED SOURCE RSA2 RSA1 RSA0 channel(1) 1 1 1 Internal, main channel(1) 1 1 0 channel(1) 1 0 1 Internal, main channel 1 0 0 AM/FM (internal) 0 1 1 Input A (stereo) 0 1 0 Input B (stereo) 0 0 1 Input C (stereo, symmetrical) 0 0 0 Internal, main Internal, main Note 1. Not tested; function not guaranteed. 2000 May 08 51 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H Table 37 Selected source for main control part SELECTED SOURCE MSS2 MSS1 MSS0 Chime input(1) 1 1 1 input(1) 1 1 0 Chime input 1 0 1 Input D (mono, symmetrical) 1 0 0 AM/FM (internal) 0 1 1 Input A (stereo) 0 1 0 Input B (stereo) 0 0 1 Input C (stereo, symmetrical) 0 0 0 Chime Note 1. Not tested; function not guaranteed. 11.9 Write mode: subaddress 5H Table 38 Format of data byte Bass control (BASS) 7 6 5 4 3 2 1 0 BSYC − BSYB BAS4 BAS3 BAS2 BAS1 BAS0 Table 39 Description of BASS bits BIT SYMBOL 7 BSYC DESCRIPTION Bass filter mode for cut. If BSYC = 0, then shelving characteristic selected. If BSYC = 1, then band-pass filter characteristic selected. 6 − 5 BSYB Bass filter mode for boost. If BSYB = 0, then shelving characteristic selected. If BSYB = 1, then band-pass filter characteristic selected. 4 BAS4 Bass control. These 5 bits determine the bass control level, see Table 40. 3 BAS3 2 BAS2 1 BAS1 0 BAS0 2000 May 08 This bit is not used and must be set to logic 0. 52 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H Table 40 Setting of bass control level BASS CONTROL (dB) BAS4 BAS3 BAS2 BAS1 BAS0 +18(1) 1 1 1 1 1 +18(1) 1 1 1 1 0 +18(1) 1 1 1 0 1 +18(1) 1 1 1 0 0 +18(1) 1 1 0 1 1 +18 1 1 0 1 0 +16 1 1 0 0 1 +14 1 1 0 0 0 +12 1 0 1 1 1 +10 1 0 1 1 0 +8 1 0 1 0 1 +6 1 0 1 0 0 +4 1 0 0 1 1 +2 1 0 0 1 0 +0 1 0 0 0 1 −0 1 0 0 0 0 −2 (−1.8) 0 1 1 1 1 −4 (−3.6) 0 1 1 1 0 −6 (−5.4) 0 1 1 0 1 −8 (−7.1) 0 1 1 0 0 −10 (−8.7) 0 1 0 1 1 −12 (−10.3) 0 1 0 1 0 −14 (−11.7) 0 1 0 0 1 −16 (−13.1) 0 1 0 0 0 −18 (−14.4) 0 0 1 1 1 −18 (−14.4)(1) 0 0 1 1 0 −18 (−14.4)(1) 0 0 1 0 1 −18 (−14.4)(1) 0 0 1 0 0 −18 (−14.4)(1) 0 0 0 1 1 −18 (−14.4)(1) 0 0 0 1 0 −18 (−14.4)(1) 0 0 0 0 1 −18 (−14.4)(1) 0 0 0 0 0 Note 1. Not tested; function not guaranteed. 2000 May 08 53 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H 11.10 Write mode: subaddress 6H Table 41 Format of data byte Treble control (TRBL) 7 6 5 4 3 2 1 0 HSTM − − − TRE3 TRE2 TRE1 TRE0 Table 42 Description of TRBL bits BIT SYMBOL 7 HSTM 6 − 5 − 4 − 3 TRE3 2 TRE2 1 TRE1 0 TRE0 DESCRIPTION Test mode muting average and SNC peak detector. If HSTM = 0, then normal operation. If HSTM = 1, then increased detector currents. These 3 bits are not used; each must be set to logic 0. Treble control. These 4 bits determine the treble control level, see Table 43. Table 43 Setting of treble control level TREBLE CONTROL (dB) TRE3 TRE2 TRE1 TRE0 +14 1 1 1 1 +12 1 1 1 0 +10 1 1 0 1 +8 1 1 0 0 +6 1 0 1 1 +4 1 0 1 0 +2 1 0 0 1 +0 1 0 0 0 −0 0 1 1 1 −2 0 1 1 0 −4 0 1 0 1 −6 0 1 0 0 −8 0 0 1 1 −10 0 0 1 0 −12 0 0 0 1 −14 0 0 0 0 2000 May 08 54 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H 11.11 Write mode: subaddress 7H Table 44 Format of data byte Loudness control (LOUD) 7 6 5 4 3 2 1 0 LOFF − − LSN4 LSN3 LSN2 LSN1 LSN0 Table 45 Description of LOUD bits BIT SYMBOL 7 LOFF 6 − 5 − 4 LSN4 3 LSN3 2 LSN2 1 LSN1 0 LSN0 DESCRIPTION Loudness switch control. If LOFF = 0, then the loudness switch is on. If LOFF = 1, then loudness switch is off. These 2 bits are not used, each must be set to logic 0. Loudness control. These 5 bits determine the attenuation of the loudness block, see Table 46. Table 46 Attenuation of loudness block ATTENUATION (dB) LSN4 LSN3 LSN2 LSN1 LSN0 0 1 1 1 1 1 −1 1 1 1 1 0 −2 1 1 1 0 1 −3 1 1 1 0 0 −4 1 1 0 1 1 −5 1 1 0 1 0 −6 1 1 0 0 1 −7 1 1 0 0 0 −8 1 0 1 1 1 −9 1 0 1 1 0 −10 1 0 1 0 1 −11 1 0 1 0 0 −12 1 0 0 1 1 −13 1 0 0 1 0 −14 1 0 0 0 1 −15 1 0 0 0 0 −16 0 1 1 1 1 −17 0 1 1 1 0 −18 0 1 1 0 1 −19 0 1 1 0 0 −20 0 1 0 1 1 −20(1) 0 1 0 1 0 −20(1) 0 1 0 0 1 2000 May 08 55 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H ATTENUATION (dB) LSN4 LSN3 LSN2 LSN1 LSN0 −20(1) 0 1 0 0 0 −20(1) 0 0 1 1 1 −20(1) 0 0 1 1 0 −20(1) 0 0 1 0 1 −20(1) 0 0 1 0 0 −20(1) 0 0 0 1 1 −20(1) 0 0 0 1 0 −20(1) 0 0 0 0 1 −20(1) 0 0 0 0 0 Note 1. Not tested; function not guaranteed. 2000 May 08 56 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H 11.12 Write mode: subaddress 8H Table 47 Format of data byte Volume 1 control (VOLU1) 7 6 5 4 3 2 1 0 AMUT − VOL5 VOL4 VOL3 VOL2 VOL1 VOL0 Table 48 Description of VOLU1 bits BIT SYMBOL DESCRIPTION 7 AMUT Audio mute switch. If AMUT = 0, then there is no audio mute. If AMUT = 1, then audio mute on. 6 − 5 to 0 VOL[5:0] This bit is not used and must be set to logic 0. Volume 1 control. These 6 bits determine the attenuation of volume 1 block; see Table 49. Table 49 Attenuation of volume 1 block ATTENUATION (dB) VOL5 VOL4 VOL3 VOL2 VOL1 VOL0 +20(1) 1 1 1 1 1 1 +20(1) 1 1 1 1 1 0 +20(1) 1 1 1 1 0 1 +20 1 1 1 1 0 0 +19 1 1 1 0 1 1 +18 1 1 1 0 1 0 +17 1 1 1 0 0 1 +16 1 1 1 0 0 0 +15 1 1 0 1 1 1 +14 1 1 0 1 1 0 +13 1 1 0 1 0 1 +12 1 1 0 1 0 0 +11 1 1 0 0 1 1 +10 1 1 0 0 1 0 +9 1 1 0 0 0 1 +8 1 1 0 0 0 0 +7 1 0 1 1 1 1 +6 1 0 1 1 1 0 +5 1 0 1 1 0 1 +4 1 0 1 1 0 0 +3 1 0 1 0 1 1 +2 1 0 1 0 1 0 +1 1 0 1 0 0 1 2000 May 08 0 1 0 1 0 0 0 −1 1 0 0 1 1 1 −2 1 0 0 1 1 0 −3 1 0 0 1 0 1 57 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H ATTENUATION (dB) VOL5 VOL4 VOL3 VOL2 VOL1 VOL0 −4 1 0 0 1 0 0 −5 1 0 0 0 1 1 −6 1 0 0 0 1 0 −7 1 0 0 0 0 1 −8 1 0 0 0 0 0 −9 0 1 1 1 1 1 −10 0 1 1 1 1 0 −11 0 1 1 1 0 1 −12 0 1 1 1 0 0 −13 0 1 1 0 1 1 −14 0 1 1 0 1 0 −15 0 1 1 0 0 1 −16 0 1 1 0 0 0 −17 0 1 0 1 1 1 −18 0 1 0 1 1 0 −19 0 1 0 1 0 1 −20 0 1 0 1 0 0 −21 0 1 0 0 1 1 −22 0 1 0 0 1 0 −23 0 1 0 0 0 1 −24 0 1 0 0 0 0 −25 0 0 1 1 1 1 −26 0 0 1 1 1 0 −27 0 0 1 1 0 1 −28 0 0 1 1 0 0 −29 0 0 1 0 1 1 −30 0 0 1 0 1 0 −31 0 0 1 0 0 1 −32 0 0 1 0 0 0 −33 0 0 0 1 1 1 −34 0 0 0 1 1 0 −35 0 0 0 1 0 1 −36 0 0 0 1 0 0 −36(1) 0 0 0 0 1 1 −36(1) 0 0 0 0 1 0 −36(1) 0 0 0 0 0 1 −36(1) 0 0 0 0 0 0 Note 1. Not tested; function not guaranteed. 2000 May 08 58 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H 11.13 Write mode: subaddress 9H Table 50 Format of data byte Volume 2, left front (VOL2_LF) 7 6 5 4 3 2 1 0 CHML − VLF5 VLF4 VLF3 VLF2 VLF1 VLF0 Table 51 Description of VOL2_LF bits BIT SYMBOL 7 CHML 6 − 5 to 0 VLF[5:0] DESCRIPTION Chime adder left front select. If CHML = 1, then chime on. If CHML = 0, then chime off. This bit is not used and must be set to logic 0. Left front volume 2, balance and fader control. These 6 bits determine the attenuation of volume 2 left front; see Table 52. Table 52 Attenuation of volume 2 left front ATTENUATION (dB) VLF5 VLF4 VLF3 VLF2 VLF1 VLF0 0 1 1 1 1 1 1 −1 1 1 1 1 1 0 −2 1 1 1 1 0 1 −3 1 1 1 1 0 0 −4 1 1 1 0 1 1 −5 1 1 1 0 1 0 −6 1 1 1 0 0 1 −7 1 1 1 0 0 0 −8 1 1 0 1 1 1 −9 1 1 0 1 1 0 −10 1 1 0 1 0 1 −11 1 1 0 1 0 0 −12 1 1 0 0 1 1 −13 1 1 0 0 1 0 −14 1 1 0 0 0 1 −15 1 1 0 0 0 0 −16 1 0 1 1 1 1 −17 1 0 1 1 1 0 −18 1 0 1 1 0 1 −19 1 0 1 1 0 0 −20 1 0 1 0 1 1 −21 1 0 1 0 1 0 −22 1 0 1 0 0 1 −23 1 0 1 0 0 0 −24 1 0 0 1 1 1 −25 1 0 0 1 1 0 −26 1 0 0 1 0 1 2000 May 08 59 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H ATTENUATION (dB) VLF5 VLF4 VLF3 VLF2 VLF1 VLF0 −27 1 0 0 1 0 0 −28 1 0 0 0 1 1 −29 1 0 0 0 1 0 −30 1 0 0 0 0 1 −31 1 0 0 0 0 0 −32 0 1 1 1 1 1 −33 0 1 1 1 1 0 −34 0 1 1 1 0 1 −35 0 1 1 1 0 0 −36 0 1 1 0 1 1 −37 0 1 1 0 1 0 −38 0 1 1 0 0 1 −39 0 1 1 0 0 0 −40 0 1 0 1 1 1 −41 0 1 0 1 1 0 −42 0 1 0 1 0 1 −43 0 1 0 1 0 0 −44 0 1 0 0 1 1 −45 0 1 0 0 1 0 −46 0 1 0 0 0 1 −47 0 1 0 0 0 0 −48 0 0 1 1 1 1 −49 0 0 1 1 1 0 −50 0 0 1 1 0 1 −51 0 0 1 1 0 0 −52 0 0 1 0 1 1 −53 0 0 1 0 1 0 −54 0 0 1 0 0 1 −55 0 0 1 0 0 0 −56 0 0 0 1 1 1 −58.5 0 0 0 1 1 0 −62 0 0 0 1 0 1 −68 0 0 0 1 0 0 Mute left front 0 0 0 0 1 1 Mute left front(1) 0 0 0 0 1 0 Mute left front(1) 0 0 0 0 0 1 front(1) 0 0 0 0 0 0 Mute left Note 1. Not tested; function not guaranteed. 2000 May 08 60 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H 11.14 Write mode: subaddress AH Table 53 Format of data byte Volume 2, right front (VOL2_RF) 7 6 5 4 3 2 1 0 CHMR − VRF5 VRF4 VRF3 VRF2 VRF1 VRF0 Table 54 Description of VOL2_RF bits BIT SYMBOL DESCRIPTION 7 CHMR Chime adder right front select. If CHMR = 1, then chime on. If CHMR = 0, then chime off. 6 − 5 to 0 VRF[5:0] This bit is not used and must be set to logic 0. Right front volume 2, balance and fader control. These 6 bits determine the attenuation of volume 2 right front; see Table 55. Table 55 Attenuation of volume 2 right front ATTENUATION (dB) VRF5 VRF4 VRF3 VRF2 VRF1 VRF0 0 1 1 1 1 1 1 −1 1 1 1 1 1 0 −2 1 1 1 1 0 1 −3 1 1 1 1 0 0 −4 1 1 1 0 1 1 −5 1 1 1 0 1 0 −6 1 1 1 0 0 1 −7 1 1 1 0 0 0 −8 1 1 0 1 1 1 −9 1 1 0 1 1 0 −10 1 1 0 1 0 1 −11 1 1 0 1 0 0 −12 1 1 0 0 1 1 −13 1 1 0 0 1 0 −14 1 1 0 0 0 1 −15 1 1 0 0 0 0 −16 1 0 1 1 1 1 −17 1 0 1 1 1 0 −18 1 0 1 1 0 1 −19 1 0 1 1 0 0 −20 1 0 1 0 1 1 −21 1 0 1 0 1 0 −22 1 0 1 0 0 1 −23 1 0 1 0 0 0 −24 1 0 0 1 1 1 −25 1 0 0 1 1 0 −26 1 0 0 1 0 1 2000 May 08 61 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H ATTENUATION (dB) VRF5 VRF4 VRF3 VRF2 VRF1 VRF0 −27 1 0 0 1 0 0 −28 1 0 0 0 1 1 −29 1 0 0 0 1 0 −30 1 0 0 0 0 1 −31 1 0 0 0 0 0 −32 0 1 1 1 1 1 −33 0 1 1 1 1 0 −34 0 1 1 1 0 1 −35 0 1 1 1 0 0 −36 0 1 1 0 1 1 −37 0 1 1 0 1 0 −38 0 1 1 0 0 1 −39 0 1 1 0 0 0 −40 0 1 0 1 1 1 −41 0 1 0 1 1 0 −42 0 1 0 1 0 1 −43 0 1 0 1 0 0 −44 0 1 0 0 1 1 −45 0 1 0 0 1 0 −46 0 1 0 0 0 1 −47 0 1 0 0 0 0 −48 0 0 1 1 1 1 −49 0 0 1 1 1 0 −50 0 0 1 1 0 1 −51 0 0 1 1 0 0 −52 0 0 1 0 1 1 −53 0 0 1 0 1 0 −54 0 0 1 0 0 1 −55 0 0 1 0 0 0 −56 0 0 0 1 1 1 −58.5 0 0 0 1 1 0 −62 0 0 0 1 0 1 −68 0 0 0 1 0 0 Mute right front 0 0 0 0 1 1 Mute right front(1) 0 0 0 0 1 0 Mute right front(1) 0 0 0 0 0 1 front(1) 0 0 0 0 0 0 Mute right Note 1. Not tested; function not guaranteed. 2000 May 08 62 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H 11.15 Write mode: subaddress BH Table 56 Format of data byte Volume 2, left rear (VOL2_LR) 7 6 5 4 3 2 1 0 − − VLR5 VLR4 VLR3 VLR2 VLR1 VLR0 Table 57 Description of VOL2_LR bits BIT SYMBOL 7 − 6 − 5 to 0 VLR[5:0] DESCRIPTION These 2 bits are not used, each must be set to logic 0. Left rear volume 2, balance and fader control. These 6 bits determine the attenuation of volume 2 left rear; see Table 58. Table 58 Attenuation of volume 2 left rear ATTENUATION (dB) VLR5 VLR4 VLR3 VLR2 VLR1 VLR0 0 1 1 1 1 1 1 −1 1 1 1 1 1 0 −2 1 1 1 1 0 1 −3 1 1 1 1 0 0 −4 1 1 1 0 1 1 −5 1 1 1 0 1 0 −6 1 1 1 0 0 1 −7 1 1 1 0 0 0 −8 1 1 0 1 1 1 −9 1 1 0 1 1 0 −10 1 1 0 1 0 1 −11 1 1 0 1 0 0 −12 1 1 0 0 1 1 −13 1 1 0 0 1 0 −14 1 1 0 0 0 1 −15 1 1 0 0 0 0 −16 1 0 1 1 1 1 −17 1 0 1 1 1 0 −18 1 0 1 1 0 1 −19 1 0 1 1 0 0 −20 1 0 1 0 1 1 −21 1 0 1 0 1 0 −22 1 0 1 0 0 1 −23 1 0 1 0 0 0 −24 1 0 0 1 1 1 −25 1 0 0 1 1 0 −26 1 0 0 1 0 1 −27 1 0 0 1 0 0 2000 May 08 63 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H ATTENUATION (dB) VLR5 VLR4 VLR3 VLR2 VLR1 VLR0 −28 1 0 0 0 1 1 −29 1 0 0 0 1 0 −30 1 0 0 0 0 1 −31 1 0 0 0 0 0 −32 0 1 1 1 1 1 −33 0 1 1 1 1 0 −34 0 1 1 1 0 1 −35 0 1 1 1 0 0 −36 0 1 1 0 1 1 −37 0 1 1 0 1 0 −38 0 1 1 0 0 1 −39 0 1 1 0 0 0 −40 0 1 0 1 1 1 −41 0 1 0 1 1 0 −42 0 1 0 1 0 1 −43 0 1 0 1 0 0 −44 0 1 0 0 1 1 −45 0 1 0 0 1 0 −46 0 1 0 0 0 1 −47 0 1 0 0 0 0 −48 0 0 1 1 1 1 −49 0 0 1 1 1 0 −50 0 0 1 1 0 1 −51 0 0 1 1 0 0 −52 0 0 1 0 1 1 −53 0 0 1 0 1 0 −54 0 0 1 0 0 1 −55 0 0 1 0 0 0 −56 0 0 0 1 1 1 −58.5 0 0 0 1 1 0 −62 0 0 0 1 0 1 −68 0 0 0 1 0 0 Mute left rear 0 0 0 0 1 1 rear(1) 0 0 0 0 1 0 Mute left rear(1) 0 0 0 0 0 1 rear(1) 0 0 0 0 0 0 Mute left Mute left Note 1. Not tested; function not guaranteed. 2000 May 08 64 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H 11.16 Write mode: subaddress CH Table 59 Format of data byte Volume 2, right rear (VOL2_RR) 7 6 5 4 3 2 1 0 − − VRR5 VRR4 VRR3 VRR2 VRR1 VRR0 Table 60 Description of VOL2_RR bits BIT SYMBOL 7 − 6 − 5 to 0 VRR[5:0] DESCRIPTION These 2 bits are not used, each must be set to logic 0. Right rear volume 2, balance and fader control. These 6 bits determine the attenuation of volume 2 right rear, see Table 61. Table 61 Attenuation of volume 2 right rear ATTENUATION (dB) VRR5 VRR4 VRR3 VRR2 VRR1 VRR0 0 1 1 1 1 1 1 −1 1 1 1 1 1 0 −2 1 1 1 1 0 1 −3 1 1 1 1 0 0 −4 1 1 1 0 1 1 −5 1 1 1 0 1 0 −6 1 1 1 0 0 1 −7 1 1 1 0 0 0 −8 1 1 0 1 1 1 −9 1 1 0 1 1 0 −10 1 1 0 1 0 1 −11 1 1 0 1 0 0 −12 1 1 0 0 1 1 −13 1 1 0 0 1 0 −14 1 1 0 0 0 1 −15 1 1 0 0 0 0 −16 1 0 1 1 1 1 −17 1 0 1 1 1 0 −18 1 0 1 1 0 1 −19 1 0 1 1 0 0 −20 1 0 1 0 1 1 −21 1 0 1 0 1 0 −22 1 0 1 0 0 1 −23 1 0 1 0 0 0 −24 1 0 0 1 1 1 −25 1 0 0 1 1 0 −26 1 0 0 1 0 1 −27 1 0 0 1 0 0 2000 May 08 65 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H ATTENUATION (dB) VRR5 VRR4 VRR3 VRR2 VRR1 VRR0 −28 1 0 0 0 1 1 −29 1 0 0 0 1 0 −30 1 0 0 0 0 1 −31 1 0 0 0 0 0 −32 0 1 1 1 1 1 −33 0 1 1 1 1 0 −34 0 1 1 1 0 1 −35 0 1 1 1 0 0 −36 0 1 1 0 1 1 −37 0 1 1 0 1 0 −38 0 1 1 0 0 1 −39 0 1 1 0 0 0 −40 0 1 0 1 1 1 −41 0 1 0 1 1 0 −42 0 1 0 1 0 1 −43 0 1 0 1 0 0 −44 0 1 0 0 1 1 −45 0 1 0 0 1 0 −46 0 1 0 0 0 1 −47 0 1 0 0 0 0 −48 0 0 1 1 1 1 −49 0 0 1 1 1 0 −50 0 0 1 1 0 1 −51 0 0 1 1 0 0 −52 0 0 1 0 1 1 −53 0 0 1 0 1 0 −54 0 0 1 0 0 1 −55 0 0 1 0 0 0 −56 0 0 0 1 1 1 −58.5 0 0 0 1 1 0 −62 0 0 0 1 0 1 −68 0 0 0 1 0 0 Mute right rear 0 0 0 0 1 1 rear(1) 0 0 0 0 1 0 Mute right rear(1) 0 0 0 0 0 1 rear(1) 0 0 0 0 0 0 Mute right Mute right Note 1. Not tested; function not guaranteed. 2000 May 08 66 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H MHB409 6 handbook, full pagewidth VTMUTE (V) 5 4 3 2 1 0 1 2 3 4 VLEVEL (V) 5 Fig.12 Muting average detector (pin 54) dependency on level (pin 3) and stereo noise control peak detector (pin 56) dependency on level (pin 3). 2000 May 08 67 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) CKVL TEA6880H LOPI 12 220 nF OP1 Ri 100 kΩ Rloudness 45 kΩ Vref 11 LLN MHB418 R2 5.1 kΩ C3 100 nF Fig.13 External circuit for loudness with bass boost only. MHB420 0 handbook, full pagewidth gain (dB) −5 −10 −15 −20 −25 −30 10 102 103 104 frequency (Hz) Fig.14 Loudness with bass boost only without influence of coupling capacitors CKVL and CKVR. 2000 May 08 68 105 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) CKVL TEA6880H LOPI 12 220 nF OP1 Ri 100 kΩ Rloudness 45 kΩ Vref C2 R1 680 pF 43 kΩ C3 68 nF R2 4.7 kΩ 11 LLN MHB419 Fig.15 External circuit for loudness with bass and treble boost. MHB421 0 handbook, full pagewidth gain (dB) −5 −10 −15 −20 −25 −30 10 102 103 104 frequency (Hz) 105 Fig.16 Loudness with bass and treble boost without influence of coupling capacitors CKVL and CKVR. 2000 May 08 69 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H MHB422 20 gain (dB) 15 handbook, full pagewidth 10 5 0 −5 −10 −15 −20 10 102 103 frequency (Hz) 104 Fig.17 Bass curve with 2 × 220 nF and R = 3.3 kΩ external, BSYB = 1 for gain and BSYC = 0 for cut. MHB423 20 gain (dB) 15 handbook, full pagewidth 10 5 0 −5 −10 −15 −20 10 102 103 frequency (Hz) Fig.18 Bass curve with 2 × 220 nF and R = 3.3 kΩ external, BSYB = 1 and BSYC = 1. 2000 May 08 70 104 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H MHB424 20 gain (dB) 15 handbook, full pagewidth 10 5 0 −5 −10 −15 −20 10 102 103 104 frequency (Hz) Fig.19 Bass curve with 1 × 47 nF external, between pin 31 and pin 32, BSYB = 0 and BSYC = 0. MHB425 20 gain (dB) 15 handbook, full pagewidth 10 5 0 −5 −10 −15 −20 10 102 103 Fig.20 Treble control characteristic. 2000 May 08 71 104 frequency (Hz) 105 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H 12 INTERNAL CIRCUITRY Table 62 Equivalent pin circuits PIN 1 SYMBOL EQUIVALENT CIRCUIT SDAQ 1 MHB375 2 SCLQ 2 MHB376 3 LEVEL 3 MHB379 4 SCL 4 MHB377 5 SDA 5 MHB378 6 DGND 7 TBL 7 MHB384 8 2000 May 08 VCC 72 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) PIN 9 TEA6880H SYMBOL EQUIVALENT CIRCUIT CHIME 9 MHB426 10 AGND 11 LLN 11 12 MHB363 LOPI 12 MHB350 13 LOPO 13 MHB361 14 BRI 14 MHB351 2000 May 08 73 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) PIN 15 TEA6880H SYMBOL EQUIVALENT CIRCUIT ADR 15 16 MHB395 BLI 16 MHB352 17 SCAP 17 MHB396 18 CRIP 18 MHB353 19 CCOM 19 MHB354 2000 May 08 74 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) PIN 20 TEA6880H SYMBOL EQUIVALENT CIRCUIT CLIP 20 MHB355 21 MONOC 21 MHB356 22 MONOP 22 MHB357 23 VHS 23 MHB394 24 ARI 24 MHB358 2000 May 08 75 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) PIN 25 TEA6880H SYMBOL EQUIVALENT CIRCUIT AMNCAP 25 MHB397 26 ALI 26 MHB359 27 ROPO 27 MHB362 28 ROPI 28 MHB360 29 30 2000 May 08 RLN 29 MHB364 30 MHB365 RTC 76 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) PIN TEA6880H SYMBOL 31 RBI 32 RBO EQUIVALENT CIRCUIT 31 32 MHB373 33 RF 33 MHB367 34 RR 34 MHB368 35 ASICAP 35 MHB393 36 LR 36 MHB369 37 LF 37 MHB370 2000 May 08 77 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) PIN TEA6880H SYMBOL 38 LBO 39 LBI EQUIVALENT CIRCUIT 39 38 MHB374 40 LTC 40 41 MHB366 AMPCAP 41 MHB398 42 AMHOLD 42 MHB399 2000 May 08 78 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) PIN 43 TEA6880H SYMBOL EQUIVALENT CIRCUIT AMHCAP 43 MHB401 44 Iref 44 MHB400 45 TWBAM2 45 MHB402 46 TUSN2 46 MHB390 47 PHASE 47 MHB403 2000 May 08 79 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) PIN 48 TEA6880H SYMBOL EQUIVALENT CIRCUIT fref 48 MHB404 49 PILOT 49 MHB405 50 AFSAMPLE 50 MHB380 51 FMHOLD 51 MHB381 52 AMHIN 52 MHB371 53 AMNBIN 53 MHB406 2000 May 08 80 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) PIN 54 TEA6880H SYMBOL EQUIVALENT CIRCUIT TMUTE 54 MHB385 55 MPXRDS 55 MHB407 56 TSNC 56 MHB386 57 MPXIN 57 MHB372 58 FMNCAP 58 MHB387 2000 May 08 81 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) PIN 59 TEA6880H SYMBOL EQUIVALENT CIRCUIT DEEML 59 MHB382 60 DEEMR 60 MHB383 61 FMLBUF 61 MHB391 62 FMRBUF 62 MHB392 63 TWBAM1 63 MHB388 2000 May 08 82 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) PIN 64 TEA6880H SYMBOL EQUIVALENT CIRCUIT TUSN1 64 MHB389 2000 May 08 83 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H 13 PACKAGE OUTLINE QFP64: plastic quad flat package; 64 leads (lead length 1.95 mm); body 14 x 20 x 2.8 mm SOT319-2 c y X 51 A 33 52 32 ZE e E HE A A2 (A 3) A1 θ wM pin 1 index Lp bp L 20 64 detail X 19 1 ZD w M bp e v M A D B HD v M B 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp v w y mm 3.20 0.25 0.05 2.90 2.65 0.25 0.50 0.35 0.25 0.14 20.1 19.9 14.1 13.9 1 24.2 23.6 18.2 17.6 1.95 1.0 0.6 0.2 0.2 0.1 Z D (1) Z E (1) 1.2 0.8 1.2 0.8 θ o 7 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT319-2 2000 May 08 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 97-08-01 99-12-27 MO-112 84 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H If wave soldering is used the following conditions must be observed for optimal results: 14 SOLDERING 14.1 Introduction to soldering surface mount packages • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. 14.2 – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 14.3 14.4 Wave soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. 2000 May 08 Manual soldering When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. 85 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) 14.5 TEA6880H Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, SQFP not suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO suitable suitable(2) suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2000 May 08 86 Philips Semiconductors Product specification Up-level Car radio Analog Signal Processor (CASP) TEA6880H 15 DATA SHEET STATUS DATA SHEET STATUS PRODUCT STATUS DEFINITIONS (1) Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Note 1. Please consult the most recently issued data sheet before initiating or completing a design. 16 DEFINITIONS 17 DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 18 PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. 2000 May 08 87 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 753503/01/pp88 Date of release: 2000 May 08 Document order number: 9397 750 04633