PD-93920A RIC7113E4 RADIATION HARDENED HIGH AND LOW SIDE GATE DRIVER Product Summary Features n Total dose capability to 100K Rad (Si) n Floating channel designed for bootstrap operation n Fully operational to +400V n Tolerant to negative transient voltage n dV/dt immune n Gate drive supply range from 10 to 20V n Undervoltage lockout for both channels n Separate logic supply range from 5 to 20V Logic and power ground ±5V offset n CMOS Schmitt-triggered inputs with pull-down n Cycle by cycle edge-triggered shutdown logic n Matched propagation delay for both channels n Outputs in phase with inputs VOFFSET IO+/VOUT ton/off (typ.) Delay Matching(typ.) 400V max. 2A / 2A 10 - 20V 120 & 100 ns 5 ns Description The RIC7113E4 is a high voltage, high speed power MOSFET and IGBT driver with independent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. Logic inputs are compatible with standard CMOS or LSTTL outputs. The output drivers n Hermetically Sealed feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are n Lightweight matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 400 volts. Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Absolute Maximum Ratings Symbol VB VS V HO V CC VLO V DD VSS V IN dV s/dt PD RthJA TJ TS TL Parameter High Side Floating Supply Voltage High Side Floating Supply Offset Voltage High Side Floating Output Voltage Low Side Fixed Supply Voltage Low Side Output Voltage Logic Supply Voltage Logic Supply Offset Voltage Logic Input Voltage (HIN, LIN & SD) Allowable Offset Supply Voltage Transient (Figure 2) Package Power Dissipation @ TA £ +25°C Thermal Resistance, Junction to Ambient Junction Temperature Storage Temperature Lead Temperature (Soldering, 10 seconds) Weight www.irf.com Min. Max. -0.5 — VS - 0.5 -0.5 -0.5 -0.5 VCC - 20 VSS - 0.5 — — — -55 -55 — VS + 20 400 VB + 0.5 20 VCC + 0.5 VSS + 20 VCC + 0.5 VDD + 0.5 50 1.6 125 125 150 300 0.42 (typical) Units V V/ns W °C/W °C g 1 5/3/2001 RIC7113E4 Pre-Irradiation Recommended Operating Conditions The Input/Output logic timing diagram is shown in Figure 1. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Symbol VB VS VHO VCC VLO VDD VSS VIN Parameter High Side Floating Supply Absolute Voltage High Side Floating Supply Offset Voltage High Side Floating Output Voltage Low Side Fixed Supply Voltage Low Side Output Voltage Logic Supply Voltage Logic Supply Offset Voltage Logic Input Voltage (HIN, LIN & SD) Min. Max. VS + 10 -4 VS 10 0 VSS + 5 -5 VSS VS + 20 400 VB 20 VCC VSS + 20 5 VDD Units V Dynamic Electrical Characteristics VBIAS (VCC, VBS, VDD) = 15V, and VSS = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Figure 3. Tj = 25°C Symbol Parameter Min. Tj = -55 to 125°C Typ. Max. Min. Max. Units Test Conditions ton Turn-On Propagation Delay — 120 150 — 260 VS = 0V t off Turn-Off Propagation Delay — 100 125 — 220 VS = 400V tsd Shutdown Propagation Delay — 110 140 — 235 tr Turn-On Rise Time — 25 35 — 50 CL = 1000pf tf Turn-Off Fall Time — 17 25 — 40 Delay Matching, HS & LS Turn-On/Off — 5 20 — — CL = 1000pf |Hton-Lton| or|Htoff-Ltoff| MT ns VS = 400V Typical Connection 4 up to 500V HO VDD VDD VB HIN HIN VS SD SD LIN LIN VCC V SS VSS COM VCC 2 TO LOAD LO www.irf.com Pre-Irradiation RIC7113E4 Static Electrical Characteristics VBIAS (VCC, VBS, VDD) = 15V, unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are applicable to all three logic input pins: HIN, LIN and SD. The VO and IO parameters are referenced to COM or VS and are applicable to the respective output pins: HO or LO. Tj = 25°C Symbol VIH VIL Parameter Logic “1” Input Voltage Logic “0” Input Voltage Min. Typ. Tj = -55 to 125°C Min. Max. Units 3.1 — 3.3 — 6.4 — 6.8 — 9.5 — 10 — 12.5 — 13.3 — — 1.8 — 1.7 — 3.8 — 3.6 5.7 7.9 1.5 VDD = 20V VIN =VIH, IO = 0A VIN =VIH, IO = 0A Low Level Output Voltage, VO — 0.1 — 0.1 ILK Offset Supply Leakage Current — 50 — 250 IQBS Quiescent VBS Supply Current — 230 — 500 IQCC Quiescent VCC Supply Current — 340 — 600 IQDD Quiescent VDD Supply Current — 30 — 60 IIN+ Logic “1” Input Bias Current — 40 — 70 IIN- Logic “0” Input Bias Current VBS Supply Undervoltage Positive Going Threshold VBS Supply Undervoltage Negative Going Threshold VCC Supply Undervoltage Positive Going Threshold VCC Supply Undervoltage Negative Going Threshold Output High Short Circuit Pulsed Current Output Low Short Circuit Pulsed Current — 7.5 1.0 9.7 — — 10 — 7.0 9.4 — — 7.4 9.6 — — 7.0 9.4 — — 2.0 — — — www.irf.com VDD = 10V VDD = 15V — VOL IO- V — — IO+ VDD = 20V VDD = 5V 6.0 1.2 VCCUV- VDD = 10V VDD = 15V 8.3 — VCCUV+ V — High Level Output Voltage, VBIAS - VO VBSUV- VDD = 5V — VOH VBSUV+ Test Conditions VB = VS = 400V µA VIN =0V, or VDD VIN = VDD VIN = 0V V A 2.0 — — — VIN =0V or VDD VIN =0V, or VDD VO = 0V, VIN = VDD PW < 10 µs VO = 15V, VIN = 0V PW < 10 µs 3 RIC7113E4 Radiation characteristics Radiation Performance International Rectifier Radiation Hardened gate drivers are tested to verify their hardness capability. The hardness assurance program at International rectifier uses a Cobalt-60 (60 Co) source and heavy ion irradiation. Every wafer shall be tested per MIL-STD-883, Method 1019, test condition A “Ionizing Radiation (Total Dose) Test Procedure”. Both pre- and post- irradiation performances are tested and specified using the same drive circuitry and test conditions to provide a direct comparison. For Static Irradiation Test Conditions refer to figure 7. Static Electrical Characteristics Symbol VIH VIL Parameter Logic “1” Input Voltage Logic “0” Input Voltage VOH High Level Output Voltage, VBIAS - VO VOL Low Level Output Voltage, VO ILK Offset Supply Leakage Current IQBS Quiescent VBS Supply Current IQCC Quiescent VCC Supply Current IQDD Quiescent VDD Supply Current IIN+ Logic “1” Input Bias Current IIN- Logic “0” Input Bias Current VBSUV+ VBSUVVCCUV+ VCCUVIO+ IO- 4 VBS Supply Undervoltage Positive Going Threshold VBS Supply Undervoltage Negative Going Threshold VCC Supply Undervoltage Positive Going Threshold VCC Supply Undervoltage Negative Going Threshold Output High Short Circuit Pulsed Current Output Low Short Circuit Pulsed Current Tj = 25°C 100K Rads (Si) Units Test Conditions Min Max 3.1 6.4 9.5 12.5 — — — — — — — 1.8 3.8 6.0 8.3 — 1.2 VIN =VIH, IO = 0A — — — — — — — 0.1 VIN =VIH, IO = 0A V V 50 VB =VS = 400A 230 340 VIN =0V or VDD µA 30 VIN =VDD 1.0 9.7 7.0 9.4 7.4 9.9 7.0 9.6 2.0 — 2.0 — VIN =0V or VDD VIN =0V or VDD 40 7.5 VDD = 5V VDD = 10V VDD = 15V VDD = 20V VDD = 5V VDD = 10V VDD = 15V VDD = 20V VIN =0V V A VO =0V, VIN =VDD PW < 10 µs VO =15V, VIN =0V PW < 10 µs www.irf.com Radiation characteristics RIC7113E4 International Rectifier radiation hardened Gate Drivers have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization data is illustrated below. For Static Bias Test Conditions refer to figure 8. Single Event Effect Safe Operating Area Ion Br I Au I Au LET MeV/(mg/cm2)) 37 60 82 85 100 Energy (MeV) 284 344 346 344 346 VS (V) Angle (degrees) 0 0 0 45 35 @VBS=-10V 400 325 250 400 400 @VBS=-15V 400 250 200 400 400 @VBS=-17.5V 400 200 175 350 350 Note: VCC/VDD = 20V, except for LET=100, then VCC/VDD = 17.5V VS (V) STATIC BIAS 450 400 350 300 250 200 150 100 50 0 Br, 0° angle I, 0° angle Au, 0° angle I, 45° angle Au, 35° angle -10 -15 -17.5 VB (V) Single Event Effect, Safe Operating Area www.irf.com 5 RIC7113E4 HV = 10 to 400V RIC7113 IRF820A Figure 1. Input/Output Logic Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit (0to400V) ton RIC7113 50% 50% HIN LIN tr toff 90% HO LO Figure 3. Switching Time Test Circuit tf 90% 10% 10% Figure 4. Switching Time Waveform Definition HIN LIN 50% 50% SD LO 50% HO 10% tsd HO LO MT 90% MT 90% LO Figure 5. Shutdown Waveform Definitions 6 HO Figure 6. Delay Matching Waveform Definitions www.irf.com RIC7113E4 RIC7113 4K VB VDD HO 4K 1 nF 20V HIN VS 20V Logic VCC LIN LO 50 2.4K 1 nF 400V SD COM VSS 4K Figure 7. Static Bias Conditions for Total Ionizing DoseTest RIC7113L4 SCHEMATIC 2 Figure 8. Static Bias Conditions for Single Event Effect Test www.irf.com 7 RIC7113E4 Functional Block Diagram V B UV DETECT V DD R S HV LEVEL SHIFT Q V /V DD CC LEVEL SHIFT HIN PULSE FILTER PULSE GEN R R Q HO S VS SD V CC V /V DD CC LEVEL SHIFT LIN S R Q UV DETECT LO DELAY COM V SS Pad Definitions Symbol Description VDD Logic supply HIN Logic input for high side gate driver output (HO), in phase SD Logic input for shutdown LIN Logic input for low side gate driver output (LO), in phase VSS Logic ground VB High side floating supply HO High side gate drive output VS High side floating supply return VCC Low side supply LO Low side gate drive output COM Low side return 8 www.irf.com RIC7113E4 Case Outline and Dimensions — Leadless chip carrier (LCC) package RIC7113E4 IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 05/01 www.irf.com 9