Data Sheet No. PD60255 IRS21851SPbF SINGLE HIGH SIDE DRIVER IC Features • Gate drive supply range from 10 V to 20 V • Undervoltage lockout for VBS and V CC • 3.3 V and 5 V input logic compatible • Tolerant to negative transient voltage • Matched propagation delays for all channels • RoHS compliant Description The IRS21851 is a high voltage, high speed power MOSFET and IGBT single high-side driver with propagation delay matched output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The floating logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic and can be operated up to 600 V above the ground. The output driver features a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high- side configuration, which operates up to 600 V. Product Summary VOFFSET 600 V max. IO+/- 4A/ 4A VOUT 10 V - 20 V ton/off (typ.) 170 ns & 170 ns Package 8-Lead SOIC IRS21851 Typical Connection up to 600V VCC IN VCC IN VB HO VS TO LOAD COM (Refer to Lead Assignments for correct pin configuration). This diagram shows electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1 IRS21851SPbF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. 20 (Note 1) VC C Low-side supply voltage -0.3 V IN Logic input voltage (HIN) COM -0.3 VCC + 0.3 VB High-side floating well supply voltage -0.3 620 (Note 1) VS High-side floating well supply return voltage V B - 20 VB + 0.3 Floating gate drive output voltage VHO dVs /dt PD RthJA Units V VS - 0.3 VB + 0.3 Allowable VS offset supply transient relative to COM — 50 Package power dissipation @ TA ≤ +25 °C — 1.25 W Thermal resistance, junction to ambient — 100 °C/W TJ Junction temperature -55 150 TS Storage temperature -55 150 TL Lead temperature (soldering, 10 seconds) — 300 V/ns °C Note 1: All supplies are fully tested at 25 V. An internal 20 V clamp exists for each supply. Recommended Operating Conditions For proper operation, the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to COM. The offset rating are tested with supplies of (VCC-COM)=(VB-VS)=15 V. Symbol Definition Min. Max. 10 20 COM VC C V S + 10 VS + 20 Note 2 600 Floating gate drive output voltage VS VB Ambient temperature -40 125 VC C Low-side supply voltage V IN HIN input voltage VB High-side floating well supply voltage VS High-side floating well supply offset voltage VHO TA Units V °C Note 2: Logic operational for VS of -5 V to 600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip DT97-3 for more details). www.irf.com 2 IRS21851SPbF Dynamic Electrical Characteristics (VCC-COM)=(VB-VS)=15 V, TA = 25 oC. CL = 1000 pF unless otherwise specified. All parameters are referenced to COM. Symbol Definition Min. Typ. Max. Units Test Conditions ton Turn-on propagation delay — 160 210 (VS -COM) = 0 V t off Turn-off propagation delay — 160 210 (VS -COM) = 600 V tr Turn-on rise time — 15 40 tf Turn-off fall time — 15 40 ns Static Electrical Characteristics (VCC-COM)=(VB-V S)=15 V. The VIN, VTH, and IIN parameters are referenced to COM. The VO and IO parameters are referenced respective VS and are applicale to the respective output leads HO. The VCC parameters are referenced to COM. The VBSUV parameters are referenced to VS. Symbol Definition Min. Typ. Max. Units Test Conditions VCCUV+ VCC supply undervoltage positive going threshold 8.0 8.9 9.8 VCCUV- VCC supply undervoltage negative going threshold 7.4 8.2 9.0 VBSUV+ VBS supply undervoltage positive going threshold 8.0 8.9 9.8 VBSUV- VBS supply undervoltage negative going threshold 7.4 8.2 9.0 High-side floating well offset supply leakage current — — 50 IQBS ILK Quiescent VBS supply current — 80 150 IQCC Quiescent VCC supply current — 120 240 V IH Logic “1” input voltage 2.5 — — V IL Logic “0” input voltage — — 0.8 VOH, HO HO high level output voltage, VBIAS - VO — 20 60 VOL, HO HO low level output voltage, VO — 10 30 IIN+ Logic “1” input bias current — 10 20 IIN- Logic “0” input bias current — 0 5 IO+, HO Output high short circuit pulsed current HO — 4 V VB = VS = 600 V µA V mV µA www.irf.com Output low short circuit pulsed current HO — 4 — — IO = 2 mA VHIN = 5 V VHIN = 0 V VO = 0 V, VIN = 0 V A IO-, HO HIN = 0 V or 5 V PW ≤ 10 µs VO = 15 V, VIN = 15 V PW ≤ 10 µs 3 IRS21851SPbF Functional Block Diagram VCC COM 5V VREG VCCUV DETECT HIGHSIDE CHANNLE1 VB PULSE GEN HIN FILTER, LATCH UV DETECT LEVEL SHIFT UP DRIVER HO VS Lead Definitions Symbol VCC COM VB HO VS HIN Description Low-side supply voltage Ground High-side drive floating supply High-side driver outputs High voltage floating supply return Logic inputs for high-side gate driver output (in phase) Lead Assignments 1 VCC 2 HIN IRS21851S 3 4 VB 8 HO 7 VS 6 5 COM 8- Lead SOIC www.irf.com 4 IRS21851PbF 50% 50% IN t on t off tr OUT 90% 10% tf 90% 10% Figure 1. Switching Time Waveforms HIN HO Figure 2. Input/Output Timing Diagram www.irf.com 5 300 T ur n- O n Propagation Delay (ns ) T ur n- O n Propagation Delay (ns ) IRS21851SPbF 250 200 150 Max Typ 100 50 0 -50 -25 0 25 50 75 100 300 250 Max 200 Typ 150 100 50 0 10 125 12 300 250 Max Typ 100 50 0 -50 -25 0 25 50 75 100 Temperature (°C) Figure 4A. Tu rn-Off Propag ation Delay vs . Temperature www.irf.com 18 20 Figure 3B. Turn-On Propagation Delay vs. Supply Voltage T ur n- O ff Propagation Delay (ns ) Turn- Off Propagation Delay (ns) Figure 3A. Tu rn-On Propag ation Delay vs . Temperature 150 16 Supply Voltage (V) Temperature (°C) 200 14 125 250 Max 200 Typ 150 100 50 0 10 12 14 16 18 20 Supply Voltage (V) Figure 4B. Turn-Off Propagation Delay vs. Supply Voltage 6 IRS21851SPbF 40 60 Max Tur n- O n Ris e Time ( ns ) Tur n- O n Ris e Time ( ns ) 45 35 30 25 20 15 Typ 10 5 0 -50 Max 50 40 30 20 Typ 10 0 -25 0 25 50 75 100 125 10 12 Temperature (°C) Max Turn- Off Fall Time ( ns) Turn- Off Fall Time ( ns) 20 60 35 30 25 20 Typ 10 5 0 -50 18 Figure 5B. Turn-On Rise Time vs. Supply Voltage 45 15 16 Supply Voltage (V) Figure 5A. Turn-On Rise Time vs. Temperature 40 14 Max 50 40 30 20 Typ 10 0 -25 0 25 50 75 Temperature (°C) Figure 6A. Turn-Off Fall Time vs. Temperature www.irf.com 100 125 10 12 14 16 18 20 Supply Voltage (V) Figure 6B. Turn-Off Fall Tim e vs. Supply Voltage 7 IRS21851SPbF 3 Logic "1" Input Voltage (V) Logic "1" Input Voltage (V) 3 Max 2.5 2 1.5 1 0.5 0 -50 2.5 Max 2 1.5 1 0.5 0 -25 0 25 50 75 100 125 10 12 Temperature (°C) 16 18 20 Supply Voltage (V) Figure 7A. L ogic "1" Input Voltage vs. Temperature Figure 7B. Logic "1" Input Voltage vs. Supply Voltage 0.9 0.9 0.8 Min Logic "0" Input Voltage (V) Logic "0" Input Voltage (V) 14 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -25 0 25 50 75 100 Temperature (°C) Figure 8A. L ogic "0" Input Voltage vs. Temperature www.irf.com Min 0.8 125 10 12 14 16 18 20 Supply Voltage (V) Figure 8B. Logic "0" Input Voltage vs. Supply Voltage 8 IRS21851SPbF 70 80 High Lev el O utput (m V) High Level Output (mV) 90 70 60 50 40 Max 30 20 10 Typ 0 -50 Max 60 50 40 30 Typ 20 10 0 -25 0 25 50 75 100 125 10 12 Temperature (°C) 35 30 Low Level Output (mV) Low L evel Output (mV) 35 Max 20 15 10 Typ 5 0 -50 18 20 Figure 9B. High Level Outpu t vs. Supply Voltage (Io =2 mA) 40 25 16 Supply Voltage (V) Figure 9A. High Level Output vs. Temperature (Io = 2 mA) 30 14 Max 25 20 15 10 Typ 5 0 -25 0 25 50 75 Temperature (°C) Figure 10A. Low Level Output vs. Temperature (Io=2 mA) www.irf.com 100 125 10 12 14 16 18 20 Supply Voltage (V) Figure 10B. Low Level Output vs. Supply Vo ltage (Io=2 mA) 9 300 O ffs e t Supply Leak a ge Cur rent ( µA) Offset Supply Leakage Current (µA) IRS21851SPbF 250 200 150 100 50 Max 0 -50 -25 0 25 50 75 100 125 60 50 Max 40 30 20 10 0 10 12 Temperature (°C) 16 18 20 Supply Voltage (V) Figure 11A. Offset Su pply Leakage Current vs. Temperature Figure 11B. Offse t Supply Leak age Current vs. Supply Voltage 250 180 160 140 V BS Supp ly Current (µA) V BS Supply Current (µA) 14 Max 120 100 80 Typ 60 40 20 0 -50 150 100 Max 50 Typ 0 -25 0 25 50 75 100 Temperature (°C) Figure 12A. VBS Supply Current vs. Temperature www.irf.com 200 125 10 12 14 16 18 20 Supply Voltage (V) Figure 12B. V BS Supply Curre nt vs. Supply Voltage 10 300 350 250 300 V CC Supp ly Current (µA) V CC Supply Current (µA) IRS21851SPbF Max 200 150 Typ 100 50 0 -50 250 200 Max 150 100 Typ 50 0 -25 0 25 50 75 100 125 10 12 Temperature (°C) Logic "0" Input Bias C ur r ent ( µA) Logic "0" Input Bias C urrent (µA) Max 4 3 2 1 0 -25 0 25 50 75 100 Temperature (°C) Figure 14A. Lo gic "0" Input Bias Current vs . Temperature www.irf.com 18 20 Figure 13B. V CC Supply Curre nt vs. Supply Voltage 6 -50 16 Supply Voltage (V) Figure 13A. VCC Supply Current vs. Temperature 5 14 125 6 5 Max 4 3 2 1 0 10 12 14 16 18 20 Supply Voltage (V) Figure 14B. Log ic "0" Input Bias Current vs. Supply Voltage 11 6 5 Logic "0" Input Bias Current (µA) Logic "0" Input Bias Current (µA) IRS21851SPbF Max 4 3 2 1 0 -50 -25 0 25 50 75 100 125 6 5 Max 4 3 2 1 0 10 12 Temperature (°C) 20 vs. Voltage 12 VCC UVLO Threshold (-) (V) 12 V CC UVL O Threshold (+) (V) 18 Supply Voltage (V) vs. Temperature 11 Max 9 Typ 8 Min 7 6 -50 16 Figure 15B. Logic "0" Input Bias Current Figure 15A. Logic "0" Input Bias Current 10 14 -25 0 25 50 75 100 Temperature (°C) Figure 16. V CC Undervoltage Threshold (+) vs. Temperature www.irf.com 125 11 10 9 Max 8 Typ 7 6 -50 Min -25 0 25 50 75 100 125 Temperature (°C) Figure 17. V CC Undervoltage Threshold (-) vs. Temperature 12 IRS21851SPbF 12 VBS UVLO Threshold (-) (V) V BS UVL O Threshold (+) (V) 12 11 10 Max 9 Typ 8 Min 7 6 -50 -25 0 25 50 75 100 11 10 9 Max 8 Typ Min 7 6 -50 125 -25 75 100 125 6 Typ 3.5 3 2.5 2 1.5 1 5 4 3 Typ 2 1 0 -25 0 25 50 75 100 Temperature (°C) Figure 20A. Output Source Current vs. Temperature www.irf.com 50 Figure 19. V BS Undervoltage Threshold (-) vs. Temperature O utp ut Sour c e Cur r e nt ( A) Outp ut Source Current (A) Figure 18. V BS Undervoltage Threshold (+) vs. Temperature 0.5 0 -50 25 Temperature (°C) Temperature (°C) 5 4.5 4 0 125 10 12 14 16 18 20 Supply Voltage (V) Figure 20B. Outp ut Source Cur rent vs. Supply Voltage 13 5 4.5 4 6 Typ 5 O utp ut Sink Cur r ent ( A) Output Sink Current (A) IRS21851SPbF 3.5 3 2.5 2 1.5 1 0.5 0 -50 4 3 Typ 2 1 0 -25 0 25 50 75 100 125 10 12 Temperature (°C) 14 16 18 20 Supply Voltage (V) Figure 21A. Output Sink Current vs. Temperature Figure 21B. Out put Sink Curre nt vs. Supply Voltage Case outline D DIM B 5 A FOOTPRINT 8 6 7 6 5 H E 1 6X 2 3 0.25 [.010] 4 A e 6.46 [.255] 3X 1.27 [.050] e1 8X b 0.25 [.010] A A1 8X 1.78 [.070] MILLIMETERS MAX MIN .0532 .0688 1.35 1.75 A1 .0040 A 8X 0.72 [.028] INCHES MIN MAX .0098 0.10 0.25 b .013 .020 0.33 0.51 c .0075 .0098 0.19 0.25 D .189 .1968 4.80 5.00 E .1497 .1574 3.80 4.00 e .050 BASIC 1.27 BASIC e1 .025 BASIC 0.635 BASIC H .2284 .2440 5.80 6.20 K .0099 .0196 0.25 0.50 L .016 .050 0.40 1.27 y 0° 8° 0° 8° K x 45° C y 0.10 [.004] 8X L 8X c 7 C A B 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. NOTES: 1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. 2. CONTROLLING DIMENSION: MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES]. 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. 8-Lead SOIC www.irf.com 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS. MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010]. 7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE. 01-6027 14 IRS21851SPbF Tape & Reel 8-lead SOIC LOAD ED TA PE FEED DIRECTION A B H D F C N OT E : CO NTROLLING D IM ENSION IN M M E G C A R R I E R T A P E D IM E N S I O N F O R 8 S O I C N M e tr ic Im p e r ia l Co d e M in M ax M in M ax A 7 .9 0 8 .1 0 0. 31 1 0 .3 1 8 B 3 .9 0 4 .1 0 0. 15 3 0 .1 6 1 C 1 1 .7 0 1 2 . 30 0 .4 6 0 .4 8 4 D 5 .4 5 5 .5 5 0. 21 4 0 .2 1 8 E 6 .3 0 6 .5 0 0. 24 8 0 .2 5 5 F 5 .1 0 5 .3 0 0. 20 0 0 .2 0 8 G 1 .5 0 n/ a 0. 05 9 n/ a H 1 .5 0 1 .6 0 0. 05 9 0 .0 6 2 F D C B A E G H R E E L D IM E N S I O N S F O R 8 S O IC N M e tr ic Im p e r ia l Co d e M in M ax M in M ax A 32 9.60 3 3 0 .2 5 1 2 .9 76 1 3 .0 0 1 B 2 0 .9 5 2 1 . 45 0. 82 4 0 .8 4 4 C 1 2 .8 0 1 3 . 20 0. 50 3 0 .5 1 9 D 1 .9 5 2 .4 5 0. 76 7 0 .0 9 6 E 9 8 .0 0 1 0 2 .0 0 3. 85 8 4 .0 1 5 F n /a 1 8 . 40 n /a 0 .7 2 4 G 1 4 .5 0 1 7 . 10 0. 57 0 0 .6 7 3 H 1 2 .4 0 1 4 . 40 0. 48 8 0 .5 6 6 www.irf.com 15 IRS21851SPbF LEADFREE PART MARKING INFORMATION IRxxxxxx S Part number YWW? Date code Pin 1 Identifier ? P MARKING CODE Lead Free Released Non-Lead Free Released IR logo ?XXXX Lot Code (Prod mode - 4 digit SPN code) Assembly site code Per SCOP 200-002 ORDER INFORMATION 8-Lead SOIC order IRS21851SPbF 8-Lead SOIC Tape & Reel IRS21851STRPbF The SOIC-8 is MSL2 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found at www.irf.com IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 12/4/2006 www.irf.com 16