Data Sheet No. PD60026-O IR2112(S) HIGH AND LOW SIDE DRIVER Features Product Summary • Floating channel designed for bootstrap • Fully operational to +600V • Tolerant to negative transient voltage operation dV/dt immune • Gate drive supply range from 10 to 20V • Undervoltage lockout for both channels • 3.3V logic compatible • • • • Separate logic supply range from 3.3V to 20V Logic and power ground ±5V offset CMOS Schmitt-triggered inputs with pull-down Cycle by cycle edge-triggered shutdown logic Matched propagation delay for both channels Outputs in phase with inputs VOFFSET 600V max. IO+/- 200 mA / 420 mA VOUT 10 - 20V ton/off (typ.) 125 & 105 ns Delay Matching 30 ns Packages Description The IR2112(S) is a high voltage, high speed power MOSFET and IGBT driver with independent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable rugge16-Lead SOIC dized monolithic construction. Logic inputs are com(wide body) 14-Lead PDIP patible with standard CMOS or LSTTL outputs, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts. Typical Connection up to 600V HO VDD VDD VB HIN HIN VS SD SD LIN LIN VCC VSS VSS COM VCC TO LOAD LO (Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1 IR2112(S) Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figures 28 through 35. Symbol Definition Min. Max. -0.3 625 High Side Floating Supply Offset Voltage VB - 25 VB + 0.3 VHO High Side Floating Output Voltage VS - 0.3 VB + 0.3 VCC Low Side Fixed Supply Voltage -0.3 25 VLO Low Side Output Voltage -0.3 VCC + 0.3 VDD Logic Supply Voltage -0.3 VSS + 25 VSS Logic Supply Offset Voltage VCC - 25 VCC + 0.3 VIN Logic Input Voltage (HIN, LIN & SD) VSS - 0.3 VDD + 0.3 VB High Side Floating Supply Voltage VS dVs/dt PD RTHJA Allowable Offset Supply Voltage Transient (Figure 2) — 50 Package Power Dissipation @ TA ≤ +25°C (14 Lead DIP) — 1.6 (16 Lead SOIC) — 1.25 (14 Lead DIP) — 75 (16 Lead SOIC) — 100 Thermal Resistance, Junction to Ambient TJ Junction Temperature — 150 TS Storage Temperature -55 150 TL Lead Temperature (Soldering, 10 seconds) — 300 Units V V/ns W °C/W °C Recommended Operating Conditions The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in Figures 36 and 37. Symbol Definition VB High Side Floating Supply Absolute Voltage VS High Side Floating Supply Offset Voltage Min. Max. VS + 10 VS + 20 Note 1 600 VB VHO High Side Floating Output Voltage VS VCC Low Side Fixed Supply Voltage 10 20 VLO Low Side Output Voltage 0 VCC VDD Logic Supply Voltage VSS Logic Supply Offset Voltage VIN TA Units V VSS + 3 VSS + 20 -5 (Note 2) 5 Logic Input Voltage (HIN, LIN & SD) VSS VDD Ambient Temperature -40 125 °C Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-3 for more details). Note 2: When VDD < 5V, the minimum VSS offset is limited to -VDD. 2 www.irf.com IR2112(S) Dynamic Electrical Characteristics VBIAS (VCC, VBS, VDD) = 15V, CL = 1000 pF, TA = 25°C and VSS = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Figure 3. Symbol Definition Figure Min. Typ. Max. Units Test Conditions ton Turn-On Propagation Delay 7 — 125 180 VS = 0V toff Turn-Off Propagation Delay 8 — 105 160 VS = 600V tsd Shutdown Propagation Delay 9 — 105 160 tr Turn-On Rise Time 10 — 80 130 tf Turn-Off Fall Time 11 — 40 65 Delay Matching, HS & LS Turn-On/Off — — — 30 MT ns VS = 600V Figure 5 Static Electrical Characteristics VBIAS (VCC, VBS, VDD) = 15V, TA = 25°C and VSS = COM unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are applicable to all three logic input leads: HIN, LIN and SD. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Definition Figure Min. Typ. Max. Units Test Conditions VIH Logic “1” Input Voltage 12 9.5 — — VIL Logic “0” Input Voltage 13 — — 6.0 VOH High Level Output Voltage, VBIAS - VO 14 — — 100 VOL Low Level Output Voltage, VO 15 — — 100 ILK Offset Supply Leakage Current 16 — — 50 IQBS Quiescent VBS Supply Current 17 — 25 60 VIN = 0V or VDD IQCC Quiescent VCC Supply Current 18 — 80 180 VIN = 0V or VDD IQDD Quiescent VDD Supply Current 19 — 2.0 5.0 IIN+ Logic “1” Input Bias Current 20 — 20 40 VIN = VDD IIN- Logic “0” Input Bias Current 21 — — 1.0 VIN = 0V 22 7.4 8.5 9.6 23 7.0 8.1 9.2 24 7.6 8.6 9.6 25 7.2 8.2 9.2 IO+ VBS Supply Undervoltage Positive Going Threshold VBS Supply Undervoltage Negative Going Threshold VCC Supply Undervoltage Positive Going Threshold VCC Supply Undervoltage Negative Going Threshold Output High Short Circuit Pulsed Current 26 200 250 — I O- Output Low Short Circuit Pulsed Current 27 420 500 — VBSUV+ VBSUVVCCUV+ VCCUV- www.irf.com V mV IO = 0A IO = 0A VB = VS = 600V µA VIN = 0V or VDD V mA VO = 0V, VIN = VDD PW ≤ 10 µs VO = 15V, VIN = 0V PW ≤ 10 µs 3 IR2112(S) Functional Block Diagram VB UV DETECT VDD HV LEVEL SHIFT R Q S VDD /VCC LEVEL SHIFT HIN R R PULSE FILTER Q HO S PULSE GEN VS SD VCC UV DETECT VDD /VCC LEVEL SHIFT LIN S LO R Q DELAY COM VSS Lead Definitions Symbol Description VDD Logic supply HIN Logic input for high side gate driver output (HO), in phase SD Logic input for shutdown LIN Logic input for low side gate driver output (LO), in phase VSS Logic ground VB High side floating supply HO High side gate drive output VS High side floating supply return VCC Low side supply LO Low side gate drive output COM Low side return Lead Assignments 14 Lead DIP 16 Lead SOIC (Wide Body) IR2112 IR2112S Part Number 4 www.irf.com IR2112(S) <50 V/ns Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit 50% 50% HIN LIN ton tr toff 90% HO LO Figure 3. Switching Time Test Circuit 50% 90% 10% 10% Figure 4. Switching Time Waveform Definition HIN LIN SD tf 50% 50% LO HO tsd HO LO 10% 90% MT MT 90% LO Figure 5. Shutdown Waveform Definitions www.irf.com HO Figure 6. Delay Matching Waveform Definitions 5 IR2112(S) 250 Turn-On Delay Time (ns) Turn-On Delay Time (ns) 250 200 Max. 150 100 Typ. 50 150 100 Typ. 50 0 0 -50 -25 10 25 50 75 100 125 Temperature (°C) Figure 7A. Turn-On Time vs. Temperature 0 12 18 20 Turn-Off Delay Time (ns) 250 300 Max. 200 Typ. 100 200 Max. 150 100 Typ. 50 0 0 2 4 6 8 10 12 14 16 18 20 -50 -25 VDD Supply Voltage (V) 0 25 50 75 100 Figure 7C. Turn-On Time vs. VDD Supply Voltage Figure 8A. Turn-Off Time vs. Temperature 250 400 200 Max. 150 100 Typ. 50 0 10 12 14 16 125 Temperature (°C) 18 20 VC C /VB S Supply Voltage (V) Figure 8B. Turn-Off Time vs. VCC/VBS Supply Voltage Turn-OFF Delay Time (ns) Turn-Off Delay Time (ns) 16 Figure 7B. Turn-On Time vs. VCC/VBS Supply Voltage 0 6 14 VC C /VB S Supply Voltage (V) 400 Turn-On Delay Time (ns) Max . 200 300 Max. 200 100 Typ. 0 0 2 4 6 8 10 12 14 16 18 20 VDD Supply Voltage (V) Figure 8C. Turn-Off Time vs. VDD Supply Voltage www.irf.com IR2112(S) 200 Max. 150 100 Typ. 50 0 -50 -25 250 Shutdown Delay Time (ns) Shutdown Delay Time (ns) 250 0 25 50 75 100 200 Max. 150 100 Typ. 50 0 10 125 14 18 20 Figure 9B. Shutdown Delay Time vs. VCC/VBS Supply Voltage Figure 9A. Shutdown Time vs. Temperature 250 Turn-On rise Time (ns) 400 300 Max. 200 100 Typ. 200 150 Max. 100 50 Typ. 0 0 0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 VDD Supply Voltage (V) Figure 9C. Shutdown Time vs. VDD Supply Voltage 100 125 Turn-On Fall Time (ns) 125 200 Max. 150 100 Typ. 50 0 100 75 Max. 50 25 Typ. 0 10 12 14 16 18 VBIAS Supply Voltage (V) Figure 10B. Turn-On Rise Time vs. Voltage www.irf.com 25 50 75 Temperature (°C) Figure 10A. Turn-On Rise Time vs. Temperature 250 Turn-On Rise Time (ns) 16 VC C /VB S Supply Voltage (V) Temperature (°C) Shutdown Delay Time (ns) 12 20 -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 11A Turn-On Fall Time vs. Temperature 7 IR2112(S) 15 Logic "1" Input Threshold (V) Turn-Off Fall Time (ns) 125 100 Max. 75 50 Typ. 25 0 10 12 14 16 VBIAS Supply Voltage (V) 18 12 Min. 9 6 3 0 -50 0 75 100 125 15 Figure 12A. Logic “I” Input Threshold vs. Temperature Logic "0" Input Threshold (V) 12 9 9 Max. 6 3 0 3 6 Min. 12 0 5 7.5 10 12.5 15 17.5 20 -50 -25 0 25 50 75 100 125 Temperature (°C) VDD Logic Supply Voltage (V) Figure 13A. Logic “0” Input Threshold vs. Temperature 15 Figure 12B. Logic “I” Input Threshold vs. Voltage 6 9 12 High Level Output Voltage (V) 1 3 Max. 0 Logic " 0 " Input Treshold (V) 50 15 2.5 2.5 5 7.5 10 12.5 15 17.5 VDD Logic Supply Voltage (V) Figure 13B. Logic “0” Input Threshold vs. Voltage 8 25 Temperature (°C) Figure 11B. Turn-Off Fall Time vs. Voltage Logic " 1 " Input Treshold (V) -25 20 20 0.8 0.6 0.4 Max. 0.2 0 -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 14A. High Level Output vs. Temperature www.irf.com 1 1 Low Level Output Voltage (V) High Level Output Voltage (V) IR2112(S) 0.8 0.6 0.4 Max. 0.2 0.8 0.6 0.4 Max. 0.2 0 0 10 12 14 16 18 20 -50 -25 VBAIS Supply Votage (V) 0.6 0.4 Max. 0.2 0 16 18 20 Offset Supply Leakage Current (uA) Low Level Output Voltage (V) 0.8 14 75 100 125 500 400 300 200 Max. 100 0 -50 -25 0 25 50 75 100 125 Temperature (°C) VBIAS Supply Votage (V) Figure 15B. Low Level Output vs. Voltage Figure 16A. Offset Supply Current vs. Temperature 500 100 VBS Supply Current (uA) Offset Supply Leakage Current (uA) 50 Figure 15A. Low Level Output vs. Temperature 1 12 25 Temperature (°C) Figure 14B. High Level Output vs. Voltage 10 0 400 300 200 Max. 100 80 60 Max. 40 20 Typ. 0 0 0 100 200 300 400 500 600 VB Boost Voltage (v) Figure 16B. Offset Supply Current vs. Voltage www.irf.com -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 17A. VBS Supply Current vs. Temperature 9 IR2112(S) 300 Vcc Supply Current (uA) VBS Supply Current (uA) 100 80 Max. 60 40 Typ. 20 250 200 Max. 150 100 50 0 Typ. 0 10 12 14 16 18 -50 20 -25 0 VBS Floating Supply Voltage (V) 300 VDD Supply Current (uA) Vcc Supply Current (uA) 75 100 125 12 250 200 Max. 150 100 Typ. 50 10 Max. 8 6 Typ. 4 2 0 0 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 Temperature (°C) Vcc Fixed Supply Voltage (V) Figure 19A. VDD Supply Current vs. Temperature Figure 18B. VCC Supply Current vs. Voltage 100 Logic "1 " Input Bias Current (uA) 12 VDD Supply Current (uA) 50 Figure 18A. VCC Supply Current vs. Temperature Figure 17B. VBS Supply Current vs. Voltage 10 8 Max. 6 4 2 Typ. 0 0 2 4 6 8 10 12 14 16 VDD Logic Supply Voltage (V) 18 Figure 19B. VDD Supply Current vs. VDD Voltage 10 25 Temperature (°C) 20 80 60 Max. 40 20 Typ. 0 -50 -25 0 25 50 75 100 125 Temperature (°C) Figure 20A. Logic “I” Input Current vs. Temperature www.irf.com IR2112(S) 5 80 60 Max. 40 20 Typ. 0 0 2 4 6 8 10 12 14 16 18 20 VDD Logic Supply Voltage (V) Logic "0" Input Bias Current (uA) 5 4 3 2 Max. 1 0 0 2 4 6 8 4 3 2 Max. 1 0 -50 -25 0 50 75 100 125 Figure 21A. Logic “0” Input Current vs. Temperature 11 10 Max. 9 Typ. 8 Min. 7 6 -50 10 12 14 16 18 20 -25 0 25 50 75 100 125 Temperature (°C) VDD Supply Voltage (V) Figure 21B. Logic “0” Input Current vs. VDD Voltage Figure 22. VBS Undervoltage (+) vs. Temperature 11 11 10 Max. 9 Typ. 8 Min. 7 6 -50 -25 0 25 50 75 100 125 Vcc Undervoltage Lockout +(V) VBS Undervoltage Lockout -(V) 25 Temperature (°C) VBS Undervoltage Lockout +(V) Figure 20B. Logic “1” Input Current vs. VDD Voltage Logic "0" Input Bias Current (uA) Logic " 1" Input Bias Current (uA ) 100 10 Max. 9 Typ. 8 Min. 7 6 -50 -25 Temperature (°C) Figure 23. VBS Undervoltage (-) vs. Temperature www.irf.com Figure 24. VCC 0 25 50 75 100 125 Temperature (°C) Undervoltage (-) vs. Temperature 11 IR2112(S) 500 Output source Current (mA) VCC Undervoltage Lockout - (V) 11 10 Max. 9 Typ. 8 Min. 7 400 300 Typ. 200 Min. 100 0 6 -50 -25 0 25 50 75 100 -50 125 -25 Temperature (°C) 25 50 75 100 125 Temperature (°C) Figure 25. VCC Undervoltage (-) vs. Temperature Figure 26A. Output Source Current vs. Temperature 500 750 Output Sink Current (mA) Output source Current (mA) 0 400 Typ. 300 Min. 200 100 600 Typ. 450 300 Min. 150 0 10 12 14 16 18 20 0 -50 VBIAS Supply Voltage (V) -25 0 25 50 75 100 125 Temperature (°C) Figure 26B. Output Source Current vs. Voltage Figure 27A. Output Sink Current vs. Temperature Output Sink Current (mA) 750 600 Typ. 450 300 Min. 150 0 10 12 14 16 18 20 VBIAS Supply Voltage (V) Figure 27B. Output Sink Current vs. Voltage 12 www.irf.com IR2112(S) 150 150 320V 125 320V 100 75 140V 50 10V Junction Temperature (°C) Junction Temperature (°C) 125 25 140V 75 10V 50 25 0 1E+2 100 0 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 Frequency (Hz) 1E+4 1E+5 1E+6 Frequency (Hz) Figure 29. IR2112 TJ vs. Frequency (IRFBC30) RGATE = 22Ω, VCC = 15V Figure 28. IR2112 TJ vs. Frequency (IRFBC20) RGATE = 33Ω, VCC = 15V 320V 150 320V 140V 10V 150 125 125 100 10V 75 50 Junction Temperature (°C) Junction Temperature (°C) 140V 25 100 75 50 25 0 0 1E+2 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 Frequency (Hz) Figure 30. IR2112 TJ vs. Frequency (IRFBC40) RGATE = 15Ω, VCC = 15V 140V 125 100 140V 75 10V 50 25 Junction Temperature (°C) Junction Temperature (°C) 1E+6 320V 150 320V 125 100 75 10V 50 25 0 0 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Figure 32. IR2112S TJ vs. Frequency (IRFBC20) RGATE = 33Ω, VCC = 15V www.irf.com 1E+5 Figure 31. IR2112 TJ vs. Frequency (IRFPE50) RGATE = 10Ω, VCC = 15V 150 1E+2 1E+4 Frequency (Hz) 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Figure 33. IR2112S TJ vs. Frequency (IRFBC30) RGATE = 22Ω, VCC = 15V 13 IR2112(S) 320V 150 320V 140V 10V 150 140V 125 10V Junction Temperature (°C) Junction Temperature (°C) 125 100 75 50 25 100 75 50 25 0 0 1E+2 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 Frequency (Hz) 0.0 1E+6 20.0 VSS Logic Supply Offset Voltage (V) -3.0 VS Offset Supply Voltage (V) 1E+5 Figure 35. IR2112S TJ vs. Frequency (IRFPE50) RGATE = 10Ω, VCC = 15V Figure 34. IR2112S TJ vs. Frequency (IRFBC40) RGATE = 15Ω, VCC = 15V Typ. -6.0 -9.0 -12.0 -15.0 16.0 12.0 8.0 Typ. 4.0 0.0 10 12 14 16 18 VBS Floating Supply Voltage (V) Figure 36. Maximum VS Negative Offset vs. VBS Supply Voltage 14 1E+4 Frequency (Hz) 20 10 12 14 16 18 20 VCC Fixed Supply Voltage (V) Figure 37. Maximum VSS Positive Offset vs. VCC Supply Voltage www.irf.com IR2112(S) Case outline 14-Lead PDIP 16-Lead SOIC (wide body) 01-6010 01-3002 03 (MS-001AC) 01 6015 01-3014 03 (MS-013AA) 1/24/2002 www.irf.com 15