PHILIPS BS107

DISCRETE SEMICONDUCTORS
DATA SHEET
BS107
N-channel enhancement mode
vertical D-MOS transistor
Product specification
File under Discrete Semiconductors, SC13b
April 1995
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
FEATURES
QUICK REFERENCE DATA
• Direct interface to C-MOS, TTL,
etc.
• High-speed switching
• No secondary breakdown.
DESCRIPTION
N-channel enhancement mode
vertical D-MOS transistor in a TO-92
variant envelope. Intended for use as
a line current interruptor in telephone
sets and for applications in relay,
high-speed and line transformer
drivers.
SYMBOL
PARAMETER
source
2
gate
3
drain
UNIT
drain-source voltage (DC)
200
V
VGSth
gate-source threshold voltage
2.4
V
ID
drain current (DC)
150
mA
RDSon
drain-source on-state resistance
28
Ω
d
handbook, halfpage
1
2
3
g
MAM146
s
DESCRIPTION
1
April 1995
MAX.
VDS
PINNING - TO-92 variant
PIN
BS107
Fig.1 Simplified outline and symbol.
2
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BS107
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDS
drain-source voltage
−
200
V
±VGSO
gate-source voltage
open drain
−
20
V
ID
drain current
DC
−
150
mA
IDM
drain current
peak
−
300
mA
Ptot
total power dissipation
up to Tamb = 25 °C
−
830
mW
Tstg
storage temperature range
−65
150
°C
Tj
operating junction temperature
−
150
°C
THERMAL RESISTANCE
SYMBOL
Rth j-a
April 1995
PARAMETER
from junction to ambient
MAX.
150
3
UNIT
K/W
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BS107
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V(BR)DSS
drain-source breakdown
voltage
VGS = 0
ID = 10 µA
200
−
−
V
IDSS
drain-source leakage current
VDS = 130 V
VGS = 0
−
−
30
nA
IDSX
drain-source leakage current
VDS = 70 V
VGS = 0.2 V
−
−
1
µA
±IGSS
gate-source leakage current
±VGS = 15 V
VDS = 0
−
−
10
nA
VGS(th)
gate threshold voltage
ID = 1 mA
VDS = VGS
0.8
−
2.4
V
RDS(on)
drain-source on-resistance
ID = 20 mA
VGS = 2.6 V
−
20
28
Ω
RDS(on)
drain-source on-resistance
ID = 150 mA
VGS = 10 V
−
14
−
Ω
 Yfs 
transfer admittance
ID = 250 mA
VDS = 15 V
90
180
−
mS
Ciss
input capacitance
VDS = 10 V
VGS = 0
f = 1 MHz
−
50
65
pF
Coss
output capacitance
VDS = 10 V
VGS = 0
f = 1 MHz
−
16
25
pF
Crss
feedback capacitance
VDS = 10 V
VGS = 0
f = 1 MHz
−
4
10
pF
Switching times (see Figs 2 and 3)
ton
switching-on time
ID = 250 mA
VDD = 50 V
VGS = 0 to 10 V
−
2
10
ns
toff
switching-off time
ID = 250 mA
VDD = 50 V
VGS = 0 to 10 V
−
4
20
ns
April 1995
4
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
VDD = 50 V
handbook, halfpage
BS107
handbook, halfpage
90 %
INPUT
10 %
90 %
10 V
OUTPUT
ID
0V
50 Ω
10 %
MSA631
ton
toff
MBB692
Fig.2 Switching time test circuit.
Fig.3 Input and output waveforms.
MDA700
400
MDA701
400
handbook, halfpage
handbook, halfpage
ID
(mA)
ID
(mA)
300
300
VGS = 10 V
5V
4V
3V
200
200
100
100
0
0
0
4
8
12
VDS (V)
0
16
Fig.4 Typical output characteristics; Tj = 25 °C.
April 1995
Fig.5
5
1
2
3
VGS (V)
4
Typical transfer characteristic; VDS = 10 V;
Tj = 25 °C.
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BS107
MDA702
30
MDA703
60
handbook, halfpage
handbook, halfpage
RDSon
(Ω)
26
C
(pF)
4V
VGS = 3 V
5V
40
22
10 V
Ciss
18
20
14
Coss
Crss
10
1
Fig.6
102
10
ID (mA)
10
0
3
0
Typical on-resistance as a function of drain
current; Tj = 25 °C.
Fig.7
10
20
VDS (V)
Typical capacitances as a function of
drain-source voltage; VGS = 0; f = 1 MHz;
Tj = 25 °C.
MDA704
2.8
30
MDA705
1.2
handbook, halfpage
k
k
2.4
1.1
2
(1)
(2)
1
1.6
0.9
1.2
0.8
0.8
0.4
−50
0
50
100
Tj (°C)
0.7
−50
150
0
50
100
Tj (°C)
150
(1) ID = 150 mA; VGS = 10 V
(2) ID = 20 mA; VGS = 2.6 V
Fig.8
Fig.9
Temperature coefficient of drain-source
R DS ( on ) at T j
on-resistance; k = ---------------------------------------------- ;
R DS ( on ) at 25 °C
typical RDS(on) at 150 mA/10 V
April 1995
6
Temperature coefficient of gate-source
threshold voltage;
V GS ( th ) at T j
k = --------------------------------------------- ; typical VGS(th) at 1 mA.
V GS ( th ) at 25 °C
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
handbook,
MDA690
1
Ptot
(W)
0.8
0.6
0.4
0.2
0
0
50
100
150
200
Tamb (°C)
Fig.10 Power derating curve.
April 1995
7
BS107
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BS107
PACKAGE OUTLINE
Plastic single-ended leaded (through hole) package; 3 leads (on-circle)
SOT54 variant
c
L2
E
d
A
L
b
1
e1
2
e
D
3
b1
L1
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
b
b1
c
D
d
E
e
e1
L
L1(1)
max
L2
max
mm
5.2
5.0
0.48
0.40
0.66
0.56
0.45
0.40
4.8
4.4
1.7
1.4
4.2
3.6
2.54
1.27
14.5
12.7
2.5
2.5
Notes
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
OUTLINE
VERSION
SOT54 variant
April 1995
REFERENCES
IEC
JEDEC
EIAJ
TO-92
SC-43
8
EUROPEAN
PROJECTION
ISSUE DATE
97-04-14
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BS107
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
April 1995
9
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
NOTES
April 1995
10
BS107
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
NOTES
April 1995
11
BS107
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© Philips Electronics N.V. 1997
SCA54
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Printed in The Netherlands
137107/00/01/pp12
Date of release: April 1995
Document order number:
9397 750 02443