PHILIPS BST76A

DISCRETE SEMICONDUCTORS
DATA SHEET
BST76A
N-channel enhancement mode
vertical D-MOS transistor
Product specification
Supersedes data of April 1995
File under Discrete Semiconductors, SC13b
1997 Jun 20
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
FEATURES
PINNING - SOT54 (TO-92) variant
• Direct interface to C-MOS, TTL, etc.
PIN
SYMBOL
DESCRIPTION
• High-speed switching
1
s
source
• No secondary breakdown.
2
g
gate
3
d
drain
APPLICATIONS
• Line current interrupter in telephone sets
• Relay, high-speed and line transformer drivers.
d
handbook, halfpage
1
DESCRIPTION
2
3
g
N-channel enhancement mode vertical D-MOS transistor
in a SOT54 (TO-92) variant package.
s
MAM146
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
VDS
drain-source voltage (DC)
−
180
V
VDS(SM)
drain-source voltage
non-repetitive peak; tp ≤ 2 mS
−
200
V
VGSO
gate-source voltage (DC)
open drain
−
±20
V
ID
drain current (DC)
−
300
mA
Ptot
total power dissipation
Tamb ≤ 25 °C
−
1
W
RDSon
drain-source on-state resistance
ID = 15 mA; VGS = 3 V
7
10
Ω
yfs
forward transfer admittance
ID = 300 mA; VDS = 15 V
250
−
mS
1997 Jun 20
2
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDS
drain-source voltage (DC)
−
180
V
VDS(SM)
drain-source voltage
non-repetitive peak; tp ≤ 2 mS
−
200
V
VGSO
gate-source voltage (DC)
open drain
−
±20
V
ID
drain current (DC)
−
300
mA
IDM
peak drain current
−
800
mA
Ptot
total power dissipation
−
1
W
Tstg
storage temperature
−65
+150
°C
Tj
junction temperature
−
150
°C
Tamb ≤ 25 °C; note 1
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
CONDITIONS
thermal resistance from junction to ambient
VALUE
UNIT
125
K/W
note 1
Note to the Limiting values and Thermal characteristics
1. Device mounted on a printed-circuit board, maximum lead length 4 mm; mounting pad for drain lead minimum
10 mm × 10 mm.
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
V(BR)DSS
drain-source breakdown voltage
VGS = 0; ID = 100 µA
180
−
−
V
VGSth
gate-source threshold voltage
VDS = VGS ; ID = 100 µA
0.7
−
2.4
V
IDSS
drain-source leakage current
VDS = 120 V; VGS = 0
−
−
10
µA
IGSS
gate leakage current
VDS = 0; VGS = ±20 V
−
−
±100
nA
RDSon
drain-source on-state resistance
VGS = 3 V; ID = 15 mA
−
7
10
Ω
VGS = 10 V; ID = 300 mA
−
6
−
Ω
yfs
forward transfer admittance
ID = 300 mA; VDS = 15 V
−
250
−
mS
Ciss
input capacitance
VDS = 10 V; VGS = 0; f = 1 MHz
−
50
65
pF
Coss
output capacitance
VDS = 10 V; VGS = 0; f = 1 MHz
−
20
30
pF
Crss
reverse transfer capacitance
VDS = 10 V; VGS = 0; f = 1 MHz
−
6
10
pF
Switching times (see Figs 2 and 3)
ton
turn-on time
VGS = 0 to 10 V; VDS = 50 V;
ID = 300 mA
−
−
10
ns
toff
turn-off time
VGS = 10 to 0 V; VDS = 50 V;
ID = 300 mA
−
−
15
ns
1997 Jun 20
3
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
VDD = 50 V
handbook, halfpage
handbook, halfpage
90 %
INPUT
10 %
10 V
90 %
ID
0V
OUTPUT
50 Ω
10 %
MSA631
t on
Fig.2 Switching times test circuit.
t off
Fig.3 Input and output waveforms.
MDA168
120
handbook, halfpage
MLC697
1.2
MBB692
handbook, halfpage
C
(pF)
P tot
(W)
80
0.8
(1)
40
0.4
(2)
(3)
0
0
0
0
50
100
150
200
T amb ( oC)
20
VDS (V)
30
VGS = 0; f = 1 MHz; Tj = 25 °C.
(1) Ciss.
(2) Coss.
(3) Crss.
Fig.5
Fig.4 Power derating curve.
1997 Jun 20
10
4
Capacitance as a function of drain-source
voltage; typical values.
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
MDA164
1
MDA170
1
handbook, halfpage
handbook, halfpage
ID
(A)
0.8
(1)
ID
(A)
0.8
(2)
(3)
0.6
0.6
0.4
0.4
(4)
0.2
0.2
0
0
2
0
4
Tj = 25 °C.
(1) VGS = 10 V.
(2) VGS = 5 V.
6
8
10
VDS (V)
2
0
(3) VGS = 4 V.
(4) VGS = 3 V.
4
6
8
VDS = 10 V; Tj = 25 °C.
Fig.6 Output characteristics; typical values.
Fig.7 Transfer characteristic; typical values.
MDA169
103
handbook, halfpage
(1)
10
VGS (V)
MDA167
1.2
(2)
handbook, halfpage
(3)
k
ID
(mA)
1
102
0.8
10
4
6
8
10
0.6
−50
12
14
RDSon (Ω)
Tj = 25 °C.
50
100
Tj (oC)
150
V GSth at T j
k = ------------------------------------V GSth at 25°C
(1) VGS = 10 V.
(2) VGS = 5 V.
(3) VGS = 4 V.
VGSth at 0.1 mA.
Fig.8
Fig.9
Drain current as a function of drain-source
on-state resistance; typical values.
1997 Jun 20
0
5
Temperature coefficient of gate-source
threshold voltage; typical values.
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
MDA166
3
handbook, halfpage
k
2.5
(1)
2
(2)
1.5
1
0.5
−50
0
50
100
Tj (oC)
150
R DSon at T j
k = ---------------------------------------R DSon at 25 °C
(1) ID = 300 mA; VGS = 10 V.
(2) ID = 15 mA; VGS = 3 V.
Fig.10 Temperature coefficient of drain-source
on-state resistance; typical values.
1997 Jun 20
6
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
PACKAGE OUTLINE
Plastic single-ended leaded (through hole) package; 3 leads (on-circle)
SOT54 variant
c
L2
E
d
A
L
b
1
e1
2
e
D
3
b1
L1
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
b
b1
c
D
d
E
e
e1
L
L1(1)
max
L2
max
mm
5.2
5.0
0.48
0.40
0.66
0.56
0.45
0.40
4.8
4.4
1.7
1.4
4.2
3.6
2.54
1.27
14.5
12.7
2.5
2.5
Notes
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
OUTLINE
VERSION
SOT54 variant
1997 Jun 20
REFERENCES
IEC
JEDEC
EIAJ
TO-92
SC-43
7
EUROPEAN
PROJECTION
ISSUE DATE
97-04-14
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
DEFINITIONS
Data Sheet Status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1997 Jun 20
8
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
NOTES
1997 Jun 20
9
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
NOTES
1997 Jun 20
10
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BST76A
NOTES
1997 Jun 20
11
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© Philips Electronics N.V. 1997
SCA54
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Printed in The Netherlands
137107/00/02/pp12
Date of release: 1997 Jun 20
Document order number:
9397 750 02336