PHILIPS BSP107

DISCRETE SEMICONDUCTORS
DATA SHEET
BSP107
N-channel enhancement mode
vertical D-MOS transistor
Product specification
File under Discrete Semiconductors, SC13b
April 1995
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
FEATURES
BSP107
QUICK REFERENCE DATA
• Direct interface to C-MOS, TTL,
etc. due to low threshold voltage
• High-speed switching
• No secondary breakdown.
DESCRIPTION
N-channel enhancement mode
vertical D-MOS transistor in a
miniature SOT223 envelope.
Intended for use as a line current
interruptor in telephone sets and for
applications in relay, high-speed and
line transformer driver switching.
SYMBOL
PARAMETER
MAX.
VDS
drain-source voltage (DC)
200
V
VGS(th)
gate-source threshold voltage
2.4
V
ID
drain current (DC)
200
mA
RDS(on)
drain-source on-state resistance
28
Ω
d
4
handbook, halfpage
g
PINNING - SOT223
PIN
1
DESCRIPTION
1
gate
2
drain
3
source
4
drain
Top view
2
s
3
MAM054
Fig.1 Simplified outline and symbol.
April 1995
UNIT
2
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BSP107
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDS
drain-source voltage
−
200
V
±VGSO
gate-source voltage
open drain
−
20
V
ID
drain current
DC
−
200
IDM
drain current
peak
−
350
Ptot
total power dissipation
up to Tamb = 25 °C
−
Tstg
storage temperature range
Tj
operating junction temperature
1.5
mA
mA
W
−65
150
°C
−
150
°C
THERMAL RESISTANCE
SYMBOL
Rth j-a
PARAMETER
VALUE
from junction to ambient (note 1)
83.3
UNIT
K/W
Note
1. Device mounted on an epoxy printed circuit board, 40 mm × 40 mm × 1.5 mm. Mounting pad for the drain lead
minimum 6 cm2.
April 1995
3
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BSP107
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
V(BR)DSS
PARAMETER
drain-source breakdown voltage
CONDITIONS
VGS = 0
ID = 10 µA
MIN.
TYP.
MAX.
UNIT
200
−
−
V
IDSS
drain-source leakage current
VDS = 130 V
VGS = 0
−
−
30
nA
IDSX
drain-source leakage current
VDS = 70 V
VGS = 0.2 V
−
−
1
µA
10
nA
±IGSS
gate-source leakage current
± VGS = 15 V
VDS = 0
−
−
VGS(th)
gate threshold voltage
ID =1 mA
VDS = VGS
0.8
−
ID = 20 mA
VGS = 2.6 V
−
20
28
Ω
RDS(on)
drain-source on-resistance
2.4
V
RDS(on)
drain-source on-resistance
ID = 150 mA
VGS = 10 V
−
14
−
Ω
| Yfs|
transfer admittance
ID = 250 mA
VDS = 15 V
90
180
−
mS
VDS = 10 V
VGS = 0
f = 1 MHz
−
50
65
pF
Ciss
input capacitance
Coss
output capacitance
VDS = 10 V
VGS = 0
f = 1 MHz
−
16
25
pF
Crss
feedback capacitance
VDS = 10 V
VGS = 0
f = 1 MHz
−
4
10
pF
ID = 250 mA
VDD = 50 V
VGS = 0 − 10 V
−
2
10
ns
ID = 250 mA
VDD = 50 V
VGS = 0 − 10 V
−
5
20
ns
Switching times (see Figs 2 and 3)
ton
toff
April 1995
switching-on time
switching-off time
4
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
VDD = 50 V
handbook, halfpage
BSP107
handbook, halfpage
90 %
INPUT
10 %
90 %
10 V
OUTPUT
ID
0V
50 Ω
10 %
MSA631
ton
toff
MBB692
Fig.2 Switching time test circuit.
Fig.3 Input and output waveforms.
MDA700
400
MDA701
400
handbook, halfpage
handbook, halfpage
ID
(mA)
ID
(mA)
300
300
VGS = 10 V
5V
4V
3V
200
200
100
100
0
0
0
4
8
12
VDS (V)
16
0
Fig.4 Typical output characteristics; Tj = 25° C.
April 1995
Fig.5
5
1
2
3
VGS (V)
4
Typical transfer characteristics; VDS = 10 V;
Tj = 25° C.
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
MDA702
BSP107
MDA703
60
30
handbook, halfpage
handbook, halfpage
RDSon
(Ω)
26
VGS = 3 V
4V
C
(pF)
5V
40
22
10 V
Ciss
18
20
14
Coss
Crss
0
10
1
Fig.6
102
10
ID (mA)
10
3
0
Typical on-resistance as a function of drain
current; Tj = 25° C.
Fig.7
10
20
VDS (V)
30
Typical capacitances as a function of
drain-source voltage; VGS = 0; f = 1 MHz;
Tj = 25° C
handbook, half age
MDA704
2.8
MDA705
1.2
handbook, halfpage
k
k
2.4
1.1
2
(1)
(2)
1
1.6
0.9
1.2
0.8
0.8
0.4
−50
0
50
100
Tj (°C)
0.7
−50
150
0
50
100
Tj (°C)
150
(1) ID = 150 mA; VGS = 10 V;
(2) ID = 20 mA; VGS = 2.6 V
Fig.8
Temperature coefficient of drain-source on
resistance;
R DS(on) at T j
k = --------------------------------------------- ;
R DS(on) at 25 °C
Fig.9
typical RDS(on) at 150 mA/10 V;
April 1995
Temperature coefficient of gate-source
threshold voltage;
V GS(th) at T j
k = ---------------------------------------- ;
V GS(th) at 25 °C
typical VGS(th) at 1 mA.
6
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
handbook,
MDA690
1
Ptot
(W)
0.8
0.6
0.4
0.2
0
0
50
100
150
200
Tamb (°C)
Fig.10 Power derating curve.
April 1995
7
BSP107
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BSP107
PACKAGE OUTLINE
Plastic surface mounted package; collector pad for good heat transfer; 4 leads
D
SOT223
E
B
A
X
c
y
HE
v M A
b1
4
Q
A
A1
1
2
3
Lp
bp
e1
w M B
detail X
e
0
2
4 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
bp
b1
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.8
1.5
0.10
0.01
0.80
0.60
3.1
2.9
0.32
0.22
6.7
6.3
3.7
3.3
4.6
2.3
7.3
6.7
1.1
0.7
0.95
0.85
0.2
0.1
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
96-11-11
97-02-28
SOT223
April 1995
EUROPEAN
PROJECTION
8
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BSP107
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
April 1995
9
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
NOTES
April 1995
10
BSP107
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
NOTES
April 1995
11
BSP107
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© Philips Electronics N.V. 1997
SCA54
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137107/00/01/pp12
Date of release: April 1995
Document order number:
9397 750 02467