PHILIPS PH5330

PH5330
N-channel enhancement mode field-effect transistor
M3D748
Rev. 02 — 18 July 2003
Product data
1. Description
N-channel enhancement mode field-effect power transistor in a SOT669 (LFPAK)
package.
Product availability:
PH5330 in SOT669 (LFPAK).
2. Features
■
■
■
■
Logic level compatible
Low drive current
High-density mounting
Very low on-state resistance.
3. Applications
■ DC-to-DC converters
■ Computer motherboards
■ Switched mode power supplies.
4. Pinning information
Table 1:
Pinning - SOT669 (LFPAK), simplified outline and symbol
Pin
Description
1,2,3
source (s)
4
gate (g)
5
drain (d)
Simplified outline
Symbol
mb
d
g
1
2
Top view
3
4
MBL286
SOT669 (LFPAK)
MBB076
s
PH5330
Philips Semiconductors
N-channel enhancement mode field-effect transistor
5. Quick reference data
Table 2:
Quick reference data
Symbol Parameter
Conditions
Typ
Max
Unit
VDS
drain-source voltage (DC)
Tj = 25 °C
-
30
V
ID
drain current (DC)
Tmb = 25 °C; VGS = 10 V
-
50
A
Tmb = 25 °C
-
39
W
-
150
°C
VGS = 10 V; ID = 20 A; Tj = 25 °C
4.6
5.3
mΩ
VGS = 4.5 V; ID = 20 A; Tj = 25 °C
8.0
10
mΩ
Min
Max
Unit
Ptot
total power dissipation
Tj
junction temperature
RDSon
drain-source on-state resistance
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
VDS
drain-source voltage (DC)
VGS
gate-source voltage (DC)
ID
drain current (DC)
IDM
Conditions
Tj = 25 to 150 °C
-
30
V
-
±20
V
Tmb = 25 °C; VGS = 10 V; Figure 2 and 3
-
50
A
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3
-
160
A
Tmb = 25 °C; Figure 1
Ptot
total power dissipation
-
39
W
Tstg
storage temperature
−55
+150
°C
Tj
operating junction temperature
−55
+150
°C
-
50
A
Source-drain diode
ISM
peak source (diode forward) current Tmb = 25 °C; pulsed; tp ≤ 10 µs
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10951
Product data
Rev. 02 — 18 July 2003
2 of 12
PH5330
Philips Semiconductors
N-channel enhancement mode field-effect transistor
03ag87
120
03ah31
120
Ider
(%)
Pder
(%)
80
80
40
40
0
0
0
50
100
150
0
200
Tmb (°C)
50
100
150
200
Tmb (ºC)
VGS ≥ 10 V
P tot
P der = ---------------------- × 100%
P
°
ID
I der = ------------------- × 100%
I
°
tot ( 25 C )
D ( 25 C )
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Normalized continuous drain current as a
function of mounting base temperature.
03ag88
103
ID
(A)
RDSon = VDS / ID
102
tp = 10 µs
100 µs
10
DC
1 ms
10 ms
100 ms
1
10-1
1
10
VDS (V)
102
Tmb = 25 °C; IDM is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10951
Product data
Rev. 02 — 18 July 2003
3 of 12
PH5330
Philips Semiconductors
N-channel enhancement mode field-effect transistor
7. Thermal characteristics
Table 4:
Thermal characteristics
Symbol Parameter
Conditions
Min Typ Max Unit
thermal resistance from junction to mounting base Figure 4
Rth(j-mb)
-
-
3.2
K/W
7.1 Transient thermal impedance
03ag86
10
Zth(j-mb)
(K/W)
δ = 0.5
1
0.2
0.1
0.05
10-1
0.02
δ=
P
tp
T
single pulse
t
tp
T
10-2
10-5
10-4
10-3
10-2
10-1
1
tp (s)
10
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10951
Product data
Rev. 02 — 18 July 2003
4 of 12
PH5330
Philips Semiconductors
N-channel enhancement mode field-effect transistor
8. Characteristics
Table 5: Characteristics
Tj = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
ID = 10 mA; VGS = 0 V
30
-
-
V
Static characteristics
V(BR)DSS drain-source breakdown voltage
VGS(th)
gate-source threshold voltage
ID = 1 mA; VDS = VGS; Figure 9
1
1.9
2.5
V
IDSS
drain-source leakage current
VDS = 30 V; VGS = 0 V; Tj = 25 °C
-
0.06
1
µA
IGSS
gate-source leakage current
VGS = ± 16 V; VDS = 0 V
-
0.9
10
µA
RDSon
drain-source on-state resistance
VGS = 10 V; ID = 20 A; Figure 7 and 8
-
4.6
5.3
mΩ
VGS = 4.5 V; ID = 20 A; Figure 8
-
8.0
10
mΩ
Dynamic characteristics
gfs
forward transconductance
VDS = 10 V; ID = 20 A; Figure 11
30
50
-
S
Qg(tot)
total gate charge
ID = 40 A; VDD = 10 V; VGS = 10 V; Figure 14
-
40
-
nC
Qgs
gate-source charge
-
7
-
nC
Qgd
gate-drain (Miller) charge
-
8
-
nC
Ciss
input capacitance
-
2200 -
pF
Coss
output capacitance
-
600
pF
Crss
reverse transfer capacitance
td(on)
turn-on delay time
tr
VGS = 0 V; VDS = 10 V; f = 1 MHz; Figure 12
-
-
330
-
pF
-
20
-
ns
rise time
-
62
-
ns
td(off)
turn-off delay time
-
59
-
ns
tf
fall time
-
18
-
ns
-
0.85
1.11
V
-
60
-
ns
VDD = 10 V; ID = 20 A; VGS = 10 V; RG = 4.7 Ω
Source-drain (reverse) diode
VSD
source-drain (diode forward) voltage IS = 40 A; VGS = 0 V; Figure 13
trr
reverse recovery time
IS = 40 A; dIS/dt = −50 A/µs; VGS = 0 V
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10951
Product data
Rev. 02 — 18 July 2003
5 of 12
PH5330
Philips Semiconductors
N-channel enhancement mode field-effect transistor
03ag89
80
ID
(A)
03ag90
80
10 V
ID
(A)
4.5 V
60
VDS > ID x RDSon
60
4V
3.5 V
40
40
20
20
VGS = 3 V
150 ºC
0
Tj = 25 ºC
0
0
1
2
3
4 V
5
DS (V)
0
Tj = 25 °C
1
2
3 V
GS (V) 4
Tj = 25 °C and 150 °C; VDS > ID × RDSon
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values.
Fig 6. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
03ag95
0.03
3V
03ah32
1.8
VGS = 3.5 V
RDSon
a
(Ω)
0.02
1.2
0.01
0.6
4V
4.5 V
10 V
0
0
0
20
40
ID (A)
60
Tj = 25 °C
-80
-20
40
100 T (°C) 160
j
R DSon
a = --------------------------R
°
DSon ( 25 C )
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values.
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10951
Product data
Rev. 02 — 18 July 2003
6 of 12
PH5330
Philips Semiconductors
N-channel enhancement mode field-effect transistor
03ah33
3
VGS(th)
max
(V)
2
03ah30
10-1
ID
(A)
10-2
typ
10-3
10-4
min.
typ.
max.
min
1
10-5
10-6
0
-80
-20
40
100
160
0
1
2
Tj (°C)
VGS (V)
3
Tj = 25 °C
ID = 1 mA; VDS = VGS
Fig 9. Gate-source threshold voltage as a function of
junction temperature.
03ag91
80
Fig 10. Sub-threshold drain current as a function of
gate-source voltage.
03ag93
104
VDS > ID x RDSon
gfs
(S)
C
(pF)
Tj = 25 ºC
60
Ciss
150 ºC
103
40
Coss
20
Crss
0
0
20
40
60
ID (A)
80
Tj = 25 °C and 150 °C; VDS > ID × RDSon
102
10-1
10
VDS (V)
102
VGS = 0 V; f = 1 MHz
Fig 11. Forward transconductance as a function of
drain current; typical values.
Fig 12. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10951
Product data
1
Rev. 02 — 18 July 2003
7 of 12
PH5330
Philips Semiconductors
N-channel enhancement mode field-effect transistor
03ag92
100
IS
(A)
80
03ag94
10
VDD = 10 V
VGS
(V)
8
VGS = 0 V
ID = 40 A
Tj = 25 ºC
60
6
40
150 ºC
4
Tj = 25 ºC
20
2
0
0
0
0.4
0.8
1.2 V
1.6
SD (V)
Tj = 25 °C and 150 °C; VGS = 0 V
0
20
30 Q (nC) 40
G
Tj = 25 °C; ID = 40 A; VDD = 10 V
Fig 13. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values.
Fig 14. Gate-source voltage as a function of gate
charge; typical values.
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10951
Product data
10
Rev. 02 — 18 July 2003
8 of 12
PH5330
Philips Semiconductors
N-channel enhancement mode field-effect transistor
9. Package outline
Plastic single-ended surface mounted package (Philips version LFPAK); 4 leads
A2
A
E
SOT669
C
c2
b2
L1
E1
mounting
base
D1
D
H
L2
1
2
3
4
X
e
w M A
b
c
1/2 e
A
(A 3)
A1
C
θ
L
detail X
0
2.5
y C
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
A2
A3
b
b2
c
c2
D(1)
D1(1)
max
E(1)
E1(1)
e
H
L
L1
L2
w
y
θ
mm
1.20
1.01
0.15
0.00
1.10
0.95
0.25
0.50
0.35
4.41
3.62
0.25
0.19
0.30
0.24
4.10
3.80
4.20
5.0
4.8
3.3
3.1
1.27
6.2
5.8
0.85
0.40
1.3
0.8
1.3
0.8
0.25
0.1
8°
0°
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
OUTLINE
VERSION
SOT669
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
02-07-10
03-02-05
MO-235
Fig 15. SOT669 (LFPAK).
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10951
Product data
Rev. 02 — 18 July 2003
9 of 12
PH5330
Philips Semiconductors
N-channel enhancement mode field-effect transistor
10. Revision history
Table 6:
Revision history
Rev Date
02
20030718
CPCN
Description
-
Product data (9397 750 10951)
Modifications:
•
01
20020207
-
JEDEC reference added to package outline drawing in Figure 15
Product data (9397 750 09391)
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10951
Product data
Rev. 02 — 18 July 2003
10 of 12
PH5330
Philips Semiconductors
N-channel enhancement mode field-effect transistor
11. Data sheet status
Level
Data sheet status[1]
Product status[2][3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
[2]
[3]
Please consult the most recently issued data sheet before initiating or completing a design.
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
12. Definitions
13. Disclaimers
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Contact information
For additional information, please visit http://www.semiconductors.philips.com.
For sales office addresses, send e-mail to: [email protected].
Product data
Fax: +31 40 27 24825
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
9397 750 10951
Rev. 02 — 18 July 2003
11 of 12
Philips Semiconductors
PH5330
N-channel enhancement mode field-effect transistor
Contents
1
2
3
4
5
6
7
7.1
8
9
10
11
12
13
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Transient thermal impedance . . . . . . . . . . . . . . 4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
© Koninklijke Philips Electronics N.V. 2003.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 18 July 2003
Document order number: 9397 750 10951