Multi Line Sensor Heads for Card-compatible LSH2002-AA10A ROHM’s LSH2002-AA10A multi line sensor head utilizes a special ceramic substrate featuring superior dimensional precision and thermal dissipation characteristics, resulting in stable reading, even under fluctuating ambient temperature conditions. A unique prism, developed using the latest in optical technology, ensures simultaneous uniform light output and low light radiation to the media. In addition, bidirectional reading capability enables greater flexibility regarding carrier orientation. zApplications Image scanners (i.e. business card), detection sets (e.g. surface, paper edge, paper type) zFeatures 1）25in/s (635mm/s) read speed (monochrome) 2）Bidirectional reading capability 3）54mm read width (70mm total width) 4）Color light source (switchable) zDimensions (Unit : mm) 10.42 2.5 5.5 (Depth1) 12.5 17.5 5.5 70 54(Effective Scanning Width) Max.2.3 15.5 25 No.9 Max.13.25 Max.1.5 35 No.1 Pin No. No.1 No.2 No.3 No.4 No.5 No.6 (NOTE 1) Deflection at the top of glass:0-0.25 Projection to platen is positive. (NOTE 2) Socket Housing:IL-Z-9S-S125C3(JAE) Socket Contact:IL-Z-C3-A-15000(JAE) www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 1/3 Signal CLK SP VDD GND AO RLED Pin No. Signal No.7 No.8 No.9 GLED BLED VLED 2009.11 - Rev.A LSH2002-AA10A Data Sheet zCharacteristics Parameter Symbol Typ. Unit Effective scanning width − 54 mm Primary scan dot density − 200 dpi − 432 dots VDD 3.3 V Scanning speed SLT 0.2×3 ms / line Clock frequency CLK 4 MHz Total dot number Power supply voltage Maximum dynamic range (VDD=5V) VRMax. 0.5 V Minimum dynamic range (VDD=5V) VRMin. 0.25 V Maximum dynamic range (VDD=3.3V) VRMax. 0.4 V Minimum dynamic range (VDD=3.3V) VRMin. 0.2 V Dark output (VDD=5V) Vod 1.2±0.4 V Dark output (VDD=3.3V) Vod 0.8±0.4 V Operating temperature − 5 to 45 °C zPin assignments No. Circuit I/O 1 CLK I Clock 2 SP I Start Pulse 3 VDD I Power Supply 4 GND I Ground 5 Ao O Analog Output 6 RLED I LED ground 7 GLED I LED ground 8 BLED I LED ground 9 VLED I LED power supply Functions zTiming chart (a) CLK Timing Chart 1/fCLK twCLK 50% twCLK 50% 50% CLK ts SP 50% 50% tSETUP tHOLD Ao 1pixel www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 2/3 2pixel 2009.11 - Rev.A LSH2002-AA10A Data Sheet (b) Data Output Timing Chart After turning on the SP pulse, the analog output shape starts from the setting up point of 65 clock pulse. 1 2 52 53 54 64 65 66 CLK SP Ao VREF Output Period (52pixels) Vdummy 1 to 52 pixels Analog Output Period 53 to 64pixels 1 to 432pixels Note) Output blank part cannot be used as the analog output standard level. zInner circuit VDD 1µF x 2 200Ω 432 1 GND 1µF SP VDD ANALOG MEMORY CIRCUIT 75Ω CLK Vout VREF 1µF VLED RGND GGND BGND zPeripheral circuit 8 7 6 9 5 3 2 1 4 C2 R2 R1 C1 B G R VDD C3 SP CLK C4 LED GND VLED A GND ∗ R1=R2=100Ω C1=47µF, C2=100pF C3=100µF, C4=0.1µF ∗ Please adjust the value of resistance to fit your interface circuit. www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 3/3 2009.11 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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