74HC137 3-to-8 line decoder, demultiplexer with address latches; inverting Rev. 03 — 11 November 2004 Product data sheet 1. General description The 74HC137 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC137 is specified in compliance with JEDEC standard no. 7A. The 74HC137 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An). The 74HC137 essentially combines the 3-to-8 decoder function with a 3-bit storage latch. When the latch is enabled (LE = LOW), the 74HC137 acts as a 3-to-8 active LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long as LE remains HIGH. The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH. The 74HC137 is ideally suited for implementing non-overlapping decoders in 3-state systems and strobed (stored address) applications in bus oriented systems. 2. Features ■ ■ ■ ■ ■ ■ Combines 3-to-8 decoder with 3-bit latch Multiple input enable for easy expansion or independent controls Active LOW mutually exclusive outputs Low-power dissipation Complies with JEDEC standard no. 7A ESD protection: ◆ HBM EIA/JESD22-A114-B exceeds 2000 V ◆ MM EIA/JESD22-A115-A exceeds 200 V. ■ Multiple package options ■ Specified from −40 °C to +80 °C and from −40 °C to +125 °C. 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns. Symbol Parameter Conditions tPHL, tPLH propagation delay CL = 15 pF; VCC = 5 V Typ Max Unit An to Yn - 18 - ns LE to Yn - 17 - ns E1 to Yn - 15 - ns E2 to Yn - 15 - ns CI input capacitance CPD power dissipation capacitance [1] Min VI = GND to VCC [1] - 3.5 - pF - 57 - pF CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs. 4. Ordering information Table 2: Ordering information Type number Package Temperature range Name Description Version 74HC137N −40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4 74HC137D −40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HC137DB −40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 9397 750 13804 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 2 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting 5. Functional diagram 4 LE Y0 15 Y1 14 Y2 13 1 A0 Y3 12 2 A1 INPUT LATCHES 3 A2 3 TO 8 DECODER Y4 11 Y5 10 Y6 9 Y7 7 5 E1 6 E2 001aab881 Fig 1. Functional diagram DX 4 1 C8 1 0 0 8D,G 7 2 3 4 0 3 2 LE 4 Y0 Y1 1 2 3 Y2 A0 A1 2 Y3 3 TO 8 DECODER Y4 INPUT LATCHES A2 Y5 Y6 Y7 15 5 14 5 13 6 6 7 14 13 12 11 10 9 7 12 11 10 X/Y 9 4 7 1 2 3 E1 5 6 & 15 C8 0 8D,1 1 8D,2 2 8D,4 3 4 001aab879 5 E2 5 & 6 6 7 15 14 13 12 11 10 9 7 EN 001aab880 Fig 2. Logic symbol 9397 750 13804 Product data sheet Fig 3. IEC logic symbol © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 3 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting A0 A0 LATCH LE Y0 A0 LE Y1 A1 A1 LATCH LE A1 LE Y2 A2 A2 LATCH LE Y3 A2 LE Y4 LE Y5 Y6 Y7 E1 001aab882 E2 Fig 4. Logic diagram 6. Pinning information 6.1 Pinning A0 1 16 VCC A1 2 15 Y0 A2 3 14 Y1 LE 4 13 Y2 137 E1 5 12 Y3 E2 6 11 Y4 Y7 7 10 Y5 GND 8 9 Y6 001aab878 Fig 5. Pin configuration 9397 750 13804 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 4 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting 6.2 Pin description Table 3: Pin description Symbol Pin Description A0 1 data input 0 A1 2 data input 1 A2 3 data input 2 LE 4 latch enable input (active LOW) E1 5 data enable input 1 (active LOW) E2 6 data enable input 2 (active HIGH) Y7 7 multiplexer output 7 GND 8 ground (0 V) Y6 9 multiplexer output 6 Y5 10 multiplexer output 5 Y4 11 multiplexer output 4 Y3 12 multiplexer output 3 Y2 13 multiplexer output 2 Y1 14 multiplexer output 1 Y0 15 multiplexer output 0 VCC 16 positive supply voltage 7. Functional description 7.1 Function table Table 4: Function table [1] Enable Input Output LE E1 E2 A0 A1 A2 Y0 H L H X X X stable X H X X X X X X L X X X L L H [1] Y1 Y2 Y3 Y4 Y5 Y6 Y7 H H H H H H H H H H H H H H H H L L L L H H H H H H H H L L H L H H H H H H L H L H H L H H H H H H H L H H H L H H H H L L H H H H H L H H H H L H H H H H H L H H L H H H H H H H H L H H H H H H H H H H H L H = HIGH voltage level; L = LOW voltage level; X = don’t care. 9397 750 13804 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 5 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting 8. Limiting values Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage IIK input diode current VI < −0.5 V or VI > VCC + 0.5 V −0.5 +7 V - ±20 mA IOK output diode current VO < −0.5 V or VO > VCC + 0.5 V - ±20 mA IO output source or sink current VO = −0.5 V to VCC + 0.5 V - ±25 mA ICC, IGND VCC or GND current - ±50 mA Tstg storage temperature −65 +150 °C Ptot power dissipation DIP16 package [1] - 750 mW SO16 and SSOP16 packages [2] - 500 mW [1] Above 70 °C: Ptot derates linearly with 12 mW/K. [2] Above 70 °C: Ptot derates linearly with 8 mW/K. 9. Recommended operating conditions Table 6: Recommended operating conditions Symbol Parameter Conditions Typ Max Unit VCC supply voltage 2.0 5.0 6.0 V VI input voltage 0 - VCC V VO output voltage 0 - VCC V tr, tf input rise and fall times VCC = 2.0 V - - 1000 ns VCC = 4.5 V - 6.0 500 ns VCC = 6.0 V - - 400 ns −40 - +125 °C Tamb ambient temperature 9397 750 13804 Product data sheet Min © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 6 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting 10. Static characteristics Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit Tamb = 25 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VCC = 2.0 V 1.5 1.2 - V VCC = 4.5 V 3.15 2.4 - V VCC = 6.0 V 4.2 3.2 - V VCC = 2.0 V - 0.8 0.5 V VCC = 4.5 V - 2.1 1.35 V VCC = 6.0 V - 2.8 1.8 V IO = −20 µA; VCC = 2.0 V 1.9 2.0 - V IO = −20 µA; VCC = 4.5 V 4.4 4.5 - V IO = −20 µA; VCC = 6.0 V 5.9 6.0 - V IO = −4 mA; VCC = 4.5 V 3.98 4.32 - V IO = −5.2 mA; VCC = 6.0 V 5.48 5.81 - V IO = 20 µA; VCC = 2.0 V - 0 0.1 V IO = 20 µA; VCC = 4.5 V - 0 0.1 V IO = 20 µA; VCC = 6.0 V - 0 0.1 V IO = 4 mA; VCC = 4.5 V - 0.15 0.26 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 V VI = VIH or VIL VI = VIH or VIL ILI input leakage current VI = VCC or GND; VCC = 6.0 V - - ±0.1 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 µA CI input capacitance - 3.5 - pF VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V IO = −20 µA; VCC = 2.0 V 1.9 - - V IO = −20 µA; VCC = 4.5 V 4.4 - - V IO = −20 µA; VCC = 6.0 V 5.9 - - V IO = −4 mA; VCC = 4.5 V 3.84 - - V IO = −5.2 mA; VCC = 6.0 V 5.34 - - V Tamb = −40 °C to +85 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL 9397 750 13804 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 7 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting Table 7: Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VOL LOW-level output voltage VI = VIH or VIL IO = 20 µA; VCC = 2.0 V - - 0.1 V IO = 20 µA; VCC = 4.5 V - - 0.1 V IO = 20 µA; VCC = 6.0 V - - 0.1 V IO = 4 mA; VCC = 4.5 V - - 0.33 V IO = 5.2 mA; VCC = 6.0 V - - 0.33 V ILI input leakage current VI = VCC or GND; VCC = 6.0 V - - ±1.0 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 80 µA Tamb = −40 °C to +125 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V VI = VIH or VIL - IO = −20 µA; VCC = 2.0 V 1.9 - - V IO = −20 µA; VCC = 4.5 V 4.4 - - V IO = −20 µA; VCC = 6.0 V 5.9 - - V IO = −4 mA; VCC = 4.5 V 3.7 - - V IO = −5.2 mA; VCC = 6.0 V 5.2 - - V IO = 20 µA; VCC = 2.0 V - - 0.1 V IO = 20 µA; VCC = 4.5 V - - 0.1 V IO = 20 µA; VCC = 6.0 V - - 0.1 V IO = 4 mA; VCC = 4.5 V - - 0.4 V IO = 5.2 mA; VCC = 6.0 V - - 0.4 V VI = VIH or VIL - ILI input leakage current VI = VCC or GND; VCC = 6.0 V - - ±1.0 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 160 µA 9397 750 13804 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 8 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting 11. Dynamic characteristics Table 8: Dynamic characteristics GND = 0 V; tr = tf = 6 ns; CL = 50 pF. Symbol Parameter Conditions Min Typ Max Unit VCC = 2.0 V - 58 180 ns VCC = 4.5 V - 21 36 ns VCC = 6.0 V - 17 31 ns VCC = 5.0 V; CL = 15 pF - 18 - ns VCC = 2.0 V - 55 190 ns VCC = 4.5 V - 20 38 ns Tamb = 25 °C tPHL, tPLH propagation delay An to Yn propagation delay LE to Yn propagation delay E1 to Yn propagation delay E2 to Yn tTHL, tTLH tW tsu th output transition time LE pulse width HIGH set-up time An to LE hold time An to LE see Figure 6 see Figure 7 VCC = 6.0 V - 16 32 ns VCC = 5.0 V; CL = 15 pF - 17 - ns VCC = 2.0 V - 50 145 ns VCC = 4.5 V - 18 29 ns VCC = 6.0 V - 14 25 ns VCC = 5.0 V; CL = 15 pF - 15 - ns see Figure 7 see Figure 6 VCC = 2.0 V - 50 145 ns VCC = 4.5 V - 18 29 ns VCC = 6.0 V - 14 25 ns VCC = 5.0 V; CL = 15 pF - 15 - ns VCC = 2.0 V - 19 75 ns VCC = 4.5 V - 7 15 ns VCC = 6.0 V - 6 13 ns VCC = 2.0 V 50 11 - ns VCC = 4.5 V 10 4 - ns VCC = 6.0 V 9 3 - ns VCC = 2.0 V 50 3 - ns VCC = 4.5 V 10 1 - ns VCC = 6.0 V 9 1 - ns VCC = 2.0 V 30 3 - ns VCC = 4.5 V 6 1 - ns 5 1 - ns - 57 - pF see Figure 6 see Figure 8 see Figure 8 see Figure 8 VCC = 6.0 V CPD power dissipation capacitance VI = GND to VCC 9397 750 13804 Product data sheet [1] © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 9 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting Table 8: Dynamic characteristics …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF. Symbol Parameter Conditions Min Typ Max Unit Tamb = −40 °C to +85 °C tPHL, tPLH propagation delay An to Yn propagation delay LE to Yn propagation delay E1 to Yn propagation delay E2 to Yn tTHL, tTLH tW tsu th output transition time LE pulse width HIGH set-up time An to LE hold time An to LE see Figure 6 VCC = 2.0 V - - 225 ns VCC = 4.5 V - - 45 ns VCC = 6.0 V - - 38 ns see Figure 7 VCC = 2.0 V - - 240 ns VCC = 4.5 V - - 48 ns VCC = 6.0 V - - 41 ns see Figure 7 VCC = 2.0 V - - 180 ns VCC = 4.5 V - - 36 ns VCC = 6.0 V - - 31 ns see Figure 6 VCC = 2.0 V - - 180 ns VCC = 4.5 V - - 36 ns VCC = 6.0 V - - 31 ns see Figure 6 VCC = 2.0 V - - 95 ns VCC = 4.5 V - - 19 ns VCC = 6.0 V - - 16 ns see Figure 8 VCC = 2.0 V 65 - - ns VCC = 4.5 V 13 - - ns VCC = 6.0 V 11 - - ns see Figure 8 VCC = 2.0 V 65 - - ns VCC = 4.5 V 13 - - ns VCC = 6.0 V 11 - - ns see Figure 8 VCC = 2.0 V 40 - - ns VCC = 4.5 V 8 - - ns VCC = 6.0 V 7 - - ns 9397 750 13804 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 10 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting Table 8: Dynamic characteristics …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF. Symbol Parameter Conditions Min Typ Max Unit Tamb = −40 °C to +125 °C tPHL, tPLH propagation delay An to Yn propagation delay LE to Yn propagation delay E1 to Yn propagation delay E2 to Yn tTHL, tTLH LE pulse width HIGH tW set-up time An to LE tsu hold time An to LE th [1] output transition time see Figure 6 VCC = 2.0 V - - 270 ns VCC = 4.5 V - - 54 ns VCC = 6.0 V - - 46 ns see Figure 7 VCC = 2.0 V - - 285 ns VCC = 4.5 V - - 57 ns VCC = 6.0 V - - 48 ns see Figure 7 VCC = 2.0 V - - 220 ns VCC = 4.5 V - - 44 ns VCC = 6.0 V - - 38 ns see Figure 6 VCC = 2.0 V - - 220 ns VCC = 4.5 V - - 44 ns VCC = 6.0 V - - 38 ns see Figure 6 VCC = 2.0 V - - 110 ns VCC = 4.5 V - - 22 ns VCC = 6.0 V - - 19 ns see Figure 8 VCC = 2.0 V - - 75 ns VCC = 4.5 V - - 15 ns VCC = 6.0 V - - 13 ns see Figure 8 VCC = 2.0 V - - 75 ns VCC = 4.5 V - - 15 ns VCC = 6.0 V - - 13 ns see Figure 8 VCC = 2.0 V - - 45 ns VCC = 4.5 V - - 9 ns VCC = 6.0 V - - 8 ns CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL × VCC2 × fo) = sum of outputs. 9397 750 13804 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 11 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting 12. Waveforms An, E2 input VM tPHL Yn output tPLH VM tTHL tTLH 001aab883 VM = 0.5 × VI. Fig 6. Waveforms showing the address input (An) and enable input (E2) to output (Yn) propagation delays and the output transition times E1, LE input VM tPHL Yn output tPLH VM tTHL tTLH 001aab884 VM = 0.5 × VI. Fig 7. Waveforms showing the enable input (E1, LE) to output (Yn) propagation delays and the output transition times An input VM tsu LE input transparant th VM latched tsu transparant th latched tW 001aab875 The shaded areas indicate when the input is permitted to change for predictable output performance. VM = 0.5 × VI. Fig 8. Waveforms showing the data set-up, hold times for An input to LE input and the latch enable pulse width 9397 750 13804 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 12 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting VCC PULSE GENERATOR VI VO D.U.T. CL RT mna101 Test data is given in Table 9. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. Fig 9. Load circuitry for switching times Table 9: Test data Supply Input Load VCC VI tr, tf CL 2.0 V VCC 6 ns 50 pF 4.5 V VCC 6 ns 50 pF 6.0 V VCC 6 ns 50 pF 5.0 V VCC 6 ns 15 pF 13. Application information strobe decoder enable X0 X1 X2 LE A2 A1 A0 137 E1 E2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 input address 0 1 2 3 4 5 6 7 to five other decoders X3 X4 X5 LE A2 A1 A0 137 E1 E2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 0 1 2 3 4 5 6 7 LE A2 A1 A0 137 E1 E2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 8 9 10 11 12 13 14 15 outputs outputs LE A2 A1 A0 137 E1 E2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 16 17 18 19 20 21 22 23 outputs 001aab885 Fig 10. 6-to-64 line decoder with input address storage 9397 750 13804 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 13 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting 14. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b b2 MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 b2 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 1.25 0.85 0.36 0.23 19.50 18.55 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 0.76 inches 0.17 0.02 0.13 0.068 0.051 0.021 0.015 0.049 0.033 0.014 0.009 0.77 0.73 0.26 0.24 0.1 0.3 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.03 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 95-01-14 03-02-13 SOT38-4 Fig 11. Package outline SOT38-4 (DIP16) 9397 750 13804 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 14 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.039 0.016 0.028 0.020 inches 0.010 0.057 0.069 0.004 0.049 0.16 0.15 0.05 0.244 0.041 0.228 0.01 0.01 0.028 0.004 0.012 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 12. Package outline SOT109-1 (SO16) 9397 750 13804 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 15 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.00 0.55 8 o 0 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC JEITA MO-150 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 13. Package outline SOT338-1 (SSOP16) 9397 750 13804 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 16 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting 15. Revision history Table 10: Revision history Document ID Release date 74HC137_3 20041111 Product data sheet Modifications: Data sheet status Change notice Doc. number Supersedes - 9397 750 13804 74HC_HCT137_CNV_2 • The format of this data sheet has been redesigned to comply with the current presentation and information standard of Philips Semiconductors. • • Removed type number 74HCT137. Inserted family specification. 74HC_HCT137_CNV_2 19970827 Product specification - - 74HC_HCT137_1 74HC_HCT137_1 - - 19901201 Product specification - 9397 750 13804 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 17 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting 16. Data sheet status Level Data sheet status [1] Product status [2] [3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 17. Definitions 18. Disclaimers Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 19. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: [email protected] 9397 750 13804 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 03 — 11 November 2004 18 of 19 74HC137 Philips Semiconductors 3-to-8 line decoder, demultiplexer with address latches; inverting 20. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 8 9 10 11 12 13 14 15 16 17 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional description . . . . . . . . . . . . . . . . . . . 5 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Application information. . . . . . . . . . . . . . . . . . 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information . . . . . . . . . . . . . . . . . . . . 18 © Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 11 November 2004 Document number: 9397 750 13804 Published in The Netherlands