74AHC2G08; 74AHCT2G08 Dual 2-input AND gate Rev. 02 — 18 October 2004 Product data sheet 1. General description The 74AHC2G08; 74AHCT2G08 is a high-speed Si-gate CMOS device. The 74AHC2G08; 74AHCT2G08 provides two 2-input AND gates. 2. Features ■ Symmetrical output impedance ■ High noise immunity ■ ESD protection: ◆ HBM EIA/JESD22-A114-B exceeds 2000 V ◆ MM EIA/JESD22-A115-A exceeds 200 V ◆ CDM EIA/JESD22-C101 exceeds 1000 V. ■ Low power dissipation ■ Balanced propagation delays ■ Multiple package options ■ Specified from −40 °C to +80 °C and from −40 °C to +125 °C. 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. Symbol Parameter Conditions Min Typ Max Unit CL = 15 pF; VCC = 5 V - 3.2 5.9 ns - 1.5 10 pF - 17 - pF Type 74AHC2G08 tPHL, tPLH propagation delay A and B to Y CI input capacitance CPD power dissipation capacitance CL = 50 pF; fi = 1 MHz [1] [2] 74AHC2G08; 74AHCT2G08 Philips Semiconductors Dual 2-input AND gate Table 1: Quick reference data …continued GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. Symbol Parameter Conditions Min Typ Max Unit CL = 15 pF; VCC = 5 V - 3.6 6.2 ns - 1.5 10 pF - 19 - pF Type 74AHCT2G08 tPHL, tPLH propagation delay A and B to Y CI input capacitance power dissipation capacitance CPD [1] [2] CL = 50 pF; fi = 1 MHz [1] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. [2] The condition is Vi = GND to VCC. 4. Ordering information Table 2: Ordering information Type number Package Temperature range Name Description Version 74AHC2G08DP −40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74AHCT2G08DP −40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74AHC2G08DC −40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74AHCT2G08DC −40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74AHC2G08GM −40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 0.95 × 1.95 × 0.5 mm SOT833-1 74AHCT2G08GM −40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 0.95 × 1.95 × 0.5 mm SOT833-1 5. Marking Table 3: Marking Type number Marking code 74AHC2G08DP A08 74AHCT2G08DP C08 74AHC2G08DC A08 74AHCT2G08DC C08 74AHC2G08GM A08 74AHCT2G08GM C08 9397 750 13735 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 02 — 18 October 2004 2 of 17 74AHC2G08; 74AHCT2G08 Philips Semiconductors Dual 2-input AND gate 6. Functional diagram 1 1 1A 2 1B 5 2A 6 2B & 7 & 3 2 1Y 7 2Y 3 5 6 mna725 mna724 Fig 1. Logic symbol. Fig 2. IEC logic symbol. A Y B mna221 Fig 3. Logic diagram (one gate). 7. Pinning information 7.1 Pinning 08 1A 1 8 VCC 1B 2 7 1Y 2Y 3 6 2B GND 4 5 2A 08 001aab564 1A 1 8 VCC 1B 2 7 1Y 2Y 3 6 2B GND 4 5 2A 001aab565 Transparent top view Fig 4. Pin configuration TSSOP8 and VSSOP8. 9397 750 13735 Product data sheet Fig 5. Pin configuration XSON8. © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 02 — 18 October 2004 3 of 17 74AHC2G08; 74AHCT2G08 Philips Semiconductors Dual 2-input AND gate 7.2 Pin description Table 4: Pin description Symbol Pin Description 1A 1 data input 1B 2 data input 2Y 3 data output GND 4 ground (0 V) 2A 5 data input 2B 6 data input 1Y 7 data output VCC 8 supply voltage 8. Functional description 8.1 Function table Table 5: Function table [1] Input Output nA nB nY L L L L H L H L L H H H [1] H = HIGH voltage level; L = LOW voltage level. 9. Limiting values Table 6: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Min Max Unit VCC supply voltage −0.5 +7.0 V VI input voltage −0.5 +7.0 V IIK input diode current VI < −0.5 V - −20 mA IOK output diode current VO < −0.5 V or VO > VCC + 0.5 V - ±20 mA IO output source or sink current VO > −0.5 V and VO < VCC + 0.5 V - ±25 mA ICC, IGND VCC or GND current - ±75 mA Tstg storage temperature −65 +150 °C Ptot power dissipation - 250 mW [1] Conditions Tamb = −40 °C to +125 °C The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 9397 750 13735 Product data sheet [1] © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 02 — 18 October 2004 4 of 17 74AHC2G08; 74AHCT2G08 Philips Semiconductors Dual 2-input AND gate 10. Recommended operating conditions Table 7: Symbol Recommended operating operations Parameter Conditions Min Typ Max Unit Type 74AHC2G08 VCC supply voltage 2.0 5.0 5.5 V VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature see Section 11 and Section 12 −40 +25 +125 °C tr, tf input rise and fall times VCC = 3.0 V to 3.6 V - - 100 ns/V VCC = 4.5 V to 5.5 V - - 20 ns/V Type 74AHCT2G08 VCC supply voltage 4.5 5.0 5.5 V VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature see Section 11 and Section 12 −40 +25 +125 °C tr, tf input rise and fall times VCC = 4.5 V to 5.5 V - - 20 ns/V 11. Static characteristics Table 8: Static characteristics type 74AHC2G08 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit HIGH-level input voltage VCC = 2.0 V 1.5 - - V VCC = 3.0 V 2.1 - - V VCC = 5.5 V 3.85 - - V VCC = 2.0 V - - 0.5 V VCC = 3.0 V - - 0.9 V VCC = 5.5 V - - 1.65 V Tamb = 25 °C VIH VIL VOH LOW-level input voltage HIGH-level output voltage VI = VIH or VIL IO = −50 µA; VCC = 2.0 V 1.9 2.0 - V IO = −50 µA; VCC = 3.0 V 2.9 3.0 - V IO = −50 µA; VCC = 4.5 V 4.4 4.5 - V IO = −4.0 mA; VCC = 3.0 V 2.58 - - V IO = −8.0 mA; VCC = 4.5 V 3.94 - - V 9397 750 13735 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 02 — 18 October 2004 5 of 17 74AHC2G08; 74AHCT2G08 Philips Semiconductors Dual 2-input AND gate Table 8: Static characteristics type 74AHC2G08 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VOL LOW-level output voltage VI = VIH or VIL IO = 50 µA; VCC = 2.0 V - 0 0.1 V IO = 50 µA; VCC = 3.0 V - 0 0.1 V IO = 50 µA; VCC = 4.5 V - 0 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.36 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 V ILI input leakage current VI = VCC or GND; VCC = 5.5 V - - 0.1 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 µA CI input capacitance - 1.5 10 pF VCC = 2.0 V 1.5 - - V VCC = 3.0 V 2.1 - - V VCC = 5.5 V 3.85 - - V VCC = 2.0 V - - 0.5 V VCC = 3.0 V - - 0.9 V VCC = 5.5 V - - 1.65 V Tamb = −40 °C to +85 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL IO = −50 µA; VCC = 2.0 V 1.9 - - V IO = −50 µA; VCC = 3.0 V 2.9 - - V IO = −50 µA; VCC = 4.5 V 4.4 - - V IO = −4.0 mA; VCC = 3.0 V 2.48 - - V IO = −8.0 mA; VCC = 4.5 V 3.8 - - V IO = 50 µA; VCC = 2.0 V - - 0.1 V IO = 50 µA; VCC = 3.0 V - - 0.1 V IO = 50 µA; VCC = 4.5 V - - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.44 V IO = 8.0 mA; VCC = 4.5 V - - 0.44 V VI = VIH or VIL ILI input leakage current VI = VCC or GND; VCC = 5.5 V - - 1.0 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 10 µA CI input capacitance - - 10 pF VCC = 2.0 V 1.5 - - V VCC = 3.0 V 2.1 - - V VCC = 5.5 V 3.85 - - V VCC = 2.0 V - - 0.5 V VCC = 3.0 V - - 0.9 V VCC = 5.5 V - - 1.65 V Tamb = −40 °C to +125 °C VIH VIL HIGH-level input voltage LOW-level input voltage 9397 750 13735 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 02 — 18 October 2004 6 of 17 74AHC2G08; 74AHCT2G08 Philips Semiconductors Dual 2-input AND gate Table 8: Static characteristics type 74AHC2G08 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VOH HIGH-level output voltage VI = VIH or VIL VOL LOW-level output voltage Min Typ Max Unit IO = −50 µA; VCC = 2.0 V 1.9 - - V IO = −50 µA; VCC = 3.0 V 2.9 - - V IO = −50 µA; VCC = 4.5 V 4.4 - - V IO = −4.0 mA; VCC = 3.0 V 2.40 - - V IO = −8.0 mA; VCC = 4.5 V 3.70 - - V IO = 50 µA; VCC = 2.0 V - - 0.1 V IO = 50 µA; VCC = 3.0 V - - 0.1 V IO = 50 µA; VCC = 4.5 V - - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.55 V IO = 8.0 mA; VCC = 4.5 V - - 0.55 V VI = VIH or VIL ILI input leakage current VI = VCC or GND; VCC = 5.5 V - - 2.0 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 40 µA CI input capacitance - - 10 pF Table 9: Static characteristics type 74AHCT2G08 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL IO = −50 µA; VCC = 4.5 V 4.4 4.5 - V IO = −8.0 mA; VCC = 4.5 V 3.94 - - V LOW-level output voltage VI = VIH or VIL IO = 50 µA; VCC = 4.5 V - 0 0.1 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 V Tamb = 25 °C VOL ILI input leakage current VI = VIH or VIL; VCC = 5.5 V - - 0.1 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 µA ∆ICC additional quiescent supply current per input pin VI = 3.4 V; other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.35 mA CI input capacitance - 1.5 10 pF Tamb = −40 °C to +85 °C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V 9397 750 13735 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 02 — 18 October 2004 7 of 17 74AHC2G08; 74AHCT2G08 Philips Semiconductors Dual 2-input AND gate Table 9: Static characteristics type 74AHCT2G08 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VOH HIGH-level output voltage VI = VIH or VIL LOW-level output voltage VI = VIH or VIL VOL Min Typ Max Unit IO = −50 µA; VCC = 4.5 V 4.4 - - V IO = −8.0 mA; VCC = 4.5 V 3.8 - - V IO = 50 µA; VCC = 4.5 V - - 0.1 V IO = 8.0 mA; VCC = 4.5 V - - 0.44 V ILI input leakage current VI = VIH or VIL; VCC = 5.5 V - - 1.0 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 10 µA ∆ICC additional quiescent supply current per input pin VI = 3.4 V; other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.5 mA CI input capacitance - - 10 pF Tamb = −40 °C to +125 °C VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL IO = −50 µA; VCC = 4.5 V 4.4 - - V IO = −8.0 mA; VCC = 4.5 V 3.70 - - V VOL LOW-level output voltage VI = VIH or VIL IO = 50 µA; VCC = 4.5 V - - 0.1 V IO = 8.0 mA; VCC = 4.5 V - - 0.55 V ILI input leakage current VI = VIH or VIL; VCC = 5.5 V - - 2.0 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 40 µA ∆ICC additional quiescent supply current per input pin VI = 3.4 V; other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.5 mA CI input capacitance - - 10 pF 9397 750 13735 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 02 — 18 October 2004 8 of 17 74AHC2G08; 74AHCT2G08 Philips Semiconductors Dual 2-input AND gate 12. Dynamic characteristics Table 10: Dynamic characteristics type 74AHC2G08 At recommended operating conditions; voltages are referenced to GND (ground = 0 V); tr = tf ≤ 3.0 ns; see Figure 7. Symbol Parameter Conditions Min Typ Max Unit Tamb = 25 °C tPHL, tPLH propagation delay nA and nB to nY power dissipation capacitance CPD see Figure 6 VCC = 3.0 V to 3.6 V; CL = 15 pF [1] - 4.6 8.8 ns VCC = 4.5 V to 5.5 V; CL = 15 pF [2] - 3.2 5.9 ns VCC = 3.0 V to 3.6 V; CL = 50 pF [1] - 6.5 12.3 ns VCC = 4.5 V to 5.5 V; CL = 50 pF [2] - 4.6 7.9 ns [3] [4] - 17 - pF VCC = 3.0 V to 3.6 V; CL = 15 pF 1.0 - 10.5 ns VCC = 4.5 V to 5.5 V; CL = 15 pF 1.0 - 7.0 ns VCC = 3.0 V to 3.6 V; CL = 50 pF 1.0 - 14.0 ns VCC = 4.5 V to 5.5 V; CL = 50 pF 1.0 - 9.0 ns VCC = 3.0 V to 3.6 V; CL = 15 pF 1.0 - 12.0 ns VCC = 4.5 V to 5.5 V; CL = 15 pF 1.0 - 8.0 ns VCC = 3.0 V to 3.6 V; CL = 50 pF 1.0 - 16.0 ns VCC = 4.5 V to 5.5 V; CL = 50 pF 1.0 - 10.5 ns CL = 50 pF; fi = 1 MHz Tamb = −40 °C to +85 °C tPHL, tPLH propagation delay nA and nB to nY see Figure 6 Tamb = −40 °C to +125 °C tPHL, tPLH propagation delay nA and nB to nY see Figure 6 [1] Typical values are measured at VCC = 3.3 V. [2] Typical values are measured at VCC = 5.0 V. [3] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. [4] The condition is VI = GND to VCC. 9397 750 13735 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 02 — 18 October 2004 9 of 17 74AHC2G08; 74AHCT2G08 Philips Semiconductors Dual 2-input AND gate Table 11: Dynamic characteristics type 74AHCT2G08 At recommended operating conditions; voltages are referenced to GND (ground = 0 V); tr = tf ≤ 3.0 ns; see Figure 7. Symbol Parameter Conditions Min Typ Max Unit Tamb = 25 °C tPHL, tPLH propagation delay nA and nB to nY power dissipation capacitance CPD see Figure 6 VCC = 4.5 V to 5.5 V; CL = 15 pF [1] - 3.6 6.2 ns VCC = 4.5 V to 5.5 V; CL = 50 pF [1] - 5.1 7.9 ns [2] [3] - 19 - pF VCC = 4.5 V to 5.5 V; CL = 15 pF 1.0 - 7.1 ns VCC = 4.5 V to 5.5 V; CL = 50 pF 1.0 - 9.0 ns VCC = 4.5 V to 5.5 V; CL = 15 pF 1.0 - 8.0 ns VCC = 4.5 V to 5.5 V; CL = 50 pF 1.0 - 10.5 ns CL = 50 pF; fi = 1 MHz Tamb = −40 °C to +85 °C tPHL, tPLH propagation delay nA and nB to nY see Figure 6 Tamb = −40 °C to +125 °C tPHL, tPLH propagation delay nA and nB to nY see Figure 6 [1] Typical values are measured at VCC = 5.0 V. [2] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. [3] The condition is VI = GND to VCC. 13. Waveforms VI VM nA, nB input GND t PHL t PLH VOH VM nY output VOL mna224 74AHC2G08: VM = 50 % VCC; VI = GND to VCC. 74AHCT2G08: VM = 1.5 V; VI = GND to 3.0 V. Fig 6. The input (nA and nB) to output (nY) propagation delays. 9397 750 13735 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 02 — 18 October 2004 10 of 17 74AHC2G08; 74AHCT2G08 Philips Semiconductors Dual 2-input AND gate VCC PULSE GENERATOR VI VO D.U.T. RT CL mna101 Definitions for test circuit: CL = Load capacitance including jig and probe capacitance (See Section 12 for the value). RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig 7. Load circuitry for switching times. 9397 750 13735 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 02 — 18 October 2004 11 of 17 74AHC2G08; 74AHCT2G08 Philips Semiconductors Dual 2-input AND gate 14. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm D E A SOT505-2 X c HE y v M A Z 5 8 A A2 (A3) A1 pin 1 index θ Lp L 1 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e HE L Lp v w y Z(1) θ mm 1.1 0.15 0.00 0.95 0.75 0.25 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.5 0.47 0.33 0.2 0.13 0.1 0.70 0.35 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16 --- Fig 8. Package outline SOT505-2 (TSSOP8). 9397 750 13735 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 02 — 18 October 2004 12 of 17 74AHC2G08; 74AHCT2G08 Philips Semiconductors Dual 2-input AND gate VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm D E SOT765-1 A X c y HE v M A Z 5 8 Q A A2 A1 pin 1 index (A3) θ Lp 1 4 e L detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(2) e HE L Lp Q v w y Z(1) θ mm 1 0.15 0.00 0.85 0.60 0.12 0.27 0.17 0.23 0.08 2.1 1.9 2.4 2.2 0.5 3.2 3.0 0.4 0.40 0.15 0.21 0.19 0.2 0.13 0.1 0.4 0.1 8° 0° Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT765-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 02-06-07 MO-187 Fig 9. Package outline SOT765-1 (VSSOP8). 9397 750 13735 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 02 — 18 October 2004 13 of 17 74AHC2G08; 74AHCT2G08 Philips Semiconductors Dual 2-input AND gate XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 0.95 x 1.95 x 0.5 mm 1 2 SOT833-1 b 4 3 4× (2) L L1 e 8 7 6 e1 5 e1 e1 8× A (2) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A (1) max A1 max b D E e e1 L L1 mm 0.5 0.04 0.25 0.17 2.0 1.9 1.0 0.9 0.6 0.5 0.35 0.27 0.40 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT833-1 --- MO-252 --- EUROPEAN PROJECTION ISSUE DATE 04-07-15 04-07-22 Fig 10. Package outline SOT833_1 (XSON8). 9397 750 13735 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 02 — 18 October 2004 14 of 17 74AHC2G08; 74AHCT2G08 Philips Semiconductors Dual 2-input AND gate 15. Revision history Table 12: Revision history Document ID Release date Data sheet status Change notice Doc. number Supersedes 74AHC_AHCT2G08_2 20041018 Product data sheet - 74AHC_AHCT2G08_1 Modifications: Adding features, ordering information, pinning, and package outline 74AHC_AHCT2G08_1 20040206 Product data sheet - 9397 750 13735 Product data sheet 9397 750 13735 9397 750 12533 - © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 02 — 18 October 2004 15 of 17 74AHC2G08; 74AHCT2G08 Philips Semiconductors Dual 2-input AND gate 16. Data sheet status Level Data sheet status [1] Product status [2] [3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 17. Definitions 18. Disclaimers Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 19. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: [email protected] 9397 750 13735 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 02 — 18 October 2004 16 of 17 Philips Semiconductors 74AHC2G08; 74AHCT2G08 Dual 2-input AND gate 20. Contents 1 2 3 4 5 6 7 7.1 7.2 8 8.1 9 10 11 12 13 14 15 16 17 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information . . . . . . . . . . . . . . . . . . . . 16 © Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 18 October 2004 Document number: 9397 750 13735 Published in The Netherlands