Philips Semiconductors Product Specification PowerMOS transistor Logic level FET GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope. The device is intended for use in Switched Mode Power Supplies (SMPS), motor control, welding, DC/DC and AC/DC converters, and in automotive and general purpose switching applications. PINNING - TO220AB PIN QUICK REFERENCE DATA SYMBOL PARAMETER MAX. MAX. UNIT VDS ID Ptot Tj RDS(ON) BUK554 Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance; VGS = 5 V -200A 200 9.2 90 175 0.4 -200B 200 8.2 90 175 0.5 V A W ˚C Ω PIN CONFIGURATION DESCRIPTION 1 gate 2 drain 3 source tab BUK554-200A/B SYMBOL d tab g drain s 1 23 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS VDGR ±VGS ±VGSM Drain-source voltage Drain-gate voltage Gate-source voltage Non-repetitive gate-source voltage RGS = 20 kΩ tp ≤ 50 µs - 200 200 15 20 V V V V ID ID IDM Drain current (DC) Drain current (DC) Drain current (pulse peak value) Tmb = 25 ˚C Tmb = 100 ˚C Tmb = 25 ˚C - Ptot Tstg Tj Total power dissipation Storage temperature Junction Temperature Tmb = 25 ˚C - - 55 - -200A 9.2 6.5 36 -200B 8.2 5.8 33 A A A 90 175 175 W ˚C ˚C THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Thermal resistance junction to mounting base Thermal resistance junction to ambient Rth j-a April 1993 CONDITIONS 1 MIN. TYP. MAX. UNIT - - 1.67 K/W - 60 - K/W Rev 1.100 Philips Semiconductors Product Specification PowerMOS transistor Logic level FET BUK554-200A/B STATIC CHARACTERISTICS Tmb = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(BR)DSS Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Zero gate voltage drain current Gate source leakage current Drain-source on-state resistance VGS = 0 V; ID = 0.25 mA 200 - - V VDS = VGS; ID = 1 mA VDS = 200 V; VGS = 0 V; Tj = 25 ˚C VDS = 200 V; VGS = 0 V; Tj =125 ˚C VGS = ±10 V; VDS = 0 V VGS = 5 V; BUK554-200A BUK554-200B ID = 3.5 A 1.0 - 1.5 1 0.1 10 0.35 0.4 2.0 10 1.0 100 0.4 0.5 V µA mA nA Ω Ω MIN. TYP. MAX. UNIT VGS(TO) IDSS IDSS IGSS RDS(ON) DYNAMIC CHARACTERISTICS Tmb = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS gfs Forward transconductance VDS = 25 V; ID = 3.5 A 3.5 6.0 - S Ciss Coss Crss Input capacitance Output capacitance Feedback capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 800 120 65 1000 160 90 pF pF pF td on tr td off tf Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time VDD = 30 V; ID = 2.9 A; VGS = 5 V; RGS = 50 Ω; Rgen = 50 Ω - 16 75 120 50 30 110 180 75 ns ns ns ns Ld Internal drain inductance - 3.5 - nH Ld Internal drain inductance - 4.5 - nH Ls Internal source inductance Measured from contact screw on tab to centre of die Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad - 7.5 - nH MIN. TYP. MAX. UNIT REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tmb = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS IDR - - - 9.2 A IDRM VSD Continuous reverse drain current Pulsed reverse drain current Diode forward voltage IF = 9.2 A ; VGS = 0 V - 1.1 36 1.3 A V trr Qrr Reverse recovery time Reverse recovery charge IF = 9.2 A; -dIF/dt = 100 A/µs; VGS = 0 V; VR = 100 V - 200 0.6 - ns µC MIN. TYP. MAX. UNIT - - 50 mJ AVALANCHE LIMITING VALUE Tmb = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS WDSS Drain-source non-repetitive unclamped inductive turn-off energy ID = 9 A ; VDD ≤ 100 V ; VGS = 5 V ; RGS = 50 Ω April 1993 2 Rev 1.100 Philips Semiconductors Product Specification PowerMOS transistor Logic level FET 120 BUK554-200A/B Normalised Power Derating PD% 10 Zth / (K/W) BUKx54-lv 110 100 90 D= 80 1 0.5 70 0.2 60 50 0.1 40 0.1 0.05 30 10 0 0 0 20 40 60 80 100 Tmb / C 120 140 160 1E-05 1E-03 t/s tp T t 1E-01 1E+01 Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T Normalised Current Derating ID% D= T 0.01 1E-07 180 Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tmb) 120 tp PD 0.02 20 20 BUK554-200A ID / A 10 110 7 5 100 90 15 VGS / V = 80 4 70 60 10 50 40 30 3 5 20 10 0 0 20 40 60 80 100 Tmb / C 120 140 160 0 180 Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 5 V /ID N) = S VD 10 1.0 B 4 6 8 10 12 VDS / V 2.5 18 20 3.5 4.5 4 0.8 tp = 10 us VGS / V = 0.6 100 us 1 ms DC 16 BUK554-200A 3 R 1 14 RDS(ON) / Ohm A O ( DS 2 Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS); parameter VGS BUK554-200A,B ID / A 100 0 0.4 5 10 10 ms 100 ms 0.2 0 0.1 1 10 100 VDS / V 1000 Fig.3. Safe operating area. Tmb = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp April 1993 0 2 4 6 8 10 12 ID / A 14 16 18 20 Fig.6. Typical on-state resistance, Tj = 25 ˚C. RDS(ON) = f(ID); parameter VGS 3 Rev 1.100 Philips Semiconductors Product Specification PowerMOS transistor Logic level FET BUK554-200A/B ID / A 20 VGS(TO) / V BUK554-200A Tj / C = 25 150 max. 2 15 typ. 10 min. 1 5 0 0 0 2 4 VGS / V 6 8 -60 gfs / S 20 60 Tj / C 100 140 180 Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS Fig.7. Typical transfer characteristics. ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj 8 -20 BUK554-200A SUB-THRESHOLD CONDUCTION ID / A 1E-01 7 1E-02 6 5 2% 1E-03 98 % typ 4 1E-04 3 2 1E-05 1 1E-06 0 0 2 4 6 8 10 12 ID / A 14 16 18 20 0 Fig.8. Typical transconductance, Tj = 25 ˚C. gfs = f(ID); conditions: VDS = 25 V 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0.8 1.2 VGS / V 1.6 2 10000 BUK5y4-200 C / pF 1000 Ciss 100 -60 -20 20 60 Tj / C 100 140 Coss Crss 10 180 0 20 40 VDS / V Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 3.5 A; VGS = 5 V April 1993 2.4 Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS Normalised RDS(ON) = f(Tj) a 0.4 Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz 4 Rev 1.100 Philips Semiconductors Product Specification PowerMOS transistor Logic level FET 12 BUK554-200A/B BUK554-200 VGS / V 120 110 VDS / V =40 10 WDSS% 100 90 80 8 160 70 60 6 50 40 4 30 20 2 10 0 0 0 10 20 QG / nC 30 20 40 Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); conditions: ID = 9.2 A; parameter VDS 20 IF / A 40 60 80 100 120 Tmb / C 140 160 180 Fig.15. Normalised avalanche energy rating. WDSS% = f(Tmb); conditions: ID = 9 A BUK554-200A VDD + L 15 Tj / C = 150 VDS 25 - VGS 10 -ID/100 T.U.T. 0 5 RGS R 01 shunt 0 0 1 VSDS / V 2 Fig.16. Avalanche energy test circuit. WDSS = 0.5 ⋅ LID2 ⋅ BVDSS /(BVDSS − VDD ) Fig.14. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj April 1993 5 Rev 1.100 Philips Semiconductors Product Specification PowerMOS transistor Logic level FET BUK554-200A/B MECHANICAL DATA Dimensions in mm 4,5 max Net Mass: 2 g 10,3 max 1,3 3,7 2,8 5,9 min 15,8 max 3,0 max not tinned 3,0 13,5 min 1,3 max 1 2 3 (2x) 0,9 max (3x) 2,54 2,54 0,6 2,4 Fig.17. TO220AB; pin 2 connected to mounting base. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for TO220 envelopes. 3. Epoxy meets UL94 V0 at 1/8". April 1993 6 Rev 1.100 Philips Semiconductors Product Specification PowerMOS transistor Logic level FET BUK554-200A/B DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1996 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. April 1993 7 Rev 1.100