INTEGRATED CIRCUITS 74F174 Hex D flip-flops Product specification IC15 Data Handbook 1988 Oct 07 Philips Semiconductors Product specification Hex D flip-flop 74F174 FEATURES PIN CONFIGURATION • Six edge-triggered D-type flip-flops • Buffered common Clock • Buffered, asynchronous Master Reset DESCRIPTION The 74F174 has six edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition is transferred to the corresponding flip-flop’s Q output. TYPICAL fMAX TYPICAL SUPPLY CURRENT (TOTAL) 74F174 100MHz 35mA 1 16 VCC Q0 2 15 Q5 D0 3 14 D5 D1 4 13 D4 Q1 5 12 Q4 D2 6 11 D3 Q2 7 10 Q3 GND 8 9 CP SF00188 All Q outputs will be forced Low independent of Clock or Data inputs by a Low voltage level on the MR input. The device is useful for applications where true outputs only are required, and the Clock and Master Reset are common to all storage elements. TYPE MR ORDERING INFORMATION DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C PKG DWG # 16-pin plastic DIP N74F174N SOT38-4 16-pin plastic SO N74F174D SOT109-1 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS DESCRIPTION D0–D5 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW Data inputs 1.0/1.0 20µA/0.6mA CP Clock Pulse input (active rising edge) 1.0/1.0 20µA/0.6mA MR Master Reset input (active-Low) 1.0/1.0 20µA/0.6mA Outputs 50/33 1.0mA/20mA Q0–Q5 NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. LOGIC SYMBOL IEC/IEEE SYMBOL 3 4 6 11 13 9 14 1 D0 9 CP 1 MR D1 D2 D3 D4 3 D5 4 6 Q0 2 Q1 5 Q2 7 Q3 10 Q4 12 C1 R 1D 2 5 7 Q5 15 11 10 13 12 14 15 VCC = Pin 16 GND = Pin 8 SF00190 SF00189 October 7, 1988 2 853–0060 94766 Philips Semiconductors Product specification Hex D flip-flop 74F174 LOGIC DIAGRAM D0 D1 3 D2 4 Q D Q D CP MR D4 11 Q D CP RD CP D3 6 RD Q D CP 14 Q D CP RD D5 13 Q D CP RD CP RD RD 9 1 2 VCC = Pin 16 GND = Pin 8 Q0 5 7 Q1 Q2 10 15 12 Q3 Q5 Q4 SF00192 FUNCTION TABLE INPUTS OUTPUTS MR CP D OPERATING MODE Qn L X X L Reset (clear) H ↑ h H Load “1” H ↑ l L Load “0” H = High voltage level L = Low voltage level X = Don’t care ↑ = Low-to-High Clock transition h = High voltage level one set-up time prior to the Low-to-High Clock transition. l = Low voltage level one set-up time prior to the Low-to-High Clock transition. ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) PARAMETER SYMBOL RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to VCC V IOUT Current applied to output in Low output state 40 mA Tamb Operating free-air temperature range 0 to +70 °C Tstg Storage temperature range –65 to +150 °C RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER MIN NOM MAX 5.0 5.5 UNIT VCC Supply voltage 4.5 VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –1 mA IOL Low-level output current 20 mA Tamb Operating free-air temperature range +70 °C October 7, 1988 0 3 V V Philips Semiconductors Product specification Hex D flip-flop 74F174 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER VIH = MIN, IOH = MAX ±5%VCC 2.7 VCC = MIN, VIL = MAX ±10%VCC 0.30 0.50 VIH = MIN, IOL = MAX ±5%VCC 0.30 0.50 –0.73 –1.2 V 100 µA VCC = MAX, VI = 2.7V 20 µA VCC = MAX, VI = 0.5V –0.6 mA –150 mA 45 mA Low level output voltage Low-level VIK Input clamp voltage VCC = MIN, II = IIK II Input current at maximum input voltage VCC = MAX, VI = 7.0V IIH High-level input current IIL Low-level input current ICC Supply current (total) UNIT 2.5 VOL O Short-circuit output MAX ±10%VCC High level output voltage High-level IOS TYP2 MIN VCC = MIN, VIL = MAX VOH O current3 LIMITS TEST CONDITIONS1 V 3.4 V VCC = MAX –60 VCC = MAX, Dn = MR = 4.5V, CP = ↑ 35 NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER VCC = +5.0V Tamb = +25°C CL = 50pF, RL = 500Ω TEST CONDITION MIN TYP VCC = +5.0V ± 10% Tamb = 0°C to +70°C CL = 50pF, RL = 500Ω MAX MIN UNIT MAX fMAX Maximum clock frequency Waveform 1 80 100 tPLH tPHL Propagation delay CP to Qn Waveform 1 3.5 4.5 5.5 6.0 8.0 10.0 3.5 4.5 80 9.0 11.0 MHz ns tPHL Propagation delay MR to Qn Waveform 2 5.0 8.5 14.0 5.0 15.0 ns AC SETUP REQUIREMENTS LIMITS SYMBOL PARAMETER VCC = +5.0V Tamb = +25°C CL = 50pF, RL = 500Ω TEST CONDITION MIN TYP MAX VCC = +5.0V ± 10% Tamb = 0°C to +70°C CL = 50pF, RL = 500Ω MIN UNIT MAX tS(H) tS(L) Setup time, High or Low Dn to CP Waveform 3 4.0 4.0 4.0 4.0 ns th(H) th(L) Hold time, High or Low Dn to CP Waveform 3 0.0 0.0 0.0 0.0 ns tw(H) tw(L) CP Pulse width, High or Low Waveform 1 4.0 6.0 4.0 6.0 ns tw(L) MR Pulse width, Low Waveform 2 5.0 5.0 ns tREC Recovery time, MR to CP Waveform 2 5.0 5.0 ns October 7, 1988 4 Philips Semiconductors Product specification Hex D flip-flop 74F174 AC WAVEFORMS For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance. 1/fMAX Dn tw(L) CP VM VM tw(H) VM VM VM ts(H) th(H) ts(L) th(L) tPLH tPHL Qn VM CP VM VM VM VM SF00191 SF00166 Waveform 3. Data Setup and Hold Times Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency MR VM VM tw(L) tREC VM CP tPHL Qn VM SF00158 Waveform 2. Master Reset Pulse Width, Master Reset to Output Delay and Master Reset to Clock recovery Time TEST CIRCUIT AND WAVEFORMS VCC VIN tw 90% NEGATIVE PULSE 10% D.U.T. RT CL RL AMP (V) VM VM VOUT PULSE GENERATOR 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V AMP (V) 90% POSITIVE PULSE VM VM 10% Test Circuit for Totem-Pole Outputs DEFINITIONS: RL = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 90% 10% tw 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00006 October 7, 1988 5 Philips Semiconductors Product specification Hex D flip-flops 74F174 DIP16: plastic dual in-line package; 16 leads (300 mil) 1988 Oct 07 6 SOT38-4 Philips Semiconductors Product specification Hex D flip-flops 74F174 SO16: plastic small outline package; 16 leads; body width 3.9 mm 1988 Oct 07 7 SOT109-1 Philips Semiconductors Product specification Hex D flip-flops 74F174 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 8 Date of release: 10-98 9397-750-05089