74HC2G14; 74HCT2G14 Dual inverting Schmitt trigger Rev. 01 — 11 October 2006 Product data sheet 1. General description The 74HC2G14; 74HCT2G14 is a high-speed Si-gate CMOS device. The 74HC2G14; 74HCT2G14 provides two inverting buffers with Schmitt trigger action which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT− is defined as the input hysteresis voltage VH. 2. Features n n n n n n n n n Wide supply voltage range from 2.0 V to 6.0 V Complies with JEDEC standard no. 7A High noise immunity ESD protection: u HBM JESD22-A114-D exceeds 2000 V u MM JESD22-A115-A exceeds 200 V Low power dissipation Balanced propagation delays Unlimited input rise and fall times Multiple package options Specified from −40 °C to +85 °C and −40 °C to +125 °C 3. Applications n Wave and pulse shaper for highly noisy environments n Astable multivibrators n Monostable multivibrators 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger 4. Ordering information Table 1. Ordering information Type number Package 74HC2G14GW Temperature range Name Description Version −40 °C to +125 °C plastic surface-mounted package; 6 leads SOT363 SC-88 74HC2G14GV −40 °C to +125 °C SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457 74HCT2G14GW −40 °C to +125 °C SC-88 plastic surface-mounted package; 6 leads SOT363 74HCT2G14GV −40 °C to +125 °C SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457 5. Marking Table 2. Marking Type number Marking code 74HC2G14GW HK 74HC2G14GV H14 74HCT2G14GW TK 74HCT2G14GV T14 6. Functional diagram 1 3 1A 1Y 2A 2Y 6 4 1 6 1A 3 4 2A 2Y mnb083 mnb082 Fig 1. Logic symbol 1Y mnb084 Fig 2. IEC logic symbol Fig 3. Logic diagram 7. Pinning information 7.1 Pinning 74HC2G14 74HCT2G14 1A 1 6 1Y GND 2 5 VCC 2A 3 4 2Y 001aad868 Fig 4. Pin configuration 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 2 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger 7.2 Pin description Table 3. Pin description Symbol Pin Description 1A 1 data input GND 2 ground (0 V) 2A 3 data input 2Y 4 data output VCC 5 supply voltage 1Y 6 data output 8. Functional description Table 4. Function table[1] Input Output nA nY L H H L [1] H = HIGH voltage level; L = LOW voltage level. 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input clamping current VI < −0.5 V or VI > VCC + 0.5 V [1] output clamping current output current IOK IO Conditions Min Max Unit −0.5 +7.0 V - ±20 mA VO < −0.5 V or VO > VCC + 0.5 V [1] - ±20 mA VO = −0.5 V to VCC + 0.5 V [1] - ±25 mA - +50 mA - −50 mA −65 +150 °C - 250 mW ICC supply current [1] IGND ground current [1] Tstg storage temperature [2] total power dissipation Ptot [1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SC-88 and SC-74 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K. 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 3 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger 10. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit 2.0 5.0 6.0 V Type 74HC2G14 VCC supply voltage VI input voltage 0 - VCC V VO output voltage 0 - VCC V Tamb ambient temperature −40 +25 +125 °C Type 74HCT2G14 VCC supply voltage 4.5 5.0 5.5 V VI input voltage 0 - VCC V VO output voltage 0 - VCC V Tamb ambient temperature −40 +25 +125 °C 11. Static characteristics Table 7. Static characteristics for 74HC2G14 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 2.0 V 1.9 2.0 - V IO = −20 µA; VCC = 4.5 V 4.4 4.5 - V IO = −20 µA; VCC = 6.0 V 5.9 6.0 - V IO = −4.0 mA; VCC = 4.5 V 4.18 4.32 - V IO = −5.2 mA; VCC = 6.0 V 5.68 5.81 - V IO = 20 µA; VCC = 2.0 V - 0 0.1 V IO = 20 µA; VCC = 4.5 V - 0 0.1 V IO = 20 µA; VCC = 6.0 V - 0 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 V Tamb = 25 °C VOH VOL LOW-level output voltage VI = VIH or VIL II input leakage current VI = GND or VCC; VCC = 6.0 V - - ±0.1 µA ICC supply current VI = GND or VCC; IO = 0 µA; - - 1.0 µA - 2.0 - pF VCC = 6.0 V CI input capacitance 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 4 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger Table 7. Static characteristics for 74HC2G14 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit Tamb = −40 °C to +85 °C VOH VOL HIGH-level output voltage LOW-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 2.0 V 1.9 - - V IO = −20 µA; VCC = 4.5 V 4.4 - - V IO = −20 µA; VCC = 6.0 V 5.9 - - V IO = −4.0 mA; VCC = 4.5 V 4.13 - - V IO = −5.2 mA; VCC = 6.0 V; 5.63 - - V IO = 20 µA; VCC = 2.0 V - - 0.1 V IO = 20 µA; VCC = 4.5 V - - 0.1 V VI = VIH or VIL IO = 20 µA; VCC = 6.0 V - - 0.1 V IO = 4.0 mA; VCC = 4.5 V - - 0.33 V IO = 5.2 mA; VCC = 6.0 V - - 0.33 V II input leakage current VI = GND or VCC; VCC = 6.0 V - - ±1.0 µA ICC supply current VI = GND or VCC; IO = 0 µA; - - 10.0 µA IO = −20 µA; VCC = 2.0 V 1.9 - - V IO = −20 µA; VCC = 4.5 V 4.4 - - V IO = −20 µA; VCC = 6.0 V 5.9 - - V IO = −4.0 mA; VCC = 4.5 V 3.7 - - V IO = −5.2 mA; VCC = 6.0 V; 5.2 - - V IO = 20 µA; VCC = 2.0 V - - 0.1 V IO = 20 µA; VCC = 4.5 V - - 0.1 V IO = 20 µA; VCC = 6.0 V - - 0.1 V IO = 4.0 mA; VCC = 4.5 V - - 0.4 V IO = 5.2 mA; VCC = 6.0 V - - 0.4 V VCC = 6.0 V Tamb = −40 °C to +125 °C VOH VOL HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL II input leakage current VI = GND or VCC; VCC = 6.0 V - - ±1.0 µA ICC supply current VI = GND or VCC; IO = 0 µA; - - 20.0 µA VCC = 6.0 V 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 5 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger Table 8. Static characteristics for 74HCT2G14 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit HIGH-level output voltage VI = VIH or VIL IO = −20 µA; VCC = 4.5 V 4.4 4.5 - V IO = −4.0 mA; VCC = 4.5 V 4.18 4.32 - V IO = 20 µA; VCC = 4.5 V - 0 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.26 V Tamb = 25 °C VOH VOL LOW-level output voltage VI = VIH or VIL II input leakage current VI = GND or VCC; VCC = 5.5 V - - ±0.1 µA ICC supply current VI = GND or VCC; IO = 0 µA; VCC = 5.5 V - - 1.0 µA ∆ICC additional supply current VI = VCC − 2.1 V; VCC = 4.5 V to 5.5 V; IO = 0 µA - - 300 µA CI input capacitance - 2.0 - pF IO = −20 µA; VCC = 4.5 V 4.4 - - V IO = −4.0 mA; VCC = 4.5 V 4.13 - - V IO = 20 µA; VCC = 4.5 V - - 0.1 V IO = 4.0 mA; VCC = 4.5 V - - 0.33 V Tamb = −40 °C to +85 °C VOH VOL HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL II input leakage current VI = GND or VCC; VCC = 5.5 V - - ±1.0 µA ICC supply current VI = GND or VCC; IO = 0 µA; VCC = 5.5 V - - 10.0 µA ∆ICC additional supply current VI = VCC − 2.1 V; VCC = 4.5 V to 5.5 V; IO = 0 µA - - 375 µA IO = −20 µA; VCC = 4.5 V 4.4 - - V IO = −4.0 mA; VCC = 4.5 V 3.7 - - V IO = 20 µA; VCC = 4.5 V - - 0.1 V IO = 4.0 mA; VCC = 4.5 V - - 0.4 V Tamb = −40 °C to +125 °C VOH VOL HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL II input leakage current VI = GND or VCC; VCC = 5.5 V - - ±1.0 µA ICC supply current VI = GND or VCC; IO = 0 µA; VCC = 5.5 V - - 20.0 µA ∆ICC additional supply current VI = VCC − 2.1 V; VCC = 4.5 V to 5.5 V; IO = 0 µA - - 410 µA 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 6 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger 12. Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6. Symbol Parameter 25 °C Conditions −40 °C to +125 °C Unit Min Typ Max Min Max (85 °C) Max (125 °C) VCC = 2.0 V; CL = 50 pF - 53 125 - 155 190 ns VCC = 4.5 V; CL = 50 pF - 16 25 - 31 38 ns VCC = 6.0 V; CL = 50 pF - 13 21 - 26 32 ns VCC = 2.0 V; CL = 50 pF - 20 75 - 95 110 ns VCC = 4.5 V; CL = 50 pF - 7 15 - 19 22 ns VCC = 6.0 V; CL = 50 pF - 5 13 - 16 19 ns - 10 - - - - pF - 21 32 - 40 48 ns - 6 15 - 19 22 ns - 10 - - - - pF 74HC2G14 propagation delay tpd transition time tt power dissipation capacitance CPD nA to nY; see Figure 5 nY; see Figure 5 [1] [2] VI = GND to VCC [3] nA to nY; see Figure 5 [1] 74HCT2G14 propagation delay tpd VCC = 4.5 V; CL = 50 pF tt transition time CPD power dissipation capacitance nY; see Figure 5 [2] VCC = 4.5 V; CL = 50 pF VI = GND to VCC − 1.5 V [1] tpd is the same as tPLH and tPHL [2] tt is the same as tTLH and tTHL [3] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs. [3] 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 7 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger 13. Waveforms VI VM nA input VM GND t PHL t PLH VOH 90% VM VM nY output 10% VOL t THL t TLH mna722 Measurement points are given in Table 10. VOL and VOH are typical voltage output drop that occur with the output load. Fig 5. The data input (nA) to output (nY) propagation delays and output transition times Table 10. Measurement points Type Input Output VM VI tr = tf VM 74HC2G14 0.5VCC GND to VCC 6.0 ns 0.5VCC 74HCT2G14 1.3 V GND to 3.0 V 6.0 ns 1.3 V VCC VCC PULSE GENERATOR VI VO RL = 1 kΩ open D.U.T RT CL 50 pF mgk563 Test data is given in Table 11. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 6. Load circuitry for switching times Table 11. Test data Type Input Test VI tr, tf tPHL, tPLH 74HC2G14 GND to VCC 6 ns open 74HCT2G14 GND to 3.0 V 6 ns open 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 8 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger 14. Transfer characteristics Table 12. Transfer characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6. Symbol Parameter 25 °C Conditions −40 °C to +125 °C Unit Min Typ Max Min Max (85 °C) Max (125 °C) VCC = 2.0 V 1.00 1.18 1.50 1.00 1.50 1.50 V VCC = 4.5 V 2.30 2.60 3.15 2.30 3.15 3.15 V VCC = 6.0 V 3.00 3.46 4.20 3.00 4.20 4.20 V VCC = 2.0 V 0.30 0.60 0.90 0.30 0.90 0.90 V VCC = 4.5 V 1.13 1.47 2.00 1.13 2.00 2.00 V VCC = 6.0 V 1.50 2.06 2.60 1.50 2.60 2.60 V 74HC2G14 VT+ VT− VH positive-going threshold voltage negative-going threshold voltage hysteresis voltage see Figure 7, Figure 8 see Figure 7, Figure 8 (VT+ − VT−); see Figure 7, Figure 8 and Figure 9 VCC = 2.0 V 0.30 0.60 1.00 0.30 1.00 1.00 V VCC = 4.5 V 0.60 1.13 1.40 0.60 1.40 1.40 V VCC = 6.0 V 0.80 1.40 1.70 0.80 1.70 1.70 V VCC = 4.5 V 1.20 1.58 1.90 1.20 1.90 1.90 V VCC = 5.5 V 1.40 1.78 2.10 1.40 2.10 2.10 V VCC = 4.5 V 0.50 0.87 1.20 0.50 1.20 1.20 V VCC = 5.5 V 0.60 1.11 1.40 0.60 1.40 1.40 V VCC = 4.5 V 0.40 0.71 - 0.40 - - V VCC = 5.5 V 0.40 0.67 - 0.40 - - V 74HCT2G14 VT+ VT− VH positive-going threshold voltage negative-going threshold voltage hysteresis voltage see Figure 7 and Figure 8 see Figure 7 and Figure 8 (VT+ − VT−); see Figure 7, Figure 8 and Figure 10 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 9 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger 15. Waveforms transfer characteristics VO VT+ VI VT− VI VH VT− VT+ Fig 7. Transfer characteristic VO mna207 mna208 Fig 8. Definition of VT+, VT− and VH 74HC_HCT2G14_1 Product data sheet VH © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 10 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger mna028 100 mna029 1.0 ICC (mA) ICC (µA) 0.8 0.6 50 0.4 0.2 0 0 0 1.0 VI (V) 0 2.0 a. VCC = 2.0 V 2.5 VI (V) 5.0 b. VCC = 4.5 V mna030 1.6 ICC (mA) 0.8 0 0 c. 3.0 VI (V) 6.0 VCC = 6.0 V Fig 9. Typical 74HC2G14 transfer characteristics 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 11 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger mna031 2.0 mna032 3.0 ICC (mA) ICC (mA) 2.0 1.0 1.0 0 0 0 2.5 VI (V) 0 5.0 a. VCC = 4.5 V. 3.0 VI (V) 6.0 b. VCC = 5.5 V. Fig 10. Typical 74HCT2G14 transfer characteristics 16. Application information The slow input rise and fall times cause additional power dissipation, this can be calculated using the following formula: Padd = fi × (tr × ∆ICC(AV) + tf × ∆ICC(AV)) × VCC where: Padd = additional power dissipation (µW); fi = input frequency (MHz); tr = input rise time (ns); 10 % to 90 %; tf = input fall time (ns); 90 % to 10 %; ∆ICC(AV) = average additional supply current (µA). ∆ICC(AV) differs with positive or negative input transitions, as shown in Figure 11 and Figure 12. An example of a relaxation circuit using the 74HC2G14/74HCT2G14 is shown in Figure 13. 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 12 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger mna036 200 ∆ICC(AV) (mA) 150 positive-going edge 100 50 negative-going edge 0 0 2.0 4.0 VCC (V) 6.0 (1) Positive-going edge. (2) Negative-going edge. Fig 11. ∆ICC(AV) as a function of VCC for 74HC2G14; linear change of VI between 0.1VCC to 0.9VCC mna058 200 ∆ICC(AV) (µA) 150 positive-going edge 100 negative-going edge 50 0 0 2 4 VCC (V) 6 (1) Positive-going edge. (2) Negative-going edge. Fig 12. ∆ICC(AV) as a function of VCC for 74HCT2G14; linear change of VI between 0.1VCC to 0.9VCC 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 13 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger R C mna035 1 T 1 0.8 × RC For 74HC2G14: f = --- ≈ ---------------------- 1 T 1 0.67 × RC For 74HCT2G14: f = --- ≈ ------------------------- Fig 13. Relaxation oscillator 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 14 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger 17. Package outline Plastic surface-mounted package; 6 leads SOT363 D E B y X A HE 6 5 v M A 4 Q pin 1 index A A1 1 2 e1 3 c bp Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC SOT363 JEDEC JEITA SC-88 EUROPEAN PROJECTION ISSUE DATE 04-11-08 06-03-16 Fig 14. Package outline SOT363 (SC-88) 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 15 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger Plastic surface-mounted package (TSOP6); 6 leads D SOT457 E B y A HE 6 X v M A 4 5 Q pin 1 index A A1 c 1 2 3 Lp bp e w M B detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.1 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC SOT457 JEDEC JEITA SC-74 EUROPEAN PROJECTION ISSUE DATE 05-11-07 06-03-16 Fig 15. Package outline SOT457 (SC-74) 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 16 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger 18. Abbreviations Table 13. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model DUT Device Under Test 19. Revision history Table 14. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT2G14_1 20061011 Product data sheet - - 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 17 of 19 74HC2G14; 74HCT2G14 NXP Semiconductors Dual inverting Schmitt trigger 20. Legal information 20.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 20.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 20.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 20.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 21. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: [email protected] 74HC_HCT2G14_1 Product data sheet © NXP B.V. 2006. All rights reserved. Rev. 01 — 11 October 2006 18 of 19 NXP Semiconductors 74HC2G14; 74HCT2G14 Dual inverting Schmitt trigger 22. Contents 1 2 3 4 5 6 7 7.1 7.2 8 9 10 11 12 13 14 15 16 17 18 19 20 20.1 20.2 20.3 20.4 21 22 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Transfer characteristics. . . . . . . . . . . . . . . . . . . 9 Waveforms transfer characteristics . . . . . . . . 10 Application information. . . . . . . . . . . . . . . . . . 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information. . . . . . . . . . . . . . . . . . . . . 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2006. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 11 October 2006 Document identifier: 74HC_HCT2G14_1