PHILIPS 2N7002KA

2N7002KA
N-channel TrenchMOS FET
Rev. 02 — 25 September 2007
Product data sheet
1. Product profile
1.1 General description
N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using
TrenchMOS technology.
1.2 Features
n Logic level compatible
n Very fast switching
n Subminiature surface-mounted package n Gate-source ESD protection diodes
1.3 Applications
n Relay driver
n High-speed line driver
1.4 Quick reference data
n VDS ≤ 60 V
n RDSon ≤ 4.4 Ω
n ID ≤ 300 mA
n Ptot ≤ 0.83 W
2. Pinning information
Table 1.
Pinning
Pin
Description
1
gate (G)
2
source (S)
3
drain (D)
Simplified outline
Symbol
D
3
G
1
2
SOT23 (TO-236AB)
S
003aac036
2N7002KA
NXP Semiconductors
N-channel TrenchMOS FET
3. Ordering information
Table 2.
Ordering information
Type number
2N7002KA
Package
Name
Description
Version
TO-236AB
plastic surface-mounted package; 3 leads
SOT23
4. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
25 °C ≤ Tj ≤ 150 °C
-
60
V
VDGR
drain-gate voltage (DC)
25 °C ≤ Tj ≤ 150 °C; RGS = 20 kΩ
-
60
V
VGS
gate-source voltage
-
±15
V
VGSM
peak gate-source voltage
tp ≤ 50 µs; pulsed; duty cycle = 25 %
-
±40
V
ID
drain current
Tsp = 25 °C; VGS = 10 V; see Figure 2 and 3
-
320
mA
Tsp = 100 °C; VGS = 10 V; see Figure 2
-
200
mA
A
IDM
peak drain current
Tsp = 25 °C; pulsed; tp ≤ 10 µs; see Figure 3
-
1.28
Tsp = 25 °C; see Figure 1
Ptot
total power dissipation
-
0.83
W
Tstg
storage temperature
−55
+150
°C
Tj
junction temperature
−55
+150
°C
Source-drain diode
IS
source current
Tsp = 25 °C
-
300
mA
ISM
peak source current
Tsp = 25 °C; pulsed; tp ≤ 10 µs
-
1.2
A
2N7002KA_2
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 02 — 25 September 2007
2 of 11
2N7002KA
NXP Semiconductors
N-channel TrenchMOS FET
003aab946
120
003aac033
120
Pder
(%)
Ider
( %)
80
80
40
40
0
0
0
50
100
150
200
0
50
100
Tsp (°C)
150
200
Tsp (°C)
P tot
P der = ------------------------ × 100 %
P tot ( 25°C )
ID
I der = -------------------- × 100 %
I D ( 25°C )
Fig 1. Normalized total power dissipation as a
function of solder point temperature
Fig 2. Normalized continuous drain current as a
function of solder point temperature
003aab788
10
ID
(A)
Limit RDSon = VDS / ID
tp = 10 µ s
1
100 µ s
1 ms
10-1
10 ms
DC
100 ms
10-2
1
10
102
VDS (V)
Tsp = 25 °C; IDM is single pulse
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
2N7002KA_2
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 02 — 25 September 2007
3 of 11
2N7002KA
NXP Semiconductors
N-channel TrenchMOS FET
5. Thermal characteristics
Table 4.
Thermal characteristics
Symbol Parameter
thermal resistance from junction to solder point
Rth(j-sp)
see Figure 4
[1]
thermal resistance from junction to ambient
Rth(j-a)
[1]
Conditions
Min
Typ
Max
Unit
-
-
150
K/W
-
350
-
K/W
Mounted on a printed-circuit board; minimum footprint; vertical in still air.
003aab351
103
Zth(j-sp)
(K/W)
102
δ = 0.5
0.2
0.1
10
δ=
P
0.05
tp
T
0.02
single pulse
t
tp
T
1
10-5
10-4
10-3
10-2
10-1
1
tp (s)
10
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration
2N7002KA_2
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 02 — 25 September 2007
4 of 11
2N7002KA
NXP Semiconductors
N-channel TrenchMOS FET
6. Characteristics
Table 5.
Characteristics
Tj = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tj = 25 °C
60
75
-
V
Tj = −55 °C
55
-
-
V
16
22
-
V
Tj = 25 °C
1
2
-
V
Tj = 150 °C
0.6
-
-
V
Tj = −55 °C
-
-
3.5
V
Tj = 25 °C
-
0.01
1
µA
Tj = 150 °C
-
-
10
µA
-
50
500
nA
Tj = 25 °C
-
2.8
4.4
Ω
Tj = 150 °C
-
-
8.14
Ω
VGS = 4.5 V; ID = 75 mA; see Figure 6 and 8
-
3.8
5.3
Ω
VGS = 0 V; VDS = 10 V; f = 1 MHz;
see Figure 12
-
13
40
pF
-
8
30
pF
-
4
10
pF
VDS = 50 V; RL = 250 Ω; VGS = 10 V;
RG = 50 Ω; RGS = 50 Ω
-
3
10
ns
-
9
15
ns
Static characteristics
V(BR)DSS
drain-source breakdown
voltage
ID = 10 µA; VGS = 0 V
IG = ±1 mA; VDS = 0 V
V(BR)GSS
gate-source breakdown
voltage
VGS(th)
gate-source threshold voltage ID = 1 mA; VDS = VGS; see Figure 9 and 10
IDSS
drain leakage current
VDS = 48 V; VGS = 0 V
IGSS
gate leakage current
VGS = ±10 V; VDS = 0 V
RDSon
drain-source on-state
resistance
VGS = 10 V; ID = 500 mA; see Figure 6 and 8
Dynamic characteristics
Ciss
input capacitance
Coss
output capacitance
Crss
reverse transfer capacitance
ton
turn-on time
toff
turn-off time
Source-drain diode
VSD
source-drain voltage
IS = 300 mA; VGS = 0 V; see Figure 11
-
0.85
1.5
V
trr
reverse recovery time
-
30
-
ns
Qr
recovered charge
IS = 300 mA; dIS/dt = −100 A/µs; VGS = 0 V;
VDS = 25 V
-
30
-
nC
2N7002KA_2
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 02 — 25 September 2007
5 of 11
2N7002KA
NXP Semiconductors
N-channel TrenchMOS FET
003aab352
1
10
ID
(A)
5
003aab353
10000
VGS (V) = 4
RDSon
(mΩ)
0.8
8000
4.5
4.5
0.6
6000
4
5
0.4
4000
10
VGS (V) = 3.5
0.2
2000
0
0
0
1
2
3
VDS (V)
4
0
Tj = 25 °C
0.2
0.4
0.6
0.8
ID (A)
1
Tj = 25 °C
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values
Fig 6. Drain-source on-state resistance as a function
of drain current; typical values
003aab354
1
ID
(A)
003aac034
2.4
a
0.8
1.8
0.6
1.2
0.4
Tj = 150 °C
25 °C
0.6
0.2
0
0
2
4
VGS (V)
6
0
−60
60
120
180
Tj (°C)
Tj = 25 °C and 150 °C; VDS > ID × RDSon
R DSon
a = ----------------------------R DSon ( 25°C )
Fig 7. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature
2N7002KA_2
Product data sheet
0
© NXP B.V. 2007. All rights reserved.
Rev. 02 — 25 September 2007
6 of 11
2N7002KA
NXP Semiconductors
N-channel TrenchMOS FET
003aab101
3
VGS(th)
(V)
ID
(A)
max
typ
2
10-4
min
1
0
-60
003aab100
10-3
min
typ
max
10-5
10-6
0
60
120
Tj (°C)
180
0
1
2
3
VGS (V)
Tj = 25 °C; VDS = 5 V
ID = 1 mA; VDS = VGS
Fig 9. Gate-source threshold voltage as a function of
junction temperature
003aab356
1
Fig 10. Sub-threshold drain current as a function of
gate-source voltage
003aac035
102
IS
(A)
0.8
C
(pF)
0.6
Ciss
10
0.4
Coss
Crss
0.2
Tj = 25 °C
150 °C
0
0.2
0.4
0.6
0.8
VSD (V)
1
Tj = 25 °C and 150 °C; VGS = 0 V
1
10−1
102
10
VDS (V)
VGS = 0 V; f = 1 MHz
Fig 11. Source current as a function of source-drain
voltage; typical values
Fig 12. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
2N7002KA_2
Product data sheet
1
© NXP B.V. 2007. All rights reserved.
Rev. 02 — 25 September 2007
7 of 11
2N7002KA
NXP Semiconductors
N-channel TrenchMOS FET
7. Package outline
Plastic surface-mounted package; 3 leads
SOT23
D
E
B
A
X
HE
v M A
3
Q
A
A1
1
2
e1
bp
c
w M B
Lp
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max.
bp
c
D
E
e
e1
HE
Lp
Q
v
w
mm
1.1
0.9
0.1
0.48
0.38
0.15
0.09
3.0
2.8
1.4
1.2
1.9
0.95
2.5
2.1
0.45
0.15
0.55
0.45
0.2
0.1
OUTLINE
VERSION
SOT23
REFERENCES
IEC
JEDEC
JEITA
TO-236AB
EUROPEAN
PROJECTION
ISSUE DATE
04-11-04
06-03-16
Fig 13. Package outline SOT23 (TO-236AB)
2N7002KA_2
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 02 — 25 September 2007
8 of 11
2N7002KA
NXP Semiconductors
N-channel TrenchMOS FET
8. Revision history
Table 6.
Revision history
Document ID
Release date
Data sheet status
2N7002KA_2
20070925
Product data sheet
Modifications:
2N7002KA_1
•
Supersedes
2N7002KA_1
The Symbol graphic in Table 1 was updated.
20070605
Product data sheet
2N7002KA_2
Product data sheet
Change notice
-
-
© NXP B.V. 2007. All rights reserved.
Rev. 02 — 25 September 2007
9 of 11
2N7002KA
NXP Semiconductors
N-channel TrenchMOS FET
9. Legal information
9.1
Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
9.2
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
9.3
Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
9.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
TrenchMOS — is a trademark of NXP B.V.
10. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: [email protected]
2N7002KA_2
Product data sheet
© NXP B.V. 2007. All rights reserved.
Rev. 02 — 25 September 2007
10 of 11
2N7002KA
NXP Semiconductors
N-channel TrenchMOS FET
11. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
9.1
9.2
9.3
9.4
10
11
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 9
Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Contact information. . . . . . . . . . . . . . . . . . . . . 10
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 25 September 2007
Document identifier: 2N7002KA_2