Philips Semiconductors FAST Products Product specification 4-bit shifter 74F350 FEATURES PIN CONFIGURATION • Shifts 4 bits of data to 0, 1, 2, 3 places under control of two select lines I–3 1 16 VCC I–2 2 15 Y0 I–1 3 14 Y1 I0 4 13 OE I1 5 12 Y2 I2 6 11 Y3 I3 7 10 S0 GND 8 9 S1 • 3-State outputs for bus organized systems DESCRIPTION The 74F350 is a combination logic circuit that shifts a 4-bit word from 0 to 3 places. No clocking is required as with shift registers. The 74F350 can be used to shift any number of bits any number of places up or down by suitable interconnection. Shifting can be: 1. Logical — with logic zeros filled in at either end of the shifting field. 2. Arithmetic — where the sign bit is extended during a shift down. SF00205 3. End around — where the data word forms a continuous loop. ORDERING INFORMATION The 3-State outputs are useful for bus interface applications or expansion to a larger number of shift positions in end around shifting. The active Low Output Enable (OE) controls the state of the outputs. The outputs are in the high impedance “off” state when OE is High, and they are active when OE is Low. DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C 16-pin plastic DIP N74F350N 16-pin plastic SO N74F350D TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F350 5.2ns 24mA INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW I–n, In Data inputs 1.0/2.0 20µA/1.2mA S0, S1 Select inputs (active Low) 1.0/2.0 20µA/1.2mA Output Enable input (active Low) 1.0/2.0 20µA/1.2mA Data outputs 150/40 3.0mA/24mA OE Y0 – Y3 NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. LOGIC SYMBOL IEC/IEEE SYMBOL 1 2 3 4 I–3 I–2 I–1 9 S1 10 S0 13 OE 5 I0 6 I1 I2 D MUX 7 10 0 9 1 13 EN Y1 Y2 Y3 2 3 15 14 12 0 [SHIFTER] 3 I3 1 Y0 G 11 4 VCC = Pin 16 GND = Pin 8 5 SF00206 6 7 Z10 Z11 Z12 Z13 Z14 Z15 Z16 10 11 12 13 3 2 1 0 11 12 13 14 3 2 1 0 12 13 14 15 3 2 1 0 13 14 15 16 3 2 1 0 ≥1 15 ≥1 14 ≥1 12 ≥1 11 SF00207 March 20, 1989 1 853–0368 96093 Philips Semiconductors FAST Products Product specification 4-bit shifter 74F350 LOGIC DIAGRAM I–3 I–2 1 I–1 2 15 I1 4 14 Y0 VCC = Pin 16 GND = Pin 8 I0 3 I2 5 12 Y1 I3 6 S1 7 S0 9 10 OE 13 11 Y2 Y3 SF00208 FUNCTION TABLE INPUTS OE S1 S0 H X X X X L L L D3 D2 L L H X D2 L H L X X H H X X L H = L = X = Z = Dn = I3 I2 OUTPUTS I1 I0 I–1 I–2 I–3 X X X X X Z Z Z Z D1 D0 X X X D3 D2 D1 D0 D1 D0 D–1 X X D2 D1 D0 D–1 D1 D0 D–1 D–2 X D1 D0 D–1 D–2 X D0 D–1 D–2 D–3 D0 D–1 D–2 D–3 High voltage level Low voltage level Don’t care High impedance “off” state High or Low state of referenced In input March 20, 1989 2 Y3 Y2 Y1 Y0 Philips Semiconductors FAST Products Product specification 4-bit shifter 74F350 APPLICATION FOR 16-BIT SHIFT UP 0, 1, 2, OR 3 PLACES 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 GND I-3 I-2 I-1 I0 I1 I2 I3 I-3 I-2 I-1 I0 I1 I2 I3 I-3 I-2 I-1 I0 I1 I2 I3 I-3 I-2 I-1 I0 I1 I2 I3 S0 S0 S0 S0 S1 S1 S1 S1 OE OE OE Y0 Y1 Y2 Y3 Y0 Y1 Y2 Y3 OE Y0 Y1 Y2 Y3 Y0 Y1 Y2 Y3 S0 S1 OE 0 S0 L H L H S1 L L H H 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 MODE No shift Shift 1 place Shift 2 places Shift 3 places SF00209 APPLICATION FOR 8-BIT END AROUND SHIFT 0, 1, 2, 3, 4, 5, 6, OR 7 PLACES 0 1 2 3 4 I-3 I-2 I-1 I0 I1 I2 I3 I-3 I-2 I-1 I0 I1 I2 I3 5 6 7 I-3 I-2 I-1 I0 I1 I2 I3 I-3 I-2 I-1 I0 I1 I2 I3 S0 S0 S0 S0 S1 S1 S1 S1 OE OE OE Y0 Y1 Y2 Y3 Y0 Y1 Y2 Y3 OE Y0 Y1 Y2 Y3 Y0 Y1 Y2 Y3 S0 S1 S2 S3 0 S2 L L L L H H H H S1 L L H H L L H H S0 L H L H L H L H March 20, 1989 1 2 3 4 MODE No shift Shift end around 1 Shift end around 2 Shift end around 3 Shift end around 4 Shift end around 5 Shift end around 6 Shift end around 7 5 6 7 SF00210 3 Philips Semiconductors FAST Products Product specification 4-bit shifter 74F350 APPLICATION FOR 13-BIT TWO’S COMPLEMENT SCALER 12 11 10 9 8 I-3 I-2 I-1 I0 I1 I2 I3 7 6 5 4 I-3 I-2 I-1 I0 I1 I2 I3 2 1 0 I-3 I-2 I-1 I0 I1 I2 I3 S0 S0 S0 S1 S1 S1 OE OE Y0 Y1 Y2 Y3 3 OE Y0 Y1 Y2 Y3 Y0 Y1 Y2 Y3 S0 S1 S1 L L H H S0 L H L H ÷8 ÷4 ÷2 No change SCALE 1/8 1/4 1/2 1 12 11 10 9 8 7 6 5 4 3 2 1 0 SF00211 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL RATING UNIT VCC Supply voltage PARAMETER –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to VCC V IOUT Current applied to output in Low output state 48 mA Tamb Operating free-air temperature range 0 to +70 °C Tstg Storage temperature range –65 to +150 °C RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER UNIT MIN NOM MAX 5.0 5.5 VCC Supply voltage 4.5 VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –3 mA IOL Low-level output current 24 mA Tamb Operating free-air temperature range +70 °C March 20, 1989 0 4 V V Philips Semiconductors FAST Products Product specification 4-bit shifter 74F350 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL LIMITS TEST CONDITIONS1 PARAMETER TYP2 MIN MAX UNIT VCC = MIN, VIL = MAX ±10%VCC 2.4 VIH = MIN, IOH = MAX ±5%VCC 2.7 VCC = MIN, VIL = MAX ±10%VCC 0.35 0.50 VIH = MIN, IOL = MAX ±5%VCC 0.35 0.50 –0.73 –1.2 V 100 µA VCC = MAX, VI = 2.7V 20 µA Low-level input current VCC = MAX, VI = 0.5V –1.2 mA IOZH Off-state output current, High-level voltage applied VCC = MAX, VO = 2.7V 50 µA IOZL Off-state output current, Low-level voltage applied VCC = MAX, VO = 0.5V –50 µA IOS Short-circuit output current3 VCC = MAX –150 mA 22 35 mA 26 41 mA 26 42 mA VOH High-level output voltage VOL Low-level output voltage VIK Input clamp voltage VCC = MIN, II = IIK II Input current at maximum input voltage VCC = MAX, VI = 7.0V IIH High-level input current IIL V 3.4 V –60 ICCH ICC Supply current (total) ICCL VCC = MAX ICCZ NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER VCC = +5.0V Tamb = +25°C CL = 50pF, RL = 500Ω TEST CONDITION VCC = +5.0V ± 10% Tamb = 0°C to +70°C CL = 50pF, RL = 500Ω MIN TYP MAX MIN MAX UNIT tPLH tPHL Propagation delay In to Yn Waveform 1 3.0 2.5 4.5 4.0 6.0 5.5 3.0 2.5 7.0 6.5 ns tPLH tPHL Propagation delay Sn to Yn Waveform 1 4.0 3.0 7.8 6.5 10.0 8.5 4.0 3.0 11.0 9.5 ns tPZH tPZL Output Enable time to High or Low level Waveform 2 Waveform 3 2.5 4.0 5.0 7.0 7.0 9.0 2.5 4.0 8.0 10.0 ns tPHZ tPLZ Output Disable time to High or Low level Waveform 2 Waveform 3 2.0 2.0 3.9 4.0 5.5 5.5 2.0 2.0 6.5 6.5 ns March 20, 1989 5 Philips Semiconductors FAST Products Product specification 4-bit shifter 74F350 AC WAVEFORMS For all waveforms, VM = 1.5V. In, I–n, Sn VM VM tPLH tPHL VM Yn VM SF00212 Waveform 1. Propagation Delay Data and Select to Output OE OE VM VM tPZH VM tPHZ VM tPZL tPLZ Yn VOH–0.3V VM Yn VM 0V VOL+0.3V SF00213 SF00214 Waveform 2. 3-State Output Enable Time to High Level and Output Disable Time from High Level Waveform 3. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level TEST CIRCUIT AND WAVEFORMS VCC 7.0V VIN RL VOUT PULSE GENERATOR tw 90% NEGATIVE PULSE VM CL AMP (V) VM 10% D.U.T. RT 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V RL AMP (V) 90% 90% Test Circuit for Open Collector Outputs POSITIVE PULSE VM VM 10% TEST tPLZ tPZL All other SWITCH closed closed open DEFINITIONS: RL = Load resistor; see AC electrical characteristics for value. CL = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 10% tw SWITCH POSITION 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00128 March 20, 1989 6