TrilithIC BTS 780 Target Data Overview Features • • • • • • • • • • • • • • • • • Quad switch driver Free configurable as bridge or quad-switch Optimized for DC motor management applications Ultra low RDS ON @ 25 °C: High-side switch: typ. 35 mΩ, Low-side switch: typ. 15 mΩ Very high peak current capability Very low quiescent current Space- and thermal optimized SMD-Power-Package Load and GND-short-circuit-protected Operates up to 40 V 2-Bit status flag diagnosis Overtemperature shut down with hysteresis Short-circuit detection and diagnosis Open-load detection and diagnosis C-MOS compatible inputs Internal clamp diodes Isolated sources for external current sensing Over- and under-voltage detection with hysteresis P-TO263-15-1 Type Ordering Code Package BTS 780 on request P-TO263-15-1 Description The BTS 780 is a TrilithIC contains one double high-side switch and two low-side switches in one P-TO263-15-1. “Silicon instead of heatsink” becomes true The ultra low RDS ON of this device avoids powerdissipation. It saves costs in mechanical construction and mounting and increases the efficiency. The high-side switches are produced in the SIEMENS SMART SIPMOS® technology. It is fully protected and contains the signal conditioning circuitry for diagnosis (the comparable standard high-side product is the BTS 734L1). Semiconductor Group 1 1998-02-01 BTS 780 For minimized RDS ON the two low-side switches are produced in the SIEMENS S-Fet logic level technology (the comparable standard product is the BUZ 100SL). Each drain of these three chips is mounted on separated leadframes (see pin configuration). The sources of all four power transistors are connected to separate pins. So the BTS 780 can be used in H-Bridge configuration as well as in any other switch configuration. Moreover, it is possible to add current sense resistors. All these features open a broad range of automotive and industrial applications. Semiconductor Group 2 1998-02-01 BTS 780 Molding Compound SL1 1 SL1 2 GL1 3 GND 4 GH1 5 ST1 6 SH1 7 Heat-Slug 1 17 Heat-Slug 2 16 GND 8 GH2 9 ST2 10 SH2 11 SL2 12 SL2 13 GL2 14 DL1 DHVS Heat-Slug 3 15 DL2 AEP02224 Figure 1 Pin Configuration (top view) Semiconductor Group 3 1998-02-01 BTS 780 Pin Definitions and Functions Pin No. Symbol Function 1, 2 SL1 Source of low-side switch 1 3 GL1 Gate of low-side switch 1 4, 8 GND Ground 5 GH1 Gate of high-side switch 1 6 ST1 Status of high-side switch 1; open Drain output 7 SH1 Source of high-side switch 1 9 GH2 Gate of high-side switch 2 10 ST2 Status of high-side switch 2; open Drain output 11 SH2 Source of high-side switch 2 12, 13 SL2 Source of low-side switch 2 14 GL2 Gate of low-side switch 2 15 DL2 Drain of low-side switch 2 Heat-Slug 3 or Heat-Dissipator 16 DHVS Drain of high-side switches and power supply voltage Heat-Slug 2 or Heat-Dissipator 17 DL1 Drain of low-side switch 1 Heat-Slug 1 or Heat-Dissipator Bold type: Pin needs power wiring Semiconductor Group 4 1998-02-01 BTS 780 DVHS 16 Heat-Slug 2 ST1 6 DST1 C6V1 Diagnosis ST2 Biasing and Protection 10 DST2 C6V1 GH1 GH2 GND GL1 GL2 R I1 5 3.5 k Ω R I2 9 3.5 k Ω 4, 8 Driver IN OUT 1 2 1 2 DI1 0 0 L L C6V1 0 1 L H 1 0 H L 1 1 H H DI2 C6V1 R O1 R O2 10 k Ω 10 k Ω 11 Heat-Slug 3 15 7 Heat-Slug 1 17 SH2 DL2 SH1 DL1 3 14 1, 2 SL1 12, 13 SL2 AEB02225 Figure 2 Block Diagram Semiconductor Group 5 1998-02-01 BTS 780 Circuit Description Input Circuit The control inputs GH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into the necessary form for driving the power output stages. The inputs GH1 and GH2 are connected to a standard N-channel logic level power-MOS gate. Output Stages The output stages consist of an ultra low RDS ON Power-MOS H-Bridge. Protective circuits make the outputs short-circuit proof to ground and load short-circuit proof. Positive and negative voltage spikes, which occur when driving inductive loads, are limited by integrated power clamp diodes. Short-Circuit Protection (valid only for the high-side switches) The outputs are protected against – output short circuit to ground, and – overload (load short circuit). An internal OP-Amp controls the Drain-Source-Voltage of the HS-Switches by comparing the DS-Voltage-Drop with an internal reference voltage. Above this trippoint the OP-Amp reduces the output current depending on the junction temperature and the drop voltage. In the case of an overloaded high-side switch the corresponding status output is set to low. If the HS-Switches are in OFF-state-Condition internal resistors RO1,2 from SH1,2 to GND pull the voltage at SH1,2 to low values. On each output pin SH1 and SH2 an output examiner circuit compares the output voltages with the internal reference voltage VEO. This results in switching the corresponding status output to low if the source voltage in OFF-Condition is higher then VEO. In H-Bridge condition this feature can be used to protect the low-side switches against short circuit during the OFF-period. Overtemperature Protection (valid only for the high-side-switches) The chip also incorporates an overtemperature protection circuit with hysteresis which switches off the output transistors and sets the status output to low. Semiconductor Group 6 1998-02-01 BTS 780 Under-Voltage-Lockout (UVLO) When VS reaches the switch-on voltage VUV ON the IC becomes active with a hysteresis. The High-Side output transistors are switched off if the supply voltage VS drops below the switch off value VUV OFF. Over-Voltage-Lockout (OVLO) When VS reaches the switch-off voltage VOV OFF the High-Side output transistors are switched off with a hysteresis. The IC becomes active if the supply voltage VS drops below the switch-on value VOV ON. Open Load Detection Open load is detected by current measurement. If the output current drops below an internal fixed level the error flag is set with a delay. Status Flag Various errors as listed in the table “Diagnosis” are detected by switching the open drain outputs ST1 or ST2 to low. Semiconductor Group 7 1998-02-01 BTS 780 Truthtable and Diagnosis (valid only for the High-Side-Switches) Flag GH1 GH2 SH1 Inputs SH2 ST1 ST2 Remarks Outputs 0 0 1 1 0 1 0 1 L L H H L H L H 1 1 1 1 1 1 1 1 0 0 1 0 1 X 0 1 X 0 0 1 Z Z H L H X L H X Z Z H 1 1 0 1 1 1 1 1 1 1 1 0 0 0 1 0 1 X 0 1 X 0 0 1 H H H L H X L H X H H H 0 1 1 1 1 1 1 1 1 0 1 1 Overtemperature high-side switch1 0 1 X X L L X X 1 0 1 1 detected Overtemperature high-side switch2 X X 0 1 X X L L 1 1 1 0 detected Overtemperature both high-side switch 0 X 1 0 1 X L L L L L L 1 0 0 1 0 0 detected detected Over- and Under-Voltage X X L L 1 1 not detected Normal operation; identical with functional truth table Open load at high-side switch1 Open load at high-side switch2 Short circuit to DHVS at high-side switch1 Short circuit to DHVS at high-side switch2 Inputs: Outputs: Status: 0 = Logic LOW Z = Output in tristate condition 1 = No error 1 = Logic HIGH L = Output in sink condition 0 = Error X = don’t care H = Output in source condition stand-by mode switch1 active switch2 active both switches active detected detected detected detected X = Voltage level undefined Semiconductor Group 8 1998-02-01 BTS 780 Electrical Characteristics Absolute Maximum Ratings – 40 °C < Tj < 150 °C Parameter Symbol Limit Values min. Unit Remarks max. High-Side-Switches (Pins DHVS, GH1,2 and SH1,2) Supply voltage HS-drain current HS-input current HS-input voltage VS IDHS IGH VGH – 0.3 43 V – – 30 * A * internally limited –2 2 mA Pin GH1 and GH2 – 10 16 V Pin GH1 and GH2 IST –5 5 mA Pin ST1 and ST2 Status Output ST Status Output current Low-Side-Switches (Pins DL1,2, GL1,2 and SL1,2) Break-down voltage LS-drain current LS-drain current lS-input voltage V(BR)DSS IDLS IDLS VGL 50 – V VGS = 0 V; ID ≤ 1 mA – 30 A – – 50 A t < 1 ms; ν < 0.1 – 10 14 V Pin GL1 and GL2 Tj Tstg – 40 150 °C – – 50 150 °C – Temperatures Junction temperature Storage temperature Thermal Resistances (one HS-LS-Path active) LS-junction case RthjCLS – tbd K/W measured to pin 15 or 17 HS-junction case RthjCHS Rthja – tbd K/W measured to pin 16 – 50 K/W – Junction ambient Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. Semiconductor Group 9 1998-02-01 BTS 780 Operating Range Parameter Symbol Limit Values min. Unit Remarks max. Supply voltage VS VUV OFF 34 V After VS rising above VUV ON Input voltages VGH VGL IST TjHS TjLS – 0.3 15 V – –9 13 V – 0 2 mA Pin ST1 or ST2 – 40 150 °C – – 40 150 °C – Input voltages Status output current HS-junction temperature LS-junction temperature Note: In the operating range the functions given in the circuit description are fulfilled. Semiconductor Group 10 1998-02-01 BTS 780 Electrical Characteristics ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V > VS > 18 V unless otherwise specified Parameter Symbol Limit Values min. typ. max. – 15 40 Unit Test Condition Current Consumption Quiescent current IS µA GH1 = GH2 = L VS = 13.2 V Tj = 25 °C Quiescent current IS – – 50 µA GH1 = GH2 = L VS = 13.2 V Supply current IS IS – 2 4 mA GH1 or GH2 = H – 4 8 mA GH1 and GH2 = H – – 7 V 3.5 – – V – 0.2 – V VS increasing VS decreasing VUV ON – VUV OFF 34 – 43 V 33 – – V – 0.5 – V Supply current Under-Voltage-Lockout (UVLO) VUV ON VUV OFF Switch-OFF voltage Switch ON/OFF hysteresis VUV HY Switch-ON voltage Over-Voltage-Lockout (OVLO) VOV OFF VOV ON Switch-ON voltage Switch OFF/ON hysteresis VOV HY Switch-OFF voltage Semiconductor Group 11 VS increasing VS decreasing VOV OFF – VOV ON 1998-02-01 BTS 780 Electrical Characteristics (cont’d) ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V > VS > 18 V unless otherwise specified Parameter Symbol Limit Values min. typ. max. Unit Test Condition High-Side-Switches1, 2 Static drain-source on-resistance RDS ON H – 35 40 mΩ Static drain-source on-resistance RDS ON H – – 75 mΩ Leakage current IHSLK VFH – – 30 µA – 0.8 1.5 V VGH = VSH = 0 V IFH = 10 A ILKCL – – 10 mA IFH = 10 A ISCP ISCP ISCP ISCP 47 55 66 A 35 44 54 A 28 35 44 A 21 26 34 A Tj = – 40 °C Tj = 25 °C Tj = 85 °C Tj = 150 °C OFF-state examiner-voltage VEO 2 3 4 V VGH = 0 V Output pull-down-resistor RO 4 10 30 kΩ – IOCD 0.01 – 1.2 A – Clamp-diode forward-voltage Clamp-diode leakagecurrent (IFH + ISH) ISH = 10 A Tj = 25 °C ISH = 10 A Short Circuit to GND Initial peak SC current Initial peak SC current Initial peak SC current Initial peak SC current Short Circuit to VS Open Circuit Detection current Semiconductor Group 12 1998-02-01 BTS 780 Electrical Characteristics (cont’d) ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V > VS > 18 V unless otherwise specified Parameter Symbol Limit Values min. typ. max. – – 0.5 Unit Test Condition Switching Times Switch-ON-time; to 90% VSH tON Switch-OFF-time; to 10% VSH tOFF – – 0.5 ms resistive load ISH = 10 A; VS = 12 V VGHH VGHL VGHHY IGHH IGHL RI VGHZ – – 3.5 V – 1.5 – – V – – 0.5 – V – 20 50 90 µA 1 – 50 µA VGH = 5 V VGH = 0.4 V 2.5 3.5 6 kΩ – 5.4 – – V IGH = 1.6 mA Static drain-source on-resistance RDS ON L – 15 18 mΩ Static drain-source on-resistance RDS ON L – – 35 mΩ ISL = 10 A; VGL = 5 V Tj = 25 °C ISH = 10 A Leakage current ILKL – – 100 µA Clamp-diode forward-voltage VFL – 0.8 1.5 V ms resistive load ISH = 10 A; VS = 12 V Control Inputs GH 1, 2 H-input voltage threshold L-input voltage threshold Input voltage hysterese H-input current L-input current Input series resistance Zener limit voltage Low-Side-Switches 1, 2 Semiconductor Group 13 VGL = 0 V VDS = 18 V IFL = 10 A 1998-02-01 BTS 780 Electrical Characteristics (cont’d) ISH1 = ISH2 = ISL1 = ISL2 = 0 A; – 40 °C < Tj < 150 °C; 8 V > VS > 18 V unless otherwise specified Parameter Symbol Limit Values min. typ. max. Unit Test Condition Control Inputs GL1, 2 Gate-threshold-voltage VGL(th) 0.6 1.6 2 V VGL = VDSL; IDL = 100 µA VDSL = 20 V; IDL = 20 A Transconductance gfs – 5 – S VSTL ISTLK VSTZ – 0.2 0.6 V – – 10 µA 5.4 – – V IST = 1.6 mA VST = 5 V IST = 1.6 mA Thermal shutdown junction TjSD temperature 150 – 190 °C – Thermal switch-on junction TjSO temperature 140 – 180 °C – – 10 – °C ∆T = TjSD – TjSO Status Flag Output ST Low output voltage Leakage current Zener-limit-voltage Thermal Shutdown Temperature hysteresis Semiconductor Group ∆T 14 1998-02-01 BTS 780 ΙS CS 470 nF Ι FH1, 2 Ι ST1 , Ι STLK1 CL 1000 µ F +VS DHVS 16 Heat-Slug 2 ST1 6 DST1 C6V1 Ι ST2 , Ι STLK2 ST2 10 Diagnosis Biasing and Protection DST2 C6V1 VST1 VSTL1 VSTZ1 V ST2 VSTL2 VSTZ2 Ι GH1 R I1 GH1 5 3.5 k Ω Ι GH2 VGH1 R I2 GH2 9 3.5 k Ω VGH2 GND 4, 8 VDSH2 VDSH1 _V _V FH2 FH1 Driver IN OUT 1 2 1 2 DI1 C6V1 0 0 L L 0 1 L H 1 0 H L 1 1 H H DI2 C6V1 R O1 R O2 10 k Ω 10 k Ω 11 SH2 Ι SH2 Heat-Slug 3 15 DL2 Ι DL2 Ι LKL VUVON VUVOFF VOVON VOVOFF 7 SH1 Ι SH1 Ι GND Ι LKCL1, 2 17 DL1 Ι DL1 Ι LKL Heat-Slug 1 GL1 3 VGL1 VGL(th)1 GL2 14 VGL2 VGL(th)2 R DSONH = Figure 3 VDSH Ι SH R DSONL = 1, 2 SL1 Ι SL1 12, 13 SL2 Ι SL2 VEO1 VEO2 VDSL1 VDSL2 _V _V FL1 FL2 VDSL Ι SL AES02226 Test Circuit HS-Source-Current Named during Short Circuit Named during Open Circuit Named during Leakage-Cond. ISH1,2 IOCD IHSLK Semiconductor Group ISCP 15 1998-02-01 BTS 780 Watchdog Reset Q R ST22 100 k Ω WD R VCC R ST11 R ST12 100 k Ω CQ 22 µ F D C D GND 100 nF I VS = 12 V C S2 470 µ F C S1 470 nF DHVS 16 Heat-Slug 2 ST1 6 10 k Ω R ST21 TLE 4278G DST1 C6V1 ST2 10 Diagnosis 10 k Ω Biasing and Protection DST2 C6V1 R I1 GH1 5 3.5 k Ω µP R I2 GH2 9 3.5 k Ω GND 4, 8 Driver IN OUT DI1 1 2 1 2 C6V1 0 0 L L 0 1 L H 1 0 H L 1 1 H H DI2 C6V1 R O1 R O2 10 k Ω 10 k Ω Heat-Slug 3 15 DL2 7 SH1 11 SH2 Heat-Slug 1 M1 17 DL1 GL1 3 GL2 14 1, 2 SL1 Figure 4 12, 13 SL2 AES02227 Application Circuit Semiconductor Group 16 1998-02-01 BTS 780 Package Outlines P-TO263-15-1 (Plastic Transistor Single Outline Package) 21.6 ±0.2 8.3 1) 4.4 5.56 ±0.15 1.27 ±0.1 B 0.1 4.8 1) 0.05 2.4 4.7 ±0.5 8.41) 8.21) A 9.25 ±0.2 (15) 1±0.3 8.18 ±0.15 2.7 ±0.3 1±0.2 0...0.15 14x1.4 0.5 ±0.1 0.8 ±0.1 8˚ max. 0.25 1) M A B 0.1 Typical All metal surfaces tin plated, except area of cut. GPT09151 Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Semiconductor Group 17 Dimensions in mm 1998-02-01