Philips Semiconductors Advanced BiCMOS Products Product specification Dual octal registered transceiver (3-State) MB2052 • Latch-up protection exceeds 500mA per FEATURES • Two 8-bit registered transceivers • Live insertion/extraction permitted • Power-up 3-State • Power-up reset • Multiple VCC and GND pins minimize The MB2052 is a dual octal registered transceiver. Two 8-bit registers store data flowing in both directions between two bidirectional buses. Data applied to the inputs is entered and stored on the rising edge of the Clock (nCPXX) provided that the Clock Enable (nCEXX) is Low. The data is then present at the 3-State output buffers, but is only accessible when the Output Enable (nOEXX) is Low. Data flow from A inputs to B outputs is the same as for B inputs to A outputs. Jedec JC40.2 Std 17 • ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model DESCRIPTION The MB2052 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. switching noise • Independent registers for A and B buses • Output capability: +64mA/–32mA QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT 5.7 ns tPLH tPHL Propagation delay nCPBA to nAx or nCPAB to nBx CL = 50pF; VCC = 5V CIN Input capacitance VI = 0V or VCC 4 pF CI/O I/O capacitance VO = 0V or VCC; 3-State 7 pF ICCZ Total supply current Outputs disabled; VCC = 5.5V 120 nA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE ORDER CODE DRAWING NUMBER 52-pin plastic Quad Flat Pack –40°C to +85°C MB2052BB 1418B 52 51 1A2 1 1A3 2 50 49 48 47 46 45 44 43 42 50 Vcc 1B1 1B0 GND 1CEBA 1CPBA 1OEBA LOGIC SYMBOL 1OEAB 1CPAB 1CEAB 1A0 1A1 Vcc PIN CONFIGURATION 41 40 51 1 2 3 5 6 7 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 39 1B2 È È È 48 1CPAB 49 1CEAB 1OEBA 46 45 1CPBA 1OEAB 47 44 1CEBA 38 1B3 37 1B4 1A4 3 GND 4 1A5 5 1A6 6 1A7 7 2A0 8 32 2B1 2A1 9 31 2B2 36 1B5 1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7 35 1B6 MB2052 52-pin PQFP 34 1B7 33 2B0 2A2 10 30 GND 2A3 11 2A4 12 2A5 13 42 41 39 38 37 36 35 34 8 9 10 11 12 13 15 16 2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 19 2CPAB 29 2B3 18 2CEAB 2OEBA 21 28 2B4 22 2CPBA 2OEAB 20 27 2B5 23 2CEBA 26 Vcc 2B6 2B7 2CEBA 2CPBA 21 22 23 24 25 2OEBA 2OEAB 2CPAB 2CEAB 2A7 GND August 23, 1993 2A6 17 18 19 20 Vcc 2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7 14 15 16 33 1 32 31 29 28 27 25 24 853-1712 10586 Philips Semiconductors Advanced BiCMOS Products Product specification Dual octal registered transceiver (3-State) MB2052 LOGIC SYMBOL (IEEE/IEC) 49 44 46 47 48 45 18 EN1 23 EN2 21 EN3 20 EN4 19 C5 22 C6 EN1 EN2 EN3 EN4 C5 C6 42 8 51 41 9 32 1 39 10 31 2 38 11 29 3 37 12 28 5 36 13 27 6 35 15 25 7 34 16 24 50 2, 3, 6 1, 4, 5 2, 3, 6 33 1, 4, 5 PIN DESCRIPTION PIN NUMBER SYMBOL NAME AND FUNCTION 48, 45 19, 22 1CPAB / 1CPBA 2CPAB / 2CPBA Clock input A to B / Clock input B to A 49, 44 18, 23 1CEAB / 1CEBA 2CEAB / 2CEBA Clock enable input A to B / Clock enable input B to A 50, 51, 1, 2, 3, 5, 6, 7 8, 9, 10, 11, 12, 13, 15, 16 1A0 – 1A7 2A0 – 2A7 Data inputs/outputs (A side) 42, 41, 39, 38, 37, 36, 35, 34 33, 32, 31, 29, 28, 27, 25, 24 1B0 – 1B7 2B0 – 2B7 Data inputs/outputs (B side) 47, 46 20, 21 1OEAB / 1OEBA 2OEAB / 2OEBA 4, 17, 30, 43 GND Ground (0V) 14, 26, 40, 52 VCC Positive supply voltage Output enable inputs FUNCTION TABLE for Register nAx or nBx INPUTS INTERNAL OPERATING MODE nAx or nBx nCPXX nCEXX Q X X H NC Hold data L H ↑ ↑ L L L H Load data H = High voltage level L = Low voltage level ↑ = Low-to-High transition X = Don’t care XX = AB or BA NC= No change August 23, 1993 2 Philips Semiconductors Advanced BiCMOS Products Product specification Dual octal registered transceiver (3-State) MB2052 FUNCTION TABLE for Output Enable INPUTS INTERNAL nAx or nBx OPERATING nOEXX Q OUTPUTS MODE H X Z Disable outputs L L L H L H Enable outputs H = High voltage level L = Low voltage level X = Don’t care XX = AB or BA Z = High impedance ”off” state LOGIC DIAGRAM nCEAB nCPAB nOEAB DETAIL A CE nA0 Q D CP Q CE D CP nB0 nA1 nB1 nA2 nB2 nB3 nA3 nA4 DETAIL A X 7 nB4 nA5 nB5 nA6 nB6 nA7 nB7 nCEBA nCPBA nOEBA August 23, 1993 3 Philips Semiconductors Advanced BiCMOS Products Product specification Dual octal registered transceiver (3-State) MB2052 ABSOLUTE MAXIMUM RATINGS1, 2 SYMBOL VCC IIK PARAMETER CONDITIONS RATING UNIT –0.5 to +7.0 V –18 mA –1.2 to +7.0 V VO < 0 –50 mA output in Off or High state –0.5 to +5.5 V output in Low state 128 mA –65 to 150 °C DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current voltage3 VOUT DC output IOUT DC output current Tstg Storage temperature range NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER LIMITS DC supply voltage UNIT MIN MAX 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level Input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current 64 mA 0 10 ns/V –40 +85 °C ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range August 23, 1993 2.0 4 V Philips Semiconductors Advanced BiCMOS Products Product specification Dual octal registered transceiver (3-State) MB2052 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN VIK VOH Input clamp voltage High-level output voltage Tamb = –40°C to +85°C Tamb = +25°C VCC = 4.5V; IIK = –18mA TYP MAX –0.9 –1.2 MIN UNIT MAX –1.2 V VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 2.9 2.5 V VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 3.4 3.0 V VCC = 4.5V; IOH = –32mA; VI = VIL or VIH 2.0 2.4 2.0 V VOL Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.42 0.55 0.55 V VRST Power-up output low voltage3 VCC = 5.5V; IOL = 1mA; VI = GND or VCC 0.13 0.55 0.55 V Input leakage Control pins VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA current Data pins VCC = 5.5V; VI = GND or 5.5V 5 100 100 µA II Power-off leakage current VCC = 0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA Power-up/down 3-State output current4 VCC = 2.1V; VO = 0.5V; VI = GND or VCC; VOE = Don’t care ±5.0 ±50 ±50 µA IIH + IOZH 3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or VIH 5.0 50 50 µA IIL + IOZL 3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH –5.0 –50 –50 µA Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or Vcc 5.0 50 50 µA –70 –180 –180 mA VCC = 5.5V; Outputs High, VI = GND or VCC 120 250 250 µA VCC = 5.5V; Outputs Low, VI = GND or VCC 39 60 60 mA VCC = 5.5V; Outputs 3-State; VI = GND or VCC 120 250 250 µA VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND 0.5 1.5 1.5 mA IOFF IPU/PD ICEX IO Output current1 ICCH ICCL Quiescent supply current ICCZ ∆ICC Additional supply current per input pin2 VCC = 5.5V; VO = 2.5V –50 –50 NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4. This parameter is valid for any VCC between 0V and 2.1V with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a transition time of up to 100µsec is permitted. AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER Tamb = +25°C VCC = +5.0V WAVEFORM MIN TYP Tamb = –40°C to +85°C VCC = +5.0V ±0.5V MAX MIN UNIT MAX fMAX Maximum clock frequency 1 200 250 tPLH tPHL Propagation delay nCPBA to nAx, nCPAB to nBx 1 2.1 2.6 3.7 4.1 4.9 5.3 2.1 2.6 5.4 5.8 ns tPZH tPZL Output enable time nOEBA to nAx, nOEAB to nBx 3 4 1.2 2.0 2.9 3.7 4.1 5.0 1.2 2.0 4.8 5.8 ns tPHZ tPLZ Output disable time nOEBA to nAx, nOEAB to nBx 3 4 1.0 1.5 3.5 3.0 4.7 4.1 1.0 1.5 5.2 4.6 ns August 23, 1993 5 200 MHz Philips Semiconductors Advanced BiCMOS Products Product specification Dual octal registered transceiver (3-State) MB2052 AC SETUP REQUIREMENTS LIMITS SYMBOL PARAMETER WAVEFORM Tamb = +25°C VCC = +5.0V Tamb = –40°C to +85°C VCC = +5.0V ±0.5V MIN TYP MIN UNIT tS(H) ts(L) Setup time nAx to nCPAB or nBx to nCPBA 2 2.5 01.5 0.8 0.0 2.5 1.5 ns th(H) th(L) Hold time nAx to nCPAB or nBx to nCPBA 2 1.5 0.5 0.0 –0.8 1.5 0.5 ns ts(H) ts(L) Setup time nCEAB to nCPAB, nCEBA to nCPBA 2 3.0 2.0 1.4 0.7 3.0 2.0 ns th(H) th(L) Hold time nCEAB to nCPAB, nCEBA to nCPBA 2 0.5 0.0 –0.7 –1.3 0.5 0.0 ns tw(H) tw(L) nCPAB or nCPBA pulse width, High or Low 1 2.5 3.5 1.4 2.1 2.5 3.5 ns ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V 1/fMAX nCPBA or nCPAB VM VM tw(H) tPHL nAx, nBx nCEAB, nCEBA VM tw(L) ts(H) tPLH VM VM VM ts(L) VM th(L) nOEAB, nOEBA tPHZ VM VM Waveform 2. Data Setup and Hold Times VM tPZH VM VM tPZL VOH –0.3V nAx, nBx 0V Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level August 23, 1993 VM th(H) VM Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency nAx, nBx VM nCPAB, nCPBA nAx or nBx nOEAB, nOEBA VM ÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉ tPLZ VM VOL +0.3V 0V Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level 6 Philips Semiconductors Advanced BiCMOS Products Product specification Dual octal registered transceiver (3-State) MB2052 TEST CIRCUIT AND WAVEFORMS VCC 7.0V VIN VOUT PULSE GENERATOR tW 90% VM NEGATIVE PULSE 10% 0V tTHL (tF) CL tTLH (tR) tTLH (tR) RL tTHL (tF) 90% POSITIVE PULSE Test Circuit for 3-State Outputs AMP (V) 90% VM VM 10% 10% tW SWITCH POSITION TEST SWITCH tPLZ closed tPZL closed All other open 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. MB RT = Termination resistance should be equal to ZOUT of pulse generators. August 23, 1993 AMP (V) VM 10% RL D.U.T RT 90% 7 Amplitude Rep. Rate tW tR tF 3.0V 1MHz 500ns 2.5ns 2.5ns