Philips Semiconductors Products Product specification Dual octal transceiver/registers, non-inverting (3-State) MB2652 • Latch-up protection exceeds 500mA per FEATURES • Independent registers for A and B buses • Multiple VCC and GND pins minimize power dissipation with high speed and high output drive. Jedec JC40.2 Std 17 • ESD protection exceeds 2000V per MIL The MB2652 transceiver/register consists of two sets of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output Enable (nOEAB, (nOEBA) and Select (nSAB, nSBA) pins are provided for bus management. STD 883 Method 3015 and 200V per Machine Model switching noise • Live insertion/extraction permitted • Power-up 3-State • Power-up reset • Multiplexed real-time and stored data • Output capability: +64mA/–32mA DESCRIPTION The MB2652 high-performance BiCMOS device combines low static and dynamic QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT 3.3 ns tPLH tPHL Propagation delay nAx to nBx CL = 50pF; VCC = 5V CIN Input capacitance VI = 0V or VCC 4 pF CI/O I/O capacitance VO = 0V or VCC; 3-State 7 pF ICCZ Total supply current Outputs disabled; VCC = 5.5V 120 µA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE ORDER CODE DRAWING NUMBER 52-pin plastic Quad Flat Pack (QFP) –40°C to +85°C MB2652BB 1418B PIN CONFIGURATION LOGIC SYMBOL 52 51 1A2 1A3 50 49 48 47 46 45 44 43 42 Vcc 1B1 1B0 GND 1SBA 1CPBA 1OEBA 1OEAB 1CPAB 1SAB 1A0 1A1 Vcc 50 39 1B2 38 1B3 2 1A4 3 37 1B4 GND 4 36 1B5 1A5 5 35 1B6 1A6 6 1A7 7 2A0 8 32 2B1 2A1 9 31 2B2 MB2652 52–pin PQFP 1 2 3 5 6 7 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 41 40 1 51 48 1CPAB 49 1SAB 1OEAB 47 44 1SBA 1OEBA 46 45 1CPBA 1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7 34 1B7 42 41 39 38 37 36 35 34 8 9 10 11 12 13 15 16 33 2B0 2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A2 10 30 GND 2A3 11 29 2B3 19 2CPAB 2A4 12 28 2B4 18 2SAB 2OEAB 20 27 2B5 23 2SBA 2OEBA 21 22 2CPBA 2A5 13 26 2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7 Vcc 2B6 2B7 2SBA 2CPBA 21 22 23 24 25 2OEBA 2OEAB 2CPAB 2SAB 17 18 19 20 GND 2A7 Vcc 2A6 14 15 16 33 August 23, 1993 1 32 31 29 28 27 25 24 853-1713 10585 Philips Semiconductors Products Product specification Dual octal transceiver/registers, non-inverting (3-State) MB2652 LOGIC SYMBOL (IEEE/IEC) 46 EN1(BA) 21 EN1(BA) 47 EN2(AB) 20 EN2(AB) 45 44 48 23 G5 19 C6 49 G7 50 ≥1 5 ◊ 1 5 1 51 1 2 3 5 6 7 4D 7 ≥1 1 7 2 6D August 23, 1993 22 C4 42 C4 G5 C6 18 G7 8 ≥1 5 ◊ 1 5 1 7 ≥1 1 7 2 6D 41 9 39 10 38 11 37 12 36 13 35 15 34 16 2 4D 33 32 31 29 28 27 25 24 Philips Semiconductors Products Product specification Dual octal transceiver/registers, non-inverting (3-State) MB2652 LOGIC DIAGRAM nOEBA nOEAB nCPBA nSBA nCPAB nSAB 1of 8 Channels 1D C1 Q nA0 nB0 1D C1 Q nA1 nB1 nA2 nB2 nA3 nB3 DETAIL A X 7 nA4 nB4 nA5 nB5 nA6 nB6 nA7 nB7 FUNCTION TABLE INPUTS H L X ↑ * ** DATA I/O OPERATING MODE nOEAB nOEBA nCPAB nCPBA nSAB nSBA nAx nBx L L H H H or L ↑ H or L ↑ X X X X Input Input Isolation Store A and B data X H H H ↑ ↑ H or L ↑ X ** X X Input Unspecified output* Store A, Hold B Store A in both registers L L X L H or L ↑ ↑ ↑ X X X ** Unspecified output* Input Hold A, Store B Store B in both registers L L L L X X X H or L X X L H Output Input Real time B data to A bus Stored B data to A bus H H H H X H or L X X L H X X Input Output Real time A data to B bus Store A data to B bus H L H or L H or L H H Output Output Stored A data to B bus Stored B data to A bus = = = = High voltage level Low voltage level Don’t care Low-to-High clock transition The data output function may be enabled or disabled by various signals at the nOEBA and nOEAB inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock. If both Select controls (nSAB and nSBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must be staggered in order to load both registers. August 23, 1993 3 Philips Semiconductors Products Product specification Dual octal transceiver/registers, non-inverting (3-State) The following examples demonstrate the four fundamental bus-management functions that can be performed with the MB2652.The REAL TIME BUS TRANSFER BUS B TO BUS A A B select pins determine whether data is stored or transferred through the device in real time.The output enable pins determine the direction of the data flow. REAL TIME BUS TRANSFER BUS A TO BUS B A STORAGE FROM A, B, OR A AND B B A } nOEAB nOEBA nCPAB nCPBA nSAB nSBA H H X X L X nOEAB nOEBA nCPAB nCPBA nSAB nSBA X H ↑ X X X L L TRANSFER STORED DATA TO A OR B A B } nOEAB nOEBA nCPAB nCPBA nSAB nSBA H L H|L H|L H H August 23, 1993 B } } nOEAB nOEBA nCPAB nCPBA nSAB nSBA L L X X X L MB2652 4 X H X ↑ ↑ ↑ X X X X Philips Semiconductors Products Product specification Dual octal transceiver/registers, non-inverting (3-State) MB2652 ABSOLUTE MAXIMUM RATINGS1, 2 PARAMETER SYMBOL VCC CONDITIONS RATING UNIT –0.5 to +7.0 V –18 mA –1.2 to +7.0 V VO < 0 –50 mA DC supply voltage IIK DC input diode current VI DC input voltage3 IOK DC output diode current VI < 0 VOUT DC output voltage3 output in Off or High state –0.5 to +5.5 V IOUT DC output current output in Low state 128 mA Tstg Storage temperature range –65 to 150 °C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER LIMITS DC supply voltage UNIT MIN MAX 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level Input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current 64 mA 0 10 ns/V –40 +85 °C ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range August 23, 1993 2.0 5 V Philips Semiconductors Products Product specification Dual octal transceiver/registers, non-inverting (3-State) MB2652 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN VIK VOH Input clamp voltage High–level output voltage Tamb = –40°C to +85°C Tamb = +25°C VCC = 4.5V; IIK = –18mA TYP MAX –0.9 –1.2 MIN UNIT MAX –1.2 V VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 2.9 2.5 V VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 4.0 3.0 V VCC = 4.5V; IOH = –32mA; VI = VIL or VIH 2.0 2.4 2.0 V VOL Low–level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.42 0.55 0.55 V VRST Power-up output low voltage3 VCC = 5.5V; IOL = 1mA; VI = GND or VCC 0.13 0.55 0.55 V Input leakage Control pins VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA current Data pins VCC = 5.5V; VI = GND or 5.5V ±5 ±100 ±100 µA II Power-off leakage current VCC = 0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA Power-up/down 3-State output current4 VCC = 2.0V; VO = 0.5V; VI = GND or VCC; VOE = VOE = Don’t care ±5.0 ±50 ±50 µA IIH + IOZH 3–State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or VIH 5.0 50 50 µA IIL + IOZL 3–State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH –5.0 –50 –50 µA ICEX Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or Vcc 5.0 50 50 µA Output current1 VCC = 5.5V; VO = 2.5V –80 –180 –180 mA VCC = 5.5V; Outputs High, VI = GND or VCC 120 250 250 µA VCC = 5.5V; Outputs Low, VI = GND or VCC 38 60 60 mA VCC = 5.5V; Outputs 3–State; VI = GND or VCC 120 250 250 µA VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND 0.5 1.5 1.5 mA IOFF IPU/PD IO ICCH ICCL Quiescent supply current ICCZ ∆ICC Additional supply current per input pin2 –50 –50 NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4. This parameter is valid for any VCC between 0V and 2.1V with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a transition time of up to 100µsec is permitted. August 23, 1993 6 Philips Semiconductors Products Product specification Dual octal transceiver/registers, non-inverting (3-State) MB2652 AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER Tamb = -40 to +85oC VCC = +5.0V ±0.5V Tamb = +25oC VCC = +5.0V WAVEFORM MAX MIN UNIT MIN TYP fMAX Maximum clock frequency 1 130 190 MAX tPLH tPHL Propagation delay nCPAB to nBx or nCPBA to nAx 1 2.1 2.7 3.9 4.4 5.3 5.7 2.1 2.7 5.8 6.3 ns tPLH tPHL Propagation delay nAx to nBx or nBx to nAx 2 1.4 1.4 3.2 3.3 4.3 4.7 1.4 1.4 4.8 5.3 ns tPLH tPHL Propagation delay nSAB to nBx or nSBA to nAx 3 1.3 2.1 3.6 3.8 5.0 5.3 1.3 2.1 5.6 5.8 ns tPZH tPZL Output enable time nOEBA to nAx 5 6 1.0 1.8 2.9 3.6 4.1 4.8 1.0 1.8 4.8 5.5 ns tPHZ tPLZ Output disable time nOEBA to nAx 5 6 1.0 1.6 3.8 3.2 5.0 4.5 1.0 1.6 5.5 5.1 ns tPZH tPZL Output enable time nOEAB to nBx 5 6 1.2 2.7 3.7 4.5 5.0 5.8 1.2 2.7 5.6 6.3 ns tPHZ tPLZ Output disable time nOEAB to nBx 5 6 1.0 1.2 3.4 3.1 4.7 4.2 1.0 1.2 5.3 4.9 ns 130 MHz AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER +25oC Tamb = VCC = +5.0V WAVEFORM Tamb = -40 to +85oC VCC = +5.0V ±0.5V MIN TYP MIN UNIT ts(H) ts(L) Setup time nAx to nCPBA, nBx to nCPAB 4 2.0 1.5 0.8 -0.1 2.0 1.5 ns th(H) th(L) Hold time nAx to nCPBA, nBx to nCPAB 4 1.5 1.0 0.1 -0.7 1.5 1.0 ns tw(H) tw(L) Pulse width, High or Low nCPAB or nCPBA 1 4.5 3.0 2.5 2.0 4.5 3.0 ns August 23, 1993 7 Philips Semiconductors Products Product specification Dual octal transceiver/registers, non-inverting (3-State) MB2652 AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V 1/fMAX nAx or nBx nCPBA or nCPAB VM VM VM VM VM tPLH tw(H) tw(L) nBx or nAx tPLH tPHL nAx or nBx VM VM VM VM ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ VM nAx or nBx VM tPHL VM ts(H) tPLH nAx or nBx VM ÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉ Waveform 2. Propagation Delay, nAx to nBx or nBx to nAx Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency nSBA or nSAB tPHL VM Waveform 3. Propagation Delay, SBA to nAx or SAB to nBx VM tw(L) th(L) VM Waveform 4. Data Setup and Hold Times nOEBA nOEBA VM VM VM VM nOEAB nOEAB tPZH nAx or nBx tPHZ VM tPZL VOH –0.3V tPLZ VM nAx or nBx 0V Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level VOL +0.3V 0V Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. PIN DESCRIPTION PIN NUMBER SYMBOL 48, 45, 19, 22 1CPAB, 1CPBA, 2CPAB, 2CPBA Clock input A to B / Clock input B to A 49, 44, 18, 23 1SAB, 1SBA, 2SAB, 2SBA Select input A to B / Select input B to A 50, 51, 1, 2, 3, 5, 6, 7, 8, 9, 10, 11, 12, 13, 15, 16 1A0 – 1A7, 2A0 – 2A7 Data inputs/outputs (A side) 42, 41, 39, 38, 37, 36, 35, 34, 33, 32, 31, 29, 28, 27, 25, 24 1B0 – 1B7, 2B0 – 2B7 Data inputs/outputs (B side) 47, 46, 20, 21 1OEAB, 1OEBA, 2OEAB, 2OEBA 4, 17, 30, 43 GND Ground (0V) 14, 26, 40, 52 VCC Positive supply voltage August 23, 1993 VM ts(L) th(H) nCPBA or nCPAB VM VM NAME AND FUNCTION Output enable inputs 8 Philips Semiconductors Products Product specification Dual octal transceiver/registers, non-inverting (3-State) MB2652 TEST CIRCUIT AND WAVEFORMS VCC 7.0V PULSE GENERATOR VIN tW 90% VOUT VM NEGATIVE PULSE 10% 0V tTHL (tF) CL tTLH (tR) tTLH (tR) RL tTHL (tF) 90% POSITIVE PULSE Test Circuit for 3-State Outputs AMP (V) 90% VM VM 10% 10% tW SWITCH POSITION TEST SWITCH tPLZ closed tPZL closed All other open 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. MB RT = Termination resistance should be equal to ZOUT of pulse generators. August 23, 1993 AMP (V) VM 10% RL D.U.T RT 90% 9 Amplitude Rep. Rate tW tR tF 3.0V 1MHz 500ns 2.5ns 2.5ns Philips Semiconductors Products Product specification Dual octal transceiver/registers, non-inverting (3-State) MB2652 tPLH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nCPAB to nBx or nCPBA to nAx Adjustment of tPLH for Load Capacitance and # of Outputs Switching nCPAB to nBx or nCPBA to nAx 5 7 4 6 MAX 3 16 switching 8 switching 2 1 switching Offset in ns ns 5 4.5VCC 5.5VCC 4 3 1 MIN 0 2 –1 1 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 oC 150 200 pF tPHL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nCPAB to nBx or nCPBA to nAx Adjustment of tPHL for Load Capacitance and # of Outputs Switching nCPAB to nBx or nCPBA to nAx 5 7 MAX 4 6 5 4.5VCC 5.5VCC Offset in ns ns 100 4 MIN 3 3 16 switching 8 switching 2 1 switching 1 0 2 –1 1 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 °C 100 150 200 pF tPLH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nAx to nBx or nBx to nAx Adjustment of tPLH for Load Capacitance and # of Outputs Switching nAx to nBx or nBx to nAx 5 6 4 5 MAX 16 switching 8 switching 3 Offset in ns ns 4 4.5VCC 5.5VCC 3 2 MIN 1 0 1 –1 0 –55 1 switching 2 –2 –35 –15 5 25 45 65 85 105 0 125 °C August 23, 1993 50 100 pF 10 150 200 Philips Semiconductors Products Product specification Dual octal transceiver/registers, non-inverting (3-State) MB2652 tPHL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nAx to nBx or nBx to nAx Adjustment of tPHL for Load Capacitance and # of Outputs Switching nAx to nBx or nBx to nAx 5 6 MAX 4 5 16 switching 8 switching 3 Offset in ns ns 4 4.5VCC 5.5VCC 3 2 1 switching 2 1 0 MIN 1 –1 0 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 °C 100 150 200 pF tPLH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nSAB to nBx or nSBA to nAx Adjustment of tPLH for Load Capacitance and # of Outputs Switching nSAB to nBx or nSBA to nAx 7 4 6 3 MAX 16 switching 8 switching 5 Offset in ns 2 4 ns 4.5VCC 5.5VCC 3 2 1 switching 1 0 MIN –1 1 0 –2 –55 –35 –15 5 25 45 65 85 105 125 0 50 °C 100 150 200 pF tPHL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nSAB to nBx or nSBA to nAx Adjustment of tPHL for Load Capacitance and # of Outputs Switching nSAB to nBx or nSBA to nAx 5 7 4 6 16 switching 8 switching MAX 3 4 4.5VCC 3 5.5VCC Offset in ns ns 5 1 0 MIN 2 –1 1 –55 1 switching 2 –2 –35 –15 5 25 45 65 85 105 0 125 °C August 23, 1993 50 100 pF 11 150 200 Philips Semiconductors Products Product specification Dual octal transceiver/registers, non-inverting (3-State) MB2652 tPZH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOEBA to nAx Adjustment of tPZH for Load Capacitance and # of Outputs Switching nOEBA to nAx 6 5 4 5 16 switching 8 switching MAX 3 4.5VCC 3 1 switching Offset in ns ns 4 5.5VCC 2 2 1 0 MIN 1 –1 0 –55 –2 –35 –15 5 25 45 65 85 105 125 0 50 °C 100 150 200 pF tPZL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOEBA to nAx Adjustment of tPZL for Load Capacitance and # of Outputs Switching nOEBA to nAx 5 7 4 6 MAX 16 switching 8 switching 3 4 4.5VCC 5.5VCC 3 1 switching Offset in ns ns 5 2 1 0 MIN 2 –1 1 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 °C 100 150 tPHZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOEBA to nAx Adjustment of tPHZ for Load Capacitance and # of Outputs Switching nOEBA to nAx 7 10 6 16 switching 8 switching 1 switching 8 MAX 6 Offset in ns 5 ns 4 4.5VCC 3 5.5VCC 2 4 2 0 1 –2 MIN 0 –55 200 pF –4 –35 –15 5 25 45 65 85 105 125 0 °C August 23, 1993 50 100 pF 12 150 200 Philips Semiconductors Products Product specification Dual octal transceiver/registers, non-inverting (3-State) MB2652 tPLZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOEBA to nAx Adjustment of tPLZ for Load Capacitance and # of Outputs Switching nOEBA to nAx 6 6 16 switching 8 switching 1 switching 5 MAX 5 4 3 4.5VCC 5.5VCC 2 MIN 3 Offset in ns ns 4 2 1 0 1 –1 0 –2 –55 –35 –15 5 25 45 65 85 105 125 0 50 °C 100 150 200 pF tPZH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOEAB to nBx Adjustment of tPZH for Load Capacitance and # of Outputs Switching nOEAB to nBx 7 5 6 4 MAX 5 16 switching 8 switching 3 ns Offset in ns 4.5VCC 5.5VCC 4 3 1 switching 2 1 2 0 MIN 1 –1 0 –2 –55 –35 –15 5 25 45 65 85 105 125 0 50 °C 100 150 200 pF tPZL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOEAB to nBx Adjustment of tPZL for Load Capacitance and # of Outputs Switching nOEAB to nBx 8 5 7 4 16 switching MAX 5 3 MIN ns 4 4.5VCC 5.5VCC 1 switching 2 1 0 2 –1 1 –55 8 switching 3 Offset in ns 6 –2 –35 –15 5 25 45 65 85 105 125 0 °C August 23, 1993 50 100 pF 13 150 200 Philips Semiconductors Products Product specification Dual octal transceiver/registers, non-inverting (3-State) MB2652 tPHZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOEAB to nBx Adjustment of tPHZ for Load Capacitance and # of Outputs Switching nOEAB to nBx 10 6 MAX 16 switching, 8 switching, 1 switching, 8 5 6 Offset in ns 4 ns 4.5VCC 3 5.5VCC 2 4 2 0 MIN 1 –2 0 –55 –4 –35 –15 5 25 45 65 85 105 0 125 50 °C 150 200 pF tPLZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOEAB to nBx Adjustment of tPLZ for Load Capacitance and # of Outputs Switching nOEAB to nBx 6 6 5 MAX Offset in ns 4 ns 100 4.5VCC 5.5VCC 3 2 5 16 switching 8 switching 4 1 switching 3 2 1 MIN 0 1 –1 0 –55 –2 –35 –15 5 25 45 65 85 105 125 0 50 °C 150 200 pF tTLH vs Temperature (Tamb) CL = 50pF, 1 Output Switching 4 100 Adjustment of tTLH for Load Capacitance and # of Outputs Switching 9 16 switching 8 switching 1 switching 7 3 2 Offset in ns ns 5 4.5VCC 5.5VCC 1 3 1 0 –1 0 –55 –3 –35 –15 5 25 45 65 85 105 0 125 °C August 23, 1993 50 100 pF 14 150 200 Philips Semiconductors Products Product specification Dual octal transceiver/registers, non-inverting (3-State) MB2652 tTHL vs Temperature (Tamb) CL = 50pF, 1 Output Switching 4 Adjustment of tTHL for Load Capacitance and # of Outputs Switching 5 2 Offset in ns ns 3 4.5VCC 5.5VCC 4 16 switching 8 switching 3 1 switching 2 1 0 1 –1 0 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 °C 200 VOHP and VOLV vs Load Capacitance VCC = 5V, VIN = 0 to 3V 6 3.5 5 125°C 25°C –55°C 3.0 125°C 25°C –55°C 4 3 Volts 2.5 Volts 150 pF VOHV and VOLP vs Load Capacitance VCC = 5V, VIN = 0 to 3V 4.0 100 2.0 1.5 2 1 0 125°C 25°C –55°C 1.0 0.5 125°C 25°C –55°C –1 –2 0 –3 0 50 100 150 0 200 pF August 23, 1993 50 100 pF 15 150 200