INTEGRATED CIRCUITS 74LV86 Quad 2-input EXCLUSIVE-OR gate Product specification Supersedes data of 1997 Feb 03 IC24 Data Handbook 1998 Apr 20 Philips Semiconductors Product specification Quad 2-input EXCLUSIVE-OR gate 74LV86 FEATURES DESCRIPTION • Wide Operating voltage: 1.0 to 5.5 V • Optimized for low voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, The 74LV86 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT86. The 74LV86 provides the 2-input EXCLUSIVE-OR function. Tamb = 25°C • Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, Tamb = 25°C • Output capability: standard • ICC category: SSI QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns PARAMETER SYMBOL tPHL/tPLH Propagation delay nA, nB to nY CI Input capacitance CPD CONDITIONS TYPICAL UNIT 11 ns 3.5 pF 30 pF CL = 15 pF; VCC = 3.3 V Power dissipation capacitance per gate VI = GND to VCC1 NOTE: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi (CL × VCC2 fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL × VCC2 × fo) = sum of the outputs. ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. # 14-Pin Plastic DIL –40°C to +125°C 74LV86 N 74LV86 N SOT27-1 14-Pin Plastic SO –40°C to +125°C 74LV86 D 74LV86 D SOT108-1 14-Pin Plastic SSOP Type II –40°C to +125°C 74LV86 DB 74LV86 DB SOT337-1 14-Pin Plastic TSSOP Type I –40°C to +125°C 74LV86 PW 74LV86PW DH SOT402-1 PIN CONFIGURATION LOGIC SYMBOL (IEEE/IEC) 1 1A 1 14 VCC 1B 2 13 4B 1Y 3 12 4A 2A 4 11 4Y 2B 5 10 3B 2Y 6 9 3A 7 8 3Y GND =1 3 2 4 =1 6 5 9 =1 8 10 12 SV00481 =1 11 13 SV00479 1998 Apr 20 2 853–1892 19255 Philips Semiconductors Product specification Quad 2-input EXCLUSIVE-OR gate 74LV86 PIN DESCRIPTION FUNCTION TABLE PIN NUMBER SYMBOL 1, 4, 9, 12 1A – 4A Data inputs 2, 5, 10, 13 1B – 4B Data inputs 3, 6, 8, 11 1Y – 4Y Data outputs 7 GND Ground (0 V) 14 VCC Positive supply voltage INPUTS FUNCTION nA 1Y 3 4 2A 5 2B 2Y 6 9 3A 10 3B 3Y 8 12 4A 13 4B 4Y 11 nB nY L L L L H H H L H H H L NOTES: H = HIGH voltage level L = LOW voltage level LOGIC SYMBOL 1 1A 2 1B OUTPUTS LOGIC DIAGRAM (ONE GATE) A Y B SV00478 SV00480 RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER CONDITIONS MIN TYP. MAX UNIT See Note 1 1.0 3.3 5.5 V DC supply voltage VI Input voltage 0 VCC V VO Output voltage 0 VCC V –40 –40 +85 +125 °C 500 200 100 50 ns/V Tamb Operating ambient temperature range in free air tr, tf Input rise and fall times See DC and AC characteristics VCC = 1.0V to 2.0 V VCC = 2.0V to 2.7 V VCC = 2.7V to 3.6 V VCC = 3.6V to 5.5 V NOTE: 1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5 V. ABSOLUTE MAXIMUM RATINGS1, 2 In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0V). SYMBOL PARAMETER VCC DC supply voltage IIK DC input diode current IOK IO IGND, ICC Tstg PTOT CONDITIONS RATING UNIT –0.5 to +7.0 V VI < –0.5 or VI > VCC + 0.5V 20 mA DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA DC output source or sink current – standard outputs –0.5V < VO < VCC + 0.5V 25 DC VCC or GND current for types with – standard outputs 50 Storage temperature range Power dissipation per package – plastic DIL – plastic mini-pack (SO) – plastic shrink mini-pack (SSOP and TSSOP) –65 to +150 for temperature range: –40 to +125°C above +70°C derate linearly with 12 mW/K above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K 750 500 400 mA mA °C mW NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Apr 20 3 Philips Semiconductors Product specification Quad 2-input EXCLUSIVE-OR gate 74LV86 DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V). LIMITS SYMBOL PARAMETER -40°C to +85°C TEST CONDITIONS TYP1 MIN VIH VIL HIGH level Input voltage LOW level Input voltage VOH VOL VOL HIGH level output voltage; g STANDARD outputs LOW level output voltage all outputs out uts voltage; LOW level output voltage; g STANDARD outputs MIN 0.9 0.9 VCC = 2.0 V 1.4 1.4 VCC = 2.7 to 3.6 V 2.0 2.0 VCC = 4.5 to 5.5 V 0.7VCC UNIT MAX V 0.7VCC VCC = 1.2 V 0.3 0.3 VCC = 2.0 V 0.6 0.6 VCC = 2.7 to 3.6 V 0.8 0.8 0.3VCC 0.3VCC VCC = 1.2 V; VI = VIH or VIL; –IO = 100µA HIGH level output voltage out uts voltage; all outputs MAX VCC = 1.2 V VCC = 4.5 to 5.5 VOH -40°C to +125°C V 1.2 VCC = 2.0 V; VI = VIH or VIL; –IO = 100µA 1.8 2.0 1.8 VCC = 2.7 V; VI = VIH or VIL; –IO = 100µA 2.5 2.7 2.5 VCC = 3.0 V; VI = VIH or VIL; –IO = 100µA 2.8 3.0 2.8 VCC = 4.5 V; VI = VIH or VIL; –IO = 100µA 4.3 4.5 4.3 VCC = 3.0 V; VI = VIH or VIL; –IO = 6mA 2.40 2.82 2.20 VCC = 4.5 V; VI = VIH or VIL; –IO = 12mA 3.60 4.20 3.50 V V VCC = 1.2 V; VI = VIH or VIL; IO = 100µA 0 VCC = 2.0 V; VI = VIH or VIL; IO = 100µA 0 0.2 0.2 VCC = 2.7 V; VI = VIH or VIL; IO = 100µA 0 0.2 0.2 VCC = 3.0 V; VI = VIH or VIL; IO = 100µA 0 0.2 0.2 VCC = 4.5 V; VI = VIH or VIL; IO = 100µA 0 0.2 0.2 VCC = 3.0 V; VI = VIH or VIL; IO = 6mA 0.25 0.40 0.50 VCC = 4.5 V; VI = VIH or VIL; IO = 12mA 0.35 0.55 0.65 V V Input leakage current VCC = 5.5 V; VI = VCC or GND 1.0 1.0 µA ICC Quiescent supply current; SSI VCC = 5.5V; VI = VCC or GND; IO = 0 20.0 40 µA ∆ICC Additional quiescent supply current per input VCC = 2.7 V to 3.6 V; VI = VCC –0.6 V 500 850 µA II NOTE: 1. All typical values are measured at Tamb = 25°C. AC CHARACTERISTICS GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KΩ SYMBOL PARAMETER WAVEFORM VCC(V) tPHL/tPLH Propagation delay nA, nB to nY Figure 1 –40 to +85 °C MIN TYP1 –40 to +125 °C MAX MIN 70 2.0 24 32 41 2.7 18 24 30 3.0 to 3.6 132 19 24 16 20 4.5 to 5.5 4 UNIT MAX 1.2 NOTES: 1. Unless otherwise stated, all typical values are measured at Tamb = 25°C. 2. Typical values are measured at VCC = 3.3 V. 1998 Apr 20 LIMITS CONDITION ns Philips Semiconductors Product specification Quad 2-input EXCLUSIVE-OR gate 74LV86 AC WAVEFORMS TEST CIRCUIT VM = 1.5 V at VCC ≥ 2.7 V and ≤ 3.6 V; VM = 0.5 × VCC at VCC < 2.7 V and ≥ 4.5 V; VOL and VOH are the typical output voltage drop that occur with the output load. Vcc VO Vl VI nA, nB INPUT PULSE GENERATOR VM D.U.T. t PHL CL RL= 1k t PLH VOH nY OUTPUT 50pF RT GND Test Circuit for Outputs VM DEFINITIONS VOL RL = Load resistor SV00477 CL = Load capacitance includes jig and probe capacitiance RT = Termination resistance should be equal to ZOUT of pulse generators. Figure 1. Input (nA, nB) to output (nY) propagation delays and the output transition times. TEST tPLH/tPHL VCC VI < 2.7V VCC 2.7–3.6V 2.7V ≥ 4.5 V VCC SV00902 Figure 2. Load circuitry for switching times. 1998 Apr 20 5 Philips Semiconductors Product specification Quad 2-input EXCLUSIVE-OR gate 74LV86 DIP14: plastic dual in-line package; 14 leads (300 mil) 1998 Apr 20 6 SOT27-1 Philips Semiconductors Product specification Quad 2-input EXCLUSIVE-OR gate 74LV86 SO14: plastic small outline package; 14 leads; body width 3.9 mm 1998 Apr 20 7 SOT108-1 Philips Semiconductors Product specification Quad 2-input EXCLUSIVE-OR gate 74LV86 SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm 1998 Apr 20 8 SOT337-1 Philips Semiconductors Product specification Quad 2-input EXCLUSIVE-OR gate 74LV86 TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm 1998 Apr 20 9 SOT402-1 Philips Semiconductors Product specification Quad 2-input EXCLUSIVE-OR gate 74LV86 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 10 Date of release: 10-98 9397-750-04415