PHILIPS PTPM749A

INTEGRATED CIRCUITS
TPM749
Microcontroller with TrackPoint
microcode from IBM
Product specification
Data Handbook IC20
1996 May 01
Philips Semiconductors
Product specification
Microcontroller with TrackPoint microcode from IBM
DESCRIPTION
TPM749
PIN CONFIGURATION
The Philips Semiconductors TPM749 is a small package, low cost,
ROM-coded 80C51 with IBM’s TrackPoint pointing algorithms
and control code. TrackPoint is the result of years of human factors
research and innovation at IBM. The result is a “velocity sensitive”
pointing solution more efficient and easier to use than “position
sensitive” devices such as the mouse, the trackball, or the touchpad.
IBM has licensed Philips Semiconductors to sell microcontrollers
with TrackPoint code. By purchasing a TPM from Philips, the
purchaser becomes a sub-licensee of Philips. The selling price of
Philips’ TPM includes the royalties for IBM’s intellectual property,
which Philips in turn pays to IBM. Customers for TPMs do not need
to sign any licensing agreement with either IBM or Philips. This code
is the intellectual property of IBM, which is covered by numerous
patents, and must be treated accordingly.
P3.4/A4 1
28 VCC
P3.3/A3 2
27 P3.5/A5
P3.2/A2/A10 3
26 P3.6/A6
P3.1/A1/A9 4
25 P3.7/A7
P3.0/A0/A8 5
24 P0.4/PWM OUT
P0.1/OE
7
P0.0/ASEL
8
RST
9
The TPM is fabricated with Philips high-density CMOS technology.
Philips epitaxial substrate minimizes CMOS latch-up sensitivity.
The TPM contains a 2k × 8 ROM, a 64 × 8 RAM, 21 I/O lines, a
16-bit auto-reload counter/timer, a fixed-priority level interrupt
structure, an on-chip oscillator, a five channel multiplexed 8-bit A/D
converter, and an 8-bit PWM output.
23 P0.3
6
P0.2
SHRINK
SMALL
OUTLINE
PACKAGE
22 P1.7/T0/D7
21 P1.6/INT1/D6
20 P1.5/INT0/D5
X2 10
19 AVCC
X1 11
18 AVSS
VSS 12
17 P1.4/ADC4/D4
P1.0/ADC0/D0 13
16 P1.3/ADC3/D3
P1.1/ADC1/D1 14
15 P1.2/ADC2/D2
The TPM supports two power reduction modes of operation referred
to as the idle mode and the power-down mode.
4
1
26
5
25
PLASTIC
LEADED
CHIP
CARRIER
FEATURES
• 80C51 based architecture
• Small package sizes
11
– 28-pin Shrink Small Outline Package (SSOP)
19
12
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
– 28-pin PLCC
• Low power consumption:
– Normal operation: less than 11mA @ 5V, 12MHz
– Idle mode
– Power-down mode
• 2k × 8 ROM
• 64 × 8 RAM
• 16-bit auto reloadable counter/timer
• 5-channel 8-bit A/D converter
• 8-bit PWM output/timer
• 10-bit fixed-rate timer
• CMOS and TTL compatible
Function
P3.4/A4
P3.3/A3
P3.2/A2/A10
P3.1/A1/A9
P3.0/A0/A8
P0.2
P0.1/OE
P0.0/ASEL
RST
X2
X1
VSS
P1.0/ADC0/D0
P1.1/ADC1/D1
18
Pin
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Function
P1.2/ADC2/D2
P1.3/ADC3/D3
P1.4/ADC4/D4
AVSS
AVCC
P1.5/INT0/D5
P1.6/INT1/D6
P1.7/T0/D7
P0.3
P0.4/PWM OUT
P3.7/A7
P3.6/A6
P3.5/A5
VCC
SU00692A
ORDERING INFORMATION
ORDERING CODE
TEMPERATURE RANGE AND PACKAGE
DRAWING NUMBER
PTPM749 A
0 to +70°C, Plastic Leaded Chip Carrier
SOT261-3
PTPM749 DB
0 to +70°C, Shrink Small Ouline Package
SOT341-1
For compatible pointing device, contact:
CONTACT
COMPANY
TELEPHONE
Bokam Engineering
Ms. Jane Kamenster
(714)513-2200
CTS Corporation
Mr. Dave Poole
(219)589-7169
IBM is a registered trademark, and TrackPoint is a trademark of IBM Corporation.
1996 May 01
2
853-1831 16753
Philips Semiconductors
Product specification
Microcontroller with TrackPoint microcode from IBM
TPM749
PIN DESCRIPTION
PIN NO.
TYPE
VSS
MNEMONIC
12
I
Circuit Ground Potential.
VCC
28
I
Supply voltage during normal, idle, and power-down operation.
8–6
23, 24
I/O
P0.0–P0.4
P1.0–P1.7
6
7
I
I
8
I
13–17,
20–22
I/O
20
21
22
13–17
I
I
I
I
NAME AND FUNCTION
Port 0: Port 0 is a 5-bit bidirectional port. Port 0.0–P0.2 are open drain. Port 0.0–P0.2 pins that have
1s written to them float, and in that state can be used as high-impedance inputs. P0.3–P0.4 are
bidirectional I/O port pins with internal pull-ups. These pins are driven low if the port register bit is
written with a 0. The state of the pin can always be read from the port register by the program. Port 0.3
and 0.4 have internal pull-ups that function identically to port 3. Pins that have 1s written to them are
pulled high by the internal pull-ups and can be used as inputs.
While P0.0 anbd P0.1 differ from “standard TTL” characteristics, they are close enough for the pins to
still be used as general-purpose I/O.
VPP (P0.2) – Programming voltage input.
OE (P0.1) – Input which specifies verify mode (output enable).
OE = 1 output enabled (verify mode).
ASEL (P0.0) – Input which indicates which bits of the EPROM address are applied to port 3.
ASEL = 0 low address byte available on port 3.
ASEL = 1 high address byte available on port 3 (only the three least significant bits are used).
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 pins that have 1s written to
them are pulled high by the internal pull-ups and can be used as inputs. P0.3–P0.4 pins are
bidirectional I/O port pins with internal pull-ups. As inputs, port 1 pins that are externally pulled low will
source current because of the internal pull-ups. (See DC Electrical Characteristics: IIL). Port 1 also
serves the special function features of the SC80C51 family as listed below:
INT0 (P1.5): External interrupt.
INT1 (P1.6): External interrupt.
T0 (P1.7): Timer 0 external input.
ADC0 (P1.0)–ADC4 (P1.4): Port 1 also functions as the inputs to the five channel multiplexed A/D
converter. These pins can be used as outputs only if the A/D function has been disabled. These pins
can be used as digital inputs while the A/D converter is enabled.
Port 1 serves to output the addressed EPROM contents in the verify mode and accepts as inputs the
value to program into the selected address during the program mode.
P3.0–P3.7
5–1,
27–25
I/O
Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s written to
them are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 3 pins that are
externally being pulled low will source current because of the pull-ups. (See DC Electrical
Characteristics: IIL). Port 3 also functions as the address input for the EPROM memory location to be
programmed (or verified). The 11-bit address is multiplexed into this port as specified by P0.0/ASEL.
RST
9
I
Reset: A high on this pin for two machine cycles while the oscillator is running resets the device. An
internal diffused resistor to VSS permits a power-on RESET using only an external capacitor to VCC.
After the device is reset, a 10-bit serial sequence, sent LSB first, applied to RESET, places the device
in the programming state allowing programming address, data and VPP to be applied for programming
or verification purposes. The RESET serial sequence must be synchronized with the X1 input.
X1
11
I
Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator circuits. X1
also serves as the clock to strobe in a serial bit stream into RESET to place the device in the
programming state.
X2
10
O
Crystal 2: Output from the inverting oscillator amplifier.
AVCC
1
19
I
Analog supply voltage and reference input.
AVSS
1
18
I
Analog supply and reference ground.
NOTE:
1. AVSS (reference ground) must be connected to 0V (ground). AVCC (reference input) cannot differ from VCC by more than ±0.2V, and must be
in the range 4.5V to 5.5V.
1996 May 01
3
1996 May 01
Y–
X–
R7
1M
4
VB GND
1
8
R1
10K
9
7 DATA
6 CLK
RST
R0
10K
11
13
4
12
5
U3
16 DS1267-10
VCC
3
+5
R5
332
R8
1M
3
2
8
LMC6482
1
U1
4
7
LMC6482
U1
C5
33pF
650K *
R6
5
6
650K *
R2
C6
33pF
C1
33pF
C2
33pF
+
C7
0.1uF
RST
20
X1
VSS AVSS
12
18
8
P0.0 7
P0.1
5
P3.0 4
P3.1
1
P3.4 2
P3.3 27
P3.5 3
P3.2
P1.5
PLCC28
U2
PTPM749
+5 28 VCC
19
AVCC
13
17 ADC0
ADC4
21
22 P1.6
23 P1.7
P0.3
26
25 P3.6
24 P3.7
P0.4
10
X2
9
C3
2.2uF
X1
12.0MHz
11
+5
+5
+5
+ C4
10uF
NOTMOU
FTRANS
BUTTON3 *
INVERTX *
R3
10K
+5
R10
6.04K
+5
+5
R1
10K
+5
R9
6.04K
+5
1. CONNECT BUTTON 3 SIGNAL TO GND IF MIDDLE BUTTON USED.
2. CONNECT INVERTX SIGNAL TO GND IF BOKAM SENSOR USED.
3. Q1 MAY BE REPLACED WITH A JUMPER IF POWER DRAW IS NOT A CONCERN.
C5, C6 MAY THEN BE INCREASED TO A MAXIMUM OF 3900pF.
4. R9, R10 MAY BE INCREASED IF CABLE TO SYSTEM BOARD IS SHORT.
5. +5V, GND CONNECTIONS TO SYSTEM SUPPLY SHOULD BE FROM A SINGLE POINT CONNECTION.
6. THIS CIRCUIT CAN ONLY BE USED WHEN OVERALL STICK RESISTANCE HAS PRODUCTION VARIATIONS WITHIN 5%.
R4
10K
R11
10K
3
2
TO
SYSTEM
BOARD
GND
+5
MCLK
MDATA
TO EXTERNAL
MOUSE
DATA
CLK
Microcontroller with TrackPoint microcode from IBM
MANUFACTURER:
Q1 – SILICONIX
U3 – DALLAS SEMICONDUCTOR
RIGHT
LEFT
MIDDLE
BUTTON ASSEMBLY
Y+
X+
PS1
PSTICK
STICK ASSEMBLY
Q1
VP0610T
1
+5
Philips Semiconductors
Product specification
TPM749
SCHEMATIC OF TrackPoint SYSTEM WITH PHILIPS TPM749
SU00694
Philips Semiconductors
Product specification
Microcontroller with TrackPoint microcode from IBM
TPM749
OSCILLATOR CHARACTERISTICS
I/O Ports
X1 and X2 are the input and output, respectively, of an inverting
amplifier which can be configured for use as an on-chip oscillator.
The I/O pins provided by the TPM consist of port 0, port 1, and
port 3.
To drive the device from an external clock source, X1 should be
driven while X2 is left unconnected. There are no requirements on
the duty cycle of the external clock signal, because the input to the
internal clock circuitry is through a divide-by-two flip-flop. However,
minimum and maximum high and low times specified in the data
sheet must be observed.
Port 0
Port 0 is a 5-bit bidirectional I/O port and includes alternate functions
on some pins of this port. Pins P0.3 and P0.4 are provided with
internal pullups while the remaining pins (P0.0, P0.1, and P0.2) have
open drain output structures. The alternate function for port P0.4 is
PWM output.
IDLE MODE
If the alternate function PWM is not being used, then this pin may be
used as an I/O port.
The TPM includes the 80C51 power-down and idle mode features.
In idle mode, the CPU puts itself to sleep while all of the on-chip
peripherals except the A/D and PWM stay active. The functions that
continue to run while in the idle mode are Timer 0, Timer I, and the
interrupts. The instruction to invoke the idle mode is the last
instruction executed in the normal operating mode before the idle
mode is activated. The CPU contents, the on-chip RAM, and all of
the special function registers remain intact during this mode. The
idle mode can be terminated either by any enabled interrupt (at
which time the process is picked up at the interrupt service routine
and continued), or by a hardware reset which starts the processor in
the same manner as a power-on reset. Upon powering-up the
circuit, or exiting from idle mode, sufficient time must be allowed for
stabilization of the internal analog reference voltages before an A/D
conversion is started.
Port 1
Port 1 is an 8-bit bidirectional I/O port whose structure is identical to
the 80C51, but also includes alternate input functions on all pins.
The alternate pin functions for port 1 are:
P1.0-P1.4 - ADC0-ADC4 - A/D converter analog inputs
P1.5 INT0 - external interrupt 0 input
P1.6 INT1 - external interrupt 1 input
P1.7 - T0 - timer 0 external input
If the alternate functions INT0, INT1, or T0 are not being used, these
pins may be used as standard I/O ports. It is necessary to connect
AVCC and AVSS to VCC and VSS, respectively, in order to use P1.5,
P1.6, and P1.7 pins as standard I/O pins. When the A/D converter is
enabled, the analog channel connected to the A/D may not be used
as a digital input; however, the remaining analog inputs may be used
as digital inputs. They may not be used as digital outputs. While the
A/D is enabled, the analog inputs are floating.
POWER-DOWN MODE
In the power-down mode, the oscillator is stopped and the
instruction to invoke power-down is the last instruction executed.
Only the contents of the on-chip RAM are preserved. A hardware
reset is the only way to terminate the power-down mode. The control
bits for the reduced power modes are in the special function register
PCON.
Port 3
Port 3 is an 8-bit bidirectional I/O port whose structure is identical to
the 80C51. Note that the alternate functions associated with port 3
of the 80C51 have been moved to port 1 of the TPM (as applicable).
See Figure 1 for port bit configurations.
Table 1. External Pin Status During Idle and
Power-Down Modes
MODE
Port 0*
Port 1
Port 2
Data
Data
Data
Data
Data
Data
Idle
Power-down
*
Except for PWM output (P0.4).
ALTERNATE
OUTPUT
FUNCTION
READ
LATCH
ALTERNATE
OUTPUT
FUNCTION
READ
LATCH
VDD
INTERNAL
PULL-UP
INT. BUS
D
Q
P1.X
LATCH
WRITE TO
LATCH
READ
PIN
CL
INT. BUS
D
Q
P0.X
LATCH
P1.X
PIN
WRITE TO
LATCH
Q
READ
PIN
ALTERNATE INPUT
FUNCTION
CL
P0.X
PIN
Q
ALTERNATE INPUT
FUNCTION
SU00306
Figure 1. Port Bit Latches and I/O Buffers
1996 May 01
5
Philips Semiconductors
Product specification
Microcontroller with TrackPoint microcode from IBM
SmN+1
RmN+1
SmN
RmN
TPM749
IN+1
IN
To Comparator
+
Multiplexer
RS
CC
CS
VANALOG
INPUT
Rm = 0.5 - 3 kΩ
CS + CC = 15pF maximum
RS = Recommended < 9.6 kΩ for 1 LSB @ 12MHz
NOTE:
Because the analog to digital converter has a sampled-data comparator, the input looks capacitive to a source. When a conversion
is initiated, switch Sm closes for 8tcy (8µs @ 12MHz crystal frequency) during which time capacitance Cs + Cc is charged. It should
be noted that the sampling causes the analog input to present a varying load to an analog source.
SU00199
Figure 2. A/D Input: Equivalent Circuit
A/D CONVERTER PARAMETER DEFINITIONS
Gain Error
The following definitions are included to clarify some specifications
given and do not represent a complete set of A/D parameter
definitions.
Gain error is the deviation between the ideal and actual analog input
voltage required to cause the final code transition to a full-scale
output code after the offset error has been removed. This may
sometimes be referred to as full scale error.
Absolute Accuracy Error
Offset Error
Absolute accuracy error of a given output is the difference between
the theoretical analog input voltage to produce a given output and
the actual analog input voltage required to produce the same code.
Since the same output code is produced by a band of input voltages,
the “required input voltage” is defined as the midpoint of the band of
input voltage that will produce that code. Absolute accuracy error
not specified with a code is the maximum over all codes.
Offset error is the difference between the actual input voltage that
causes the first code transition and the ideal value to cause the first
code transition. This ideal value is 1/2 LSB above Vref–.
Channel to Channel Matching
Channel to channel matching is the maximum difference between
the corresponding code transitions of the actual characteristics
taken from different channels under the same temperature, voltage
and frequency conditions.
Nonlinearity
If a straight line is drawn between the end points of the actual
converter characteristics such that zero offset and full scale errors
are removed, then non-linearity is the maximum deviation of the
code transitions of the actual characteristics from that of the straight
line so constructed. This is also referred to as relative accuracy and
also integral non-linearity.
Crosstalk
Crosstalk is the measured level of a signal at the output of the
converter resulting from a signal applied to one deselected channel.
Total Error
Differential Non-Linearity
Maximum deviation of any step point from a line connecting the ideal
first transition point to the ideal last transition point.
Differential non-linearity is the maximum difference between the
actual and ideal code widths of the converter. The code widths are
the differences expressed in LSB between the code transition
points, as the input voltage is varied through the range for the
complete set of codes.
1996 May 01
Relative Accuracy
Relative accuracy error is the deviation of the ADC’s actual code
transition points from the ideal code transition points on a straight
line which connects the ideal first code transition point and the final
code transition point, after nullifying offset error and gain error. It is
generally expressed in LSBs or in percent of FSR.
6
Philips Semiconductors
Product specification
Microcontroller with TrackPoint microcode from IBM
TPM749
ABSOLUTE MAXIMUM RATINGS1, 3, 4
PARAMETER
RATING
UNIT
Storage temperature range
–65 to +150
°C
Voltage from VCC to VSS
–0.5 to +6.5
V
Voltage from any pin to VSS (except VPP)
Power dissipation
Voltage from VPP pin to VSS
–0.5 to VCC + 0.5
V
1.0
W
–0.5 to + 13.0
V
NOTES ON PAGE 8.
DC ELECTRICAL CHARACTERISTICS
Tamb = 0°C to +70°C, AVCC = 5V ±5, AVSS = 0V4
VCC = 5V ± 10%, VSS = 0V
LIMITS4
TEST
SYMBOL
ICC
PARAMETER
CONDITIONS
MIN
TYP1
MAX
UNIT
–0.5
0.2VCC+0.9
0.7VCC
0.2VCC–0.1
VCC+0.5
VCC+0.5
V
V
V
–0.5
0.7VCC
0.3VCC
VCC+0.5
V
V
0.45
0.45
V
V
Supply current (see Figure 5)
Inputs
VIL
VIH
VIH1
Input low voltage
Input high voltage, except X1, RST
Input high voltage, X1, RST
VIL1
VIH2
P0.2
Input low voltage
Input high voltage
Outputs
VOL
VOL1
Output low voltage, ports 1, 3, 0.3, and 0.4
(PWM disabled)
Output low voltage, port 0.2
VOH
Output high voltage, ports 1, 3, 0.3, and 0.4
(PWM disabled)
VOH2
Output high voltage, P0.4 (PWM enabled)
VOL2
Port 0.0 and 0.1 – Drivers
Output low voltage
Driver, receiver combined:
Capacitance
C
IIL
ILI
Logical 0 input current,
ports 1, 3, 0.3, and 0.4 (PWM disabled)11
Logical 1 to 0 transition current,
ports 1, 3, 0.3 and 0.411
Input leakage current, port 0.0, 0.1 and 0.2
RRST
Reset pull-down resistor
CIO
Pin capacitance
IPD
Power-down current5
ITL
IOL = 1.6mA2
IOL = 3.2mA2
IOH = –60µA,
IOH = –25µA
IOH = –10µA
IOH = –400µA
IOH = –40µA
IOL = 3mA
(over VCC range)
V
V
V
V
V
0.4
V
10
pF
VIN = 0.45V
–50
µA
VIN = 2V
–650
µA
0.45 < VIN < VCC
±10
µA
175
kΩ
Test freq = 1MHz,
Tamb = 25°C
10
pF
VCC = 2 to 5.5V
VCC = 2 to 6.0V
50
µA
25
NOTES ON FOLLOWING PAGE.
1996 May 01
2.4
0.75VCC
0.9VCC
2.4
0.9VCC
7
Philips Semiconductors
Product specification
Microcontroller with TrackPoint microcode from IBM
TPM749
DC ELECTRICAL CHARACTERISTICS (Continued)
Tamb = 0°C to +70°C, AVCC = 5V ±5, AVSS = 0V4
VCC = 5V ± 10%, VSS = 0V
LIMITS4
TEST
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP1
MAX
UNIT
5.5
V
39
mA
AVCC+0.2
V
15
pF
Analog Inputs (A/D guaranteed only with quartz window covered.)
AVCC = VCC±0.2V
AVCC
Analog supply voltage10
AICC
Analog operating supply current
AVIN
Analog input voltage
CIA
Analog input capacitance
tADS
Sampling time
8tCY
s
tADC
Conversion time
40tCY
s
4.5
AVCC = 5.12V
AVSS–0.2
Analog Inputs (A/D guaranteed only with quartz window covered.) (Continued)
R
Resolution
8
bits
ERA
Relative accuracy
±1
LSB
OSe
Zero scale offset
±1
LSB
Ge
Full scale gain error
0.4
%
MCTC
Channel to channel matching
±1
LSB
Ct
Crosstalk
–60
dB
0–100kHz
NOTES:
1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any conditions other than those described in the AC and DC Electrical Characteristics section
of this specification is not implied.
2. Under steady state (non-transient) conditions, IOL must be externally limited as follows:
10mA
Maximum IOL per port pin:
26mA
Maximum IOL per 8-bit port:
67mA
Maximum total IOL for all outputs:
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed
test conditions.
3. This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static
charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima.
4. Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to VSS unless otherwise
noted.
5. Power-down ICC is measured with all output pins disconnected; port 0 = VCC; X2, X1 n.c.; RST = VSS.
6. ICC is measured with all output pins disconnected; X1 driven with tCLCH, tCHCL = 5ns, VIL = VSS + 0.5V, VIH = VCC – 0.5V; X2 n.c.;
RST = port 0 = VCC. ICC will be slightly higher if a crystal oscillator is used.
7. Idle ICC is measured with all output pins disconnected; X1 driven with tCLCH, tCHCL = 5ns, VIL = VSS + 0.5V, VIH = VCC – 0.5V; X2 n.c.;
port 0 = VCC; RST = VSS.
8. Load capacitance for ports = 80pF.
9. The resistor ladder network is not disconnected in the power down or idle modes. Thus, to conserve power, the user may remove AVCC.
10. If the A/D function is not required, or if the A/D function is only needed periodically, AVCC may be removed without affecting the operation of
the digital circuitry. Contents of ADCON and ADAT are not guaranteed to be valid. If AVCC is removed, the A/D inputs must be lowered to
less than 0.5V. Digital inputs on P1.0–P1.4 will not function normally.
11. These parameters do not apply to P1.0–P1.4 if the A/D function is enabled.
1996 May 01
8
Philips Semiconductors
Product specification
Microcontroller with TrackPoint microcode from IBM
TPM749
AC ELECTRICAL CHARACTERISTICS
Tamb = 0°C to +70°C, VCC = 5V ±10%, VSS = 0V4, 8
12MHz CLOCK
SYMBOL
1/tCLCL
PARAMETER
MIN
MAX
Oscillator frequency:
VARIABLE CLOCK
MIN
MAX
UNIT
3.5
12
MHz
External Clock (Figure 3)
tCHCX
High time
20
20
ns
tCLCX
Low time
20
20
ns
tCLCH
Rise time
20
20
ns
tCHCL
Fall time
20
20
ns
EXPLANATION OF THE AC SYMBOLS
Each timing symbol has five characters. The first character is always
‘t’ (= time). The other characters, depending on their positions,
indicate the name of a signal or the logical status of that signal. The
designations are:
C – Clock
D – Input data
H – Logic level high
L – Logic level low
Q – Output data
T – Time
V – Valid
X – No longer a valid logic level
Z – Float
tCLCX
VCC –0.5
0.2 VCC + 0.9
0.2 VCC – 0.1
tCHCX
0.45V
tCLCH
tCHCL
tCLCL
SU00297
Figure 3. External Clock Drive
VCC –0.5
0.45V
0.2 VCC + 0.9
0.2 VCC – 0.1
SU00307
Figure 4. AC Testing Input/Output
1996 May 01
9
Philips Semiconductors
Product specification
Microcontroller with TrackPoint microcode from IBM
TPM749
22
MAX ACTIVE ICC6
20
18
16
14
ICC mA
12
TYP ACTIVE ICC6
10
8
6
MAX IDLE ICC7
4
2
TYP IDLE ICC7
4MHz
8MHz
12MHz
FREQ
SU00693
Figure 5. ICC vs. FREQ
Maximum ICC values taken at VCC = 5.5V and worst case temperature.
Typical ICC values taken at VCC = 5.0V and 25°C.
Notes 6 and 7 refer to AC Electrical Characteristics.
1996 May 01
10
Philips Semiconductors
Product specification
Microcontroller with TrackPoint microcode from IBM
PLCC28: plastic leaded chip carrer; 28 leads; pedestal
1996 May 01
11
TPM749
SOT261-3
Philips Semiconductors
Product specification
Microcontroller with TrackPoint microcode from IBM
SSOP28: plastic shrink small outline package; 28 leads; body width 5.3mm
1996 May 01
12
TPM749
SOT341-1
Philips Semiconductors
Product specification
Microcontroller with TrackPoint microcode from IBM
NOTES
1996 May 01
13
TPM749
Philips Semiconductors
Product specification
Microcontroller with TrackPoint microcode from IBM
TPM749
DEFINITIONS
Data Sheet Identification
Product Status
Definition
Objective Specification
Formative or in Design
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Preliminary Specification
Preproduction Product
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Product Specification
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
 Copyright Philips Electronics North America Corporation 1996
All rights reserved. Printed in U.S.A.
458291/4M/FP/pp16
Document order number:
Date of release: 05/96
9397 750 00817