ADVANCED BiCMOS PRODUCTS MB2374 Dual octal D-type flip-flop; positive-edge trigger (3-State) Product specification IC23 Philips Semiconductors August 23, 1993 Philips Semiconductors Product specification 16-bit D-type flip-flop; positive-edge trigger (3-State) FEATURES MB2374 DESCRIPTION • Two 8-bit positive edge triggered registers • Live insertion/extraction permitted • Power-up 3-State • Power-up reset • Multiple VCC and GND pins minimize switching noise • 3-State output buffers • Output capability: +64mA/–32mA • Latch-up protection exceeds 500mA per Jedec Std 17 • ESD protection exceeds 2000V per MIL STD 883 Method 3015 The MB2374 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The MB2374 has two 8-bit, edge triggered registers, with each register coupled to eight 3-State output buffers. The two sections of each register are controlled independently by the clock (nCP) and Output Enable (nOE) control gates. Each register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output. The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. Each active-Low Output Enable (nOE) controls all eight 3-State buffers for its register independent of the clock operation. and 200V per Machine Model When nOE is Low, the stored data appears at the outputs for that register. When nOE is High, the outputs for that register are in the High-impedance “OFF” state, which means they will neither drive nor load the bus. QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER tPLH tPHL Propagation delay nCP to nQx CL = 50pF; VCC = 5V CIN TYPICAL UNIT 3.4 3.6 ns pF Input capacitance VI = 0V or VCC 4 COUT Output capacitance VO = 0V or VCC; 3-State 7 pF ICCZ Total supply current Outputs disabled; VCC = 5.5V 120 µA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER –40°C to +85°C MB2374 BB MB2374 BB SOT379-1 52–pin plastic Quad Flat Pack 52 51 50 49 48 47 46 45 44 43 42 1D3 1D2 GND 1D1 1D0 1CP GND PIN DESCRIPTION 1OE 1Q0 1Q1 GND 1Q2 1Q3 PIN CONFIGURATION 41 40 VCC 1 39 V CC 1Q4 2 38 1D4 1Q5 3 37 1D5 GND 4 36 GND 1Q6 5 1Q7 6 GND 7 33 GND 2Q0 8 32 2D0 2Q1 9 31 2D1 È È 35 1D6 52-pin PQFP 34 1D7 29 2D2 2Q3 12 28 2D3 VCC 13 27 V CC 1993 Aug 23 SYMBOL FUNCTION 44, 43, 41, 40, 38, 37, 35, 34, 32, 31, 29, 28, 26, 25, 23, 22 1D0 – 1D7 2D0 – 2D7 Data inputs 48, 49, 51, 52, 2, 3, 5, 6, 8, 9, 11, 12, 14, 15, 17, 18 1Q0 – 1Q7 2Q0 – 2Q7 Data outputs 47, 19 1OE, 2OE Output enable inputs (active-Low) 45, 21 1CP, 2CP Clock pulse inputs (active rising edge) 4, 7, 10, 16, 20, 24, 30, 33, 36, 42, 46, 50 GND Ground (0V) 1, 13, 27, 39 VCC Positive supply voltage 26 2D4 2D5 GND 2D6 2D7 GND 2OE 2Q7 21 22 23 24 25 GND 17 18 19 20 2Q5 14 15 16 2CP 2Q2 11 2Q6 30 GND 2Q4 GND 10 PIN NUMBER SB00062 2 853–1625 10583 Philips Semiconductors Product specification 16-bit D-type flip-flop; positive-edge trigger (3-State) LOGIC SYMBOL 44 LOGIC SYMBOL (IEEE/IEC) 43 41 40 38 37 35 34 47 1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7 45 1CP 47 1OE 49 51 52 2 3 5 6 32 31 29 28 26 25 23 22 2OE C1 48 32 43 49 31 9 41 51 29 11 40 52 28 12 38 44 2D0 2D1 2D2 2D3 2D4 2D5 2D6 2D7 19 EN 21 C1 48 2CP 19 EN 45 1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7 21 MB2374 1D 8 1D 2 26 14 37 3 25 15 35 5 23 17 34 6 22 18 2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7 SB00064 8 9 11 12 14 15 17 18 SB00063 LOGIC DIAGRAM nD0 nD1 nD2 nD3 nD4 nD5 nD6 nD7 D D D D D D D D CP Q CP Q CP Q CP Q CP Q CP Q CP Q CP Q nCP nOE nQ0 nQ1 nQ2 nQ3 nQ4 nQ5 nQ6 nQ7 SB00065 1993 Aug 23 3 Philips Semiconductors Product specification 16-bit D-type flip-flop; positive-edge trigger (3-State) MB2374 FUNCTION TABLE INPUTS H = h = L = l = NC= X = Z = ↑ = ↑ = INTERNAL OUTPUTS nOE nCP nDx REGISTER nQ0 – nQ7 L L ↑ ↑ l h L H L H L ↑ X NC NC H ↑ X NC H nDx nDx ↑ High voltage level High voltage level one set-up time prior to the High-to-Low E transition Low voltage level Low voltage level one set-up time prior to the High-to-Low E transition No change Don’t care High impedance “off” state Low-to-High clock transition Not a Low-to-High clock transition Z Z OPERATING MODE Load and read register Hold Disable outputs ABSOLUTE MAXIMUM RATINGS1, 2 SYMBOL VCC IIK PARAMETER CONDITIONS RATING UNIT –0.5 to +7.0 V –18 mA –1.2 to +7.0 V VO < 0 –50 mA output in Off or High state –0.5 to +5.5 V output in Low state 128 mA –65 to 150 °C DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current voltage3 VOUT DC output IOUT DC output current Tstg Storage temperature range NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER LIMITS DC supply voltage UNIT MIN MAX 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level Input voltage 0.8 V IOH High-level output current –32 mA IOL Low-level output current 64 mA 0 10 ns/V –40 +85 °C ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range 1993 Aug 23 2.0 4 V Philips Semiconductors Product specification 16-bit D-type flip-flop; positive-edge trigger (3-State) MB2374 DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN VIK VOH Input clamp voltage High-level output voltage Tamb = –40°C to +85°C Tamb = +25°C VCC = 4.5V; IIK = –18mA TYP MAX –0.9 –1.2 MIN UNIT MAX –1.2 V VCC = 4.5V; IOH = –3mA; VI = VIL or VIH 2.5 2.9 2.5 V VCC = 5.0V; IOH = –3mA; VI = VIL or VIH 3.0 3.4 3.0 V VCC = 4.5V; IOH = –32mA; VI = VIL or VIH 2.0 2.4 2.0 V VOL Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or VIH 0.42 0.55 0.55 V VRST Power-up output voltage3 VCC = 5.5V; IO = 1mA; VI = GND or VCC 0.13 0.55 0.55 V Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA Power-off leakage current VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA Power-up/down 3-State output current4 VCC = 2.1V; VO = 0.5V; VI = GND or VCC, VOE = GND ±5.0 ±50 ±50 µA IOZH 3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or VIH 5.0 50 50 µA IOZL 3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or VIH –5.0 –50 –50 µA ICEX Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC 5.0 50 50 µA –70 –180 –180 mA VCC = 5.5V; Outputs High, VI = GND or VCC 120 250 250 µA VCC = 5.5V; Outputs Low, VI = GND or VCC 48 60 60 mA VCC = 5.5V; Outputs 3-State; VI = GND or VCC 120 250 250 µA VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND 0.5 1.5 1.5 mA II IOFF IPU/PD IO Output current1 ICCH ICCL Quiescent supply current ICCZ ∆ICC Additional supply current per input pin2 VCC = 5.5V; VO = 2.5V –50 –50 NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4. This parameter is valid for any VCC between 0V and 2.1V with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a transition time of up to 100µsec is permitted. AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER Tamb = -40 to +85oC VCC = +5.0V ±0.5V Tamb = +25oC VCC = +5.0V WAVEFORM MIN TYP MAX MIN UNIT MAX fMAX Maximum clock frequency 1 180 260 tPLH tPHL Propagation delay nCP to nQx 1 1.8 1.8 3.4 3.6 4.6 4.6 1.8 1.8 5.1 5.1 ns tPZH tPZL Output enable time to High and Low level 3 4 1.2 2.1 3.0 4.0 4.1 5.5 1.2 2.1 4.8 6.2 ns tPHZ tPLZ Output disable time from High and Low level 3 4 1.2 1.8 3.4 3.6 4.6 5.0 1.2 1.8 5.1 5.5 ns 1993 Aug 23 5 180 MHz Philips Semiconductors Product specification 16-bit D-type flip-flop; positive-edge trigger (3-State) MB2374 AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER Tamb = +25oC VCC = +5.0V WAVEFORM Tamb = -40 to +85oC VCC = +5.0V ±0.5V UNIT MIN TYP MIN 2 1.0 1.0 0.3 0.1 1.0 1.0 ns Hold time, High or Low nDx to nCP 2 1.0 1.0 –0.1 –0.3 1.0 1.0 ns nCP pulse width High or Low 1 2.8 2.8 1.2 1.5 2.8 2.8 ns ts(H) ts(L) Setup time, High or Low nDx to nCP th(H) th(L) tw(H) tw(L) AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V 1/fMAX OE nCP VM VM VM VM VM tPZH tw(H) VOH tPHL tPLH nQx tPHZ tw(L) VM nQx VOH –0.3V VM 0V VM SB00068 SB00066 Waveform 3. 3–State Output Enable Time to High Level and Output Disable Time from High Level Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency nDx ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ VM VM ts(H) VM th(H) OE VM ts(L) VM tPZL tPLZ th(L) nQx nCP VM VM VM VOL +0.3V VOL VM SB00069 Waveform 4. 3–State Output Enable Time to Low Level and Output Disable Time from Low Level NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. SB00067 Waveform 2. Data Setup and Hold Times 1993 Aug 23 6 Philips Semiconductors Product specification 16-bit D-type flip-flop; positive-edge trigger (3-State) MB2374 TEST CIRCUIT AND WAVEFORM VCC 7.0V RL VOUT VIN PULSE GENERATOR tW 90% NEGATIVE PULSE 90% VM CL VM 10% 10% 0V D.U.T. RT RL tTHL (tF) tTLH (tR) tTLH (tR) tTHL (tF) 90% POSITIVE PULSE Test Circuit for 3-State Outputs AMP (V) 90% VM VM 10% 10% tW SWITCH POSITION TEST SWITCH tPLZ closed tPZL closed All other open Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 0V VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS DEFINITIONS RL = AMP (V) FAMILY MB Amplitude Rep. Rate tW tR tF 3.0V 1MHz 500ns 2.5ns 2.5ns SB00010 1993 Aug 23 7 Philips Semiconductors Product specification 16-bit D-type flip-flop; positive-edge trigger (3-State) tPLH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nCP to nQx MB2374 Adjustment of tPLH for Load Capacitance and # of Outputs Switching nCP to nQx 6 5 4 MAX 5 16 switching 8 switching 3 4.5VCC 5.5VCC ns 1 switching Offset in ns 4 3 2 1 0 MIN 2 –1 1 –2 –55 –35 –15 5 25 45 65 85 105 0 125 50 °C 100 150 200 pF tPHL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nCP to nQx Adjustment of tPHL for Load Capacitance and # of Outputs Switching nCP to nQx 6 4 3 5 16 switching 8 switching 1 switching MAX 2 ns Offset in ns 4.5VCC 5.5VCC 4 3 1 0 MIN 2 –1 1 –2 –55 –35 –15 5 25 45 65 85 105 125 0 50 °C 100 150 Adjustment of tPZH for Load Capacitance and # of Outputs Switching nOE to nQx tPZH vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOE to nQx 5 6 4 5 16 switching 8 switching 1 switching MAX 3 4 4.5VCC Offset in ns ns 200 pF 5.5VCC 3 2 1 2 0 MIN 1 –1 0 –55 –2 –35 –15 5 25 45 65 85 105 0 125 °C 50 100 150 200 pF SB00070 1993 Aug 23 8 Philips Semiconductors Product specification 16-bit D-type flip-flop; positive-edge trigger (3-State) tPZL vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOE to nQx Adjustment of tPZL for Load Capacitance and # of Outputs Switching nOE to nQx 7 4 6 3 MAX 5 4.5VCC 4 5.5VCC 3 16 switching 8 switching 1 switching 2 Offset in ns ns MB2374 1 0 MIN 2 –1 1 –2 –55 –35 –15 5 25 45 65 85 105 125 0 50 °C 100 150 Adjustment of tPHZ for Load Capacitance and # of Outputs Switching nOE to nQx tPHZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOE to nQx 6 6 16 switching 8 switching 1 switching 5 5 MAX 4 4 3 2 3 Offset in ns 4.5VCC 5.5VCC ns 200 pF 2 1 MIN 0 1 –1 0 –2 –55 –35 –15 5 25 45 65 85 105 125 0 50 °C 200 Adjustment of tPLZ for Load Capacitance and # of Outputs Switching nOE to nQx 6 7 16 switching 8 switching 1 switching 5 6 4 MAX Offset in ns 5 ns 150 pF tPLZ vs Temperature (Tamb) CL = 50pF, 1 Output Switching nOE to nQx 4.5VCC 5.5VCC 4 3 3 2 1 0 MIN 2 –1 1 –55 100 –2 –35 –15 5 25 45 65 85 105 0 125 °C 50 100 150 200 pF SB00071 1993 Aug 23 9 Philips Semiconductors Product specification 16-bit D-type flip-flop; positive-edge trigger (3-State) tTLH vs Temperature (Tamb) CL = 50pF, 1 Output Switching MB2374 Adjustment of tTLH for Load Capacitance/# of Outputs 4 9 16 switching 8 switching 1 switching 7 5 Offset in ns 3 ns 4.5VCC 5.5VCC 3 2 1 –1 1 –3 –55 –35 –15 5 25 45 65 85 105 125 0 50 °C 100 150 200 pF tTHL vs Temperature (Tamb) CL = 50pF, 1 Output Switching Adjustment of tTHL for Load Capacitance and # of Outputs Switching 3 4 16 switching 8 switching 1 switching 3 2 2 Offset in ns 4.5VCC ns 5.5VCC 1 1 0 –1 0 –2 –55 –35 –15 5 25 45 65 85 105 125 0 50 °C 150 200 pF VOHP and VOLV vs Load Capacitance VCC = 5V, VIN = 0 to 3V VOHV and VOLP vs Load Capacitance VCC = 5V, VIN = 0 to 3V 4.0 6 3.5 125°C 25°C –55°C 3.0 5 4 2.5 125°C 25°C –55°C 3 2.0 Volts Volts 100 1.5 2 1 1.0 0.5 0.0 125°C 25°C –55°C 0 125°C 25°C –55°C –1 –0.5 –2 0 50 100 150 200 0 pF 50 100 150 200 pF SB00072 1993 Aug 23 10 Philips Semiconductors Product specification Dual octal D-type flip-flop; positive-edge trigger (3-State) QFP52: plastic quad flat package; 52 leads (lead length 1.6 mm); body 10 x 10 x 2.0 mm 1993 Aug 23 11 MB2374 SOT379-1 Philips Semiconductors Product specification Dual octal D-type flip-flop; positive-edge trigger (3-State) MB2374 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 1993 Aug 23 12