74LVC1G58 Low-power configurable multiple function gate Rev. 01 — 15 September 2004 Product data sheet 1. General description The 74LVC1G58 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The 74LVC1G58 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XOR, inverter and buffer. All inputs can be connected to VCC or GND. The three inputs (A, B and C) are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The gate switches at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT− is defined as the hysteresis voltage VH. 2. Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: ◆ JESD8-7 (1.65 V to 1.95 V) ◆ JESD8-5 (2.3 V to 2.7 V) ◆ JESD8B/JESD36 (2.7 V to 3.6 V). ±24 mA output drive (VCC = 3.0 V) ESD protection: ◆ HBM EIA/JESD22-A114-B exceeds 2000 V ◆ MM EIA/JESD22-A115-A exceeds 200 V. CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V Multiple package options Specified from −40 °C to +85 °C and −40 °C to +125 °C. 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns. Symbol Parameter tPHL, tPLH propagation delay input A, B and C to output Y Conditions Min Typ Max Unit VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ - 6 - ns VCC = 2.5 V; CL = 30 pF; RL = 500 Ω - 3.5 - ns VCC = 2.7 V; CL = 50 pF; RL = 500 Ω - 4.2 - ns VCC = 3.3 V; CL = 50 pF; RL = 500 Ω - 3.8 - ns VCC = 5.0 V; CL = 50 pF; RL = 500 Ω - 3.0 - ns - 2.5 - pF - 20 - pF input capacitance CI power dissipation capacitance per buffer CPD [1] [2] VCC = 3.3 V [1] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. [2] The condition is VI = GND to VCC. 4. Ordering information Table 2: Ordering information Type number Package Temperature range Name Description Version 74LVC1G58GW −40 °C to +125 °C SC-88 plastic surface mounted package; 6 leads SOT363 74LVC1G58GV −40 °C to +125 °C SC-74 plastic surface mounted package; 6 leads SOT457 74LVC1G58GM −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1.45 × 0.5 mm SOT886 5. Marking Table 3: Marking Type number Marking code 74LVC1G58GW YK 74LVC1G58GV V58 74LVC1G58GM YK 9397 750 13852 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 2 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate 6. Functional diagram A 3 4 B C Y 1 6 001aab687 Fig 1. Logic symbol. 7. Pinning information 7.1 Pinning 58 B 1 GND 2 A 3 58 6 C 5 VCC 4 Y 001aab686 B 1 6 C GND 2 5 VCC A 3 4 Y 001aab731 Transparent top view Fig 2. Pin configuration SC-88 and SC-74. Fig 3. Pin configuration XSON6. 7.2 Pin description Table 4: Pin description Symbol Pin Description B 1 data input B GND 2 ground (0 V) A 3 data input A Y 4 data output Y VCC 5 supply voltage C 6 data input C 9397 750 13852 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 3 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate 8. Functional description 8.1 Function table Table 5: Function table [1] Inputs Output C B A L L L L L L H H L H L L L H H H H L L H H L H H H H L L H H H L [1] Y H = HIGH voltage level; L = LOW voltage level. 8.2 Logic configurations Table 6: Function selection table Logic function Figure 2-input NAND see Figure 4 2-input NAND with both inputs inverted see Figure 7 2-input AND with inverted input see Figure 5 and 6 2-input NOR with inverted input see Figure 5 and 6 2-input OR see Figure 7 2-input OR with both inputs inverted see Figure 4 2-input XOR see Figure 8 Buffer see Figure 9 Inverter see Figure 10 VCC B C B C Y Y B 1 6 2 5 3 4 VCC B C C Y B C 1 6 2 5 3 4 C Y Fig 5. 2-input AND gate with inverted B input or 2-input NOR gate with inverted C input. 9397 750 13852 Product data sheet Y B 001aab689 001aab688 Fig 4. 2-input NAND gate or 2-input OR with both inputs inverted. Y © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 4 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate VCC VCC A C A C A C Y A Y 1 6 2 5 3 4 Y C A C Y A Y 1 6 2 5 3 4 C Y 001aab691 001aab690 Fig 6. 2-input AND gate with inverted C input or 2-input NOR gate with inverted A input. Fig 7. 2-input OR gate or 2-input NAND gate with both inputs inverted. VCC VCC B B C Y 1 6 2 5 3 4 C A Y Y A 1 6 2 5 3 4 Y 001aab692 001aab693 Fig 8. 2-input XOR gate. Fig 9. Buffer. VCC B B Y 1 6 2 5 3 4 Y 001aab694 Fig 10. Inverter. 9. Limiting values Table 7: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input diode current VI input voltage IOK output diode current VO IO output voltage output source or sink current Conditions Min Max Unit −0.5 +6.5 V VI < 0 V - −50 mA −0.5 +6.5 V [1] - ±50 mA active mode [1] [2] −0.5 +6.5 V Power-down mode [1] [2] −0.5 +6.5 V - ±50 mA VO > VCC or VO < 0 V VO = 0 V to VCC 9397 750 13852 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 5 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate Table 7: Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions ICC, IGND VCC or GND current Tstg storage temperature Ptot power dissipation Tamb = −40 °C to +125 °C Min Max Unit - ±100 mA −65 +150 °C - 300 mW [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. 10. Recommended operating conditions Table 8: Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit VCC supply voltage 1.65 - 5.5 V VI input voltage 0 - 5.5 V VO output voltage active mode 0 - VCC V VCC = 0 V; Power-down mode 0 - 5.5 V −40 - +125 °C Tamb operating ambient temperature 11. Static characteristics Table 9: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit - - 0.1 V Tamb = −40 °C to +85 °C [1] VOL LOW-level output voltage VI = VCC or GND IO = 100 µA; VCC = 1.65 V to 5.5 V VOH ILI IO = 4 mA; VCC = 1.65 V - - 0.45 V IO = 8 mA; VCC = 2.3 V - - 0.3 V IO = 12 mA; VCC = 2.7 V - - 0.4 V IO = 24 mA; VCC = 3.0 V - - 0.55 V IO = 32 mA; VCC = 4.5 V - - 0.55 V HIGH-level output voltage VI = VCC or GND input leakage current IO = −100 µA; VCC = 1.65 V to 5.5 V VCC − 0.1 - - V IO = −4 mA; VCC = 1.65 V 1.2 - V IO = −8 mA; VCC = 2.3 V 1.9 - - V IO = −12 mA; VCC = 2.7 V 2.2 - - V IO = −24 mA; VCC = 3.0 V 2.3 - - V IO = −32 mA; VCC = 4.5 V 3.8 - - V - ±0.1 ±5 µA VI = 5.5 V or GND; VCC = 3.6 V 9397 750 13852 Product data sheet - © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 6 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate Table 9: Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit Ioff power OFF leakage current VI or VO = 5.5 V; VCC = 0 V - ±0.1 ±10 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - 0.1 10 µA ∆ICC additional quiescent supply current per pin VI = VCC − 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V - 5 500 µA CI input capacitance - 2.5 - pF - - 0.1 V Tamb = −40 °C to +125 °C LOW-level output voltage VOL VI = VCC or GND IO = 100 µA; VCC = 1.65 V to 5.5 V VOH IO = 4 mA; VCC = 1.65 V - - 0.7 V IO = 8 mA; VCC = 2.3 V - - 0.45 V IO = 12 mA; VCC = 2.7 V - - 0.6 V IO = 24 mA; VCC = 3.0 V - - 0.8 V IO = 32 mA; VCC = 4.5 V - - 0.8 V HIGH-level output voltage VI = VCC or GND IO = −100 µA; VCC = 1.65 V to 5.5 V VCC − 0.1 - - V IO = −4 mA; VCC = 1.65 V 0.95 - V - IO = −8 mA; VCC = 2.3 V 1.7 - - V IO = −12 mA; VCC = 2.7 V 1.9 - - V IO = −24 mA; VCC = 3.0 V 2.0 - - V IO = −32 mA; VCC = 4.5 V 3.4 - - V ILI input leakage current VI = 5.5 V or GND; VCC = 3.6 V - - ±100 µA Ioff power OFF leakage current VI or VO = 5.5 V; VCC = 0 V - - ±200 µA ICC quiescent supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 200 µA ∆ICC additional quiescent supply current per pin VI = VCC − 0.6 V; IO = 0 A; VCC = 2.3 V to 5.5 V - - 5000 µA [1] Typical values are measured at maximum VCC and Tamb = 25 °C. 9397 750 13852 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 7 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate 12. Dynamic characteristics Table 10: Dynamic characteristics GND = 0 V. Symbol Parameter Tamb = −40 °C to +85 tPHL, tPLH propagation delay A, B, C to Y power dissipation capacitance per buffer CPD Conditions Min Typ Max Unit VCC = 1.65 V to 1.95 V 1.0 6.0 14.4 ns VCC = 2.3 V to 2.7 V 0.5 3.5 8.3 ns VCC = 2.7 V 0.5 4.2 8.5 ns VCC = 3.0 V to 3.6 V 0.5 3.8 6.3 ns VCC = 4.5 V to 5.5 V 0.5 3.0 5.1 ns - 20 - pF VCC = 1.65 V to 1.95 V 1.0 - 18 ns VCC = 2.3 V to 2.7 V 0.5 - 10.4 ns VCC = 2.7 V 0.5 - 10.6 ns VCC = 3.0 V to 3.6 V 0.5 - 7.9 ns VCC = 4.5 V to 5.5 V 0.5 - 6.4 ns °C [1] see Figure 11 and 12 VCC = 3.3 V [2] [3] Tamb = −40 °C to +125 °C tPHL, tPLH propagation delay A, B, C to Y see Figure 11 and 12 [1] Typical values are measured at nominal VCC and Tamb = 25 °C. [2] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. [3] The condition is VI = GND to VCC. 9397 750 13852 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 8 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate 13. Waveforms VI A, B, C input VM GND t PHL t PLH VOH VM Y output VOL t PLH t PHL VOH Y output VM VOL 001aab593 Measurement points are given in Table 11. VOL and VOH are typical output voltage drop that occur with the output load. Fig 11. Input A, B, C to output Y propagation delay times. Table 11: Measurement points Supply voltage Input Output VCC VM VI VM 1.65 V to 1.95 V 0.5 × VCC VCC 0.5 × VCC 2.3 V to 2.7 V 0.5 × VCC VCC 0.5 × VCC 2.7 V 1.5 V 2.7 V 1.5 V 3.0 V to 3.6 V 1.5 V 2.7 V 1.5 V 4.5 V to 5.5 V 0.5 × VCC VCC 0.5 × VCC 9397 750 13852 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 9 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate VEXT VCC PULSE GENERATOR VI RL VO D.U.T. CL RT RL mna616 Measurement points are given in Table 12. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistor. VEXT = Test voltage for switching times. Fig 12. Load circuitry for switching times. Table 12: Measurement points Supply voltage Input Load VEXT VCC VI tr = t f CL RL 1.65 V to 1.95 V VCC ≤ 2.0 ns 30 pF 1 kΩ open GND 2 × VCC 2.3 to 2.7 V VCC ≤ 2.0 ns 30 pF 500 Ω open GND 2 × VCC 2.7 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open GND 6V 3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open GND 6V 4.5 V to 5.5 V VCC ≤ 2.5 ns 50 pF 500 Ω open GND 2 × VCC tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 14. Transfer characteristics Table 13: Transfer characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb = −40 °C to +85 VT+ VT− Conditions Min Typ Max Unit VCC = 1.8 V 0.70 1.02 1.20 V VCC = 2.3 V 1.11 1.42 1.60 V VCC = 3.0 V 1.50 1.79 2.00 V VCC = 4.5 V 2.16 2.52 2.74 V VCC = 5.5 V 2.61 2.99 3.33 V VCC = 1.8 V 0.30 0.53 0.72 V VCC = 2.3 V 0.58 0.77 1.00 V VCC = 3.0 V 0.80 1.04 1.30 V VCC = 4.5 V 1.21 1.55 1.90 V VCC = 5.5 V 1.45 1.86 2.29 V °C [1] positive-going threshold voltage negative-going threshold voltage see Figure 13, 14, 15 and 16 see Figure 13, 14, 15 and 16 9397 750 13852 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 10 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate Table 13: Transfer characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VH hysteresis voltage (VT+ − VT−) see Figure 13, 14, 15 and 16 VCC = 1.8 V 0.30 0.48 0.62 V VCC = 2.3 V 0.40 0.64 0.80 V VCC = 3.0 V 0.50 0.75 1.00 V VCC = 4.5 V 0.71 0.97 1.20 V VCC = 5.5 V 0.71 1.13 1.40 V VCC = 1.8 V 0.67 - 1.20 V VCC = 2.3 V 1.08 - 1.60 V VCC = 3.0 V 1.47 - 2.00 V VCC = 4.5 V 2.13 - 2.74 V VCC = 5.5 V 2.58 - 3.33 V Tamb = −40 °C to +125 °C positive-going threshold voltage VT+ negative-going threshold voltage VT− see Figure 13, 14, 15 and 16 hysteresis voltage (VT+ − VT−) VH [1] see Figure 13, 14, 15 and 16 VCC = 1.8 V 0.30 - 0.75 V VCC = 2.3 V 0.58 - 1.03 V VCC = 3.0 V 0.80 - 1.33 V VCC = 4.5 V 1.21 - 1.93 V VCC = 5.5 V 1.45 - 2.32 V VCC = 1.8 V 0.23 - 0.62 V VCC = 2.3 V 0.34 - 0.80 V VCC = 3.0 V 0.44 - 1.00 V VCC = 4.5 V 0.65 - 1.20 V VCC = 5.5 V 0.65 - 1.40 V see Figure 13, 14, 15 and 16 Typical values are measured at Tamb = 25 °C. 15. Waveforms transfer characteristics VO VI VT+ VH VT− VO VT− mna208 VI VH VT+ VT+ and VT− limits are at 70 % and 20 %. mna207 Fig 13. Transfer characteristics. Fig 14. Definition of VT+, VT− and VH. 9397 750 13852 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 11 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate VI VO VT+ VH VT− VO VI VH VT− VT+ mnb155 001aab684 VT+ and VT− limits are at 70 % and 20 %. Fig 15. Transfer characteristics. Fig 16. Definition of VT+, VT− and VH. 001aab594 16 I CC (mA) 12 8 4 0 0 1 2 3 VI (V) Fig 17. Typical 74LVC1G58 transfer characteristics; VCC = 3.0 V. 9397 750 13852 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 12 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate 16. Package outline Plastic surface mounted package; 6 leads SOT363 D E B y X A HE 6 5 v M A 4 Q pin 1 index A A1 1 2 e1 3 bp c Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC SOT363 JEDEC EIAJ SC-88 EUROPEAN PROJECTION ISSUE DATE 97-02-28 Fig 18. Package outline SOT363 (SC-88). 9397 750 13852 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 13 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate Plastic surface mounted package; 6 leads SOT457 D E B y A HE 6 5 X v M A 4 Q pin 1 index A A1 c 1 2 3 Lp bp e w M B detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.1 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT457 EIAJ SC-74 EUROPEAN PROJECTION ISSUE DATE 97-02-28 01-05-04 Fig 19. Package outline SOT457 (SC-74). 9397 750 13852 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 14 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm SOT886 b 1 2 3 4× (2) L L1 e 6 5 e1 4 e1 6× A (2) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A (1) max A1 max b D E e e1 L L1 mm 0.5 0.04 0.25 0.17 1.5 1.4 1.05 0.95 0.6 0.5 0.35 0.27 0.40 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT886 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 04-07-15 04-07-22 MO-252 Fig 20. Package outline SOT886 (XSON6). 9397 750 13852 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 15 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate 17. Revision history Table 14: Revision history Document ID Release date Data sheet status Change notice Doc. number Supersedes 74LVC1G58_1 20040915 Product data sheet - 9397 750 13852 - 9397 750 13852 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 16 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate 18. Data sheet status Level Data sheet status [1] Product status [2] [3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 19. Definitions 20. Disclaimers Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 21. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: [email protected] 9397 750 13852 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 15 September 2004 17 of 18 74LVC1G58 Philips Semiconductors Low-power configurable multiple function gate 22. Contents 1 2 3 4 5 6 7 7.1 7.2 8 8.1 8.2 9 10 11 12 13 14 15 16 17 18 19 20 21 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Logic configurations . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Transfer characteristics. . . . . . . . . . . . . . . . . . 10 Waveforms transfer characteristics . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Contact information . . . . . . . . . . . . . . . . . . . . 17 © Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 15 September 2004 Document number: 9397 750 13852 Published in The Netherlands