LF PA K BUK9Y41-80E N-channel 80 V, 45 mΩ logic level MOSFET in LFPAK56 20 February 2013 Product data sheet 1. General description Logic level N-channel MOSFET in an LFPAK56 (Power SO8) package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use in high performance automotive applications. 2. Features and benefits • • • • Q101 compliant Repetitive avalanche rated Suitable for thermally demanding environments due to 175 °C rating True logic level gate with VGS(th) rating of greater than 0.5 V at 175 °C 3. Applications • • • • 12 V, 24 V and 48 V Automotive systems Motors, lamps and solenoid control Transmission control Ultra high performance power switching 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 80 V ID drain current VGS = 5 V; Tmb = 25 °C; Fig. 1 - - 24 A Ptot total power dissipation Tmb = 25 °C; Fig. 2 - - 64 W VGS = 5 V; ID = 5 A; Tj = 25 °C; Fig. 11 - 35.7 45 mΩ VGS = 5 V; ID = 5 A; VDS = 64 V; - 4.3 - nC Static characteristics RDSon drain-source on-state resistance Dynamic characteristics QGD gate-drain charge Tj = 25 °C; Fig. 13; Fig. 14 Scan or click this QR code to view the latest information for this product BUK9Y41-80E NXP Semiconductors N-channel 80 V, 45 mΩ logic level MOSFET in LFPAK56 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 S source 2 S source 3 S source 4 G gate mb D mounting base; connected to drain Graphic symbol D mb G S mbb076 1 2 3 4 LFPAK; PowerSO8 (SOT669) 6. Ordering information Table 3. Ordering information Type number Package BUK9Y41-80E Name Description Version LFPAK; Power-SO8 plastic single-ended surface-mounted package; 4 leads SOT669 7. Marking Table 4. Marking codes Type number Marking code BUK9Y41-80E 94180E 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 80 V VDGR drain-gate voltage RGS = 20 kΩ - 80 V VGS gate-source voltage Tj ≤ 175 °C; DC -10 10 V -15 15 V Tmb = 25 °C; VGS = 5 V; Fig. 1 - 24 A Tmb = 100 °C; VGS = 5 V; Fig. 1 - 17 A Tj ≤ 175 °C; Pulsed ID drain current [1][2] IDM peak drain current Tmb = 25 °C; pulsed; tp ≤ 10 µs; Fig. 4 - 96 A Ptot total power dissipation Tmb = 25 °C; Fig. 2 - 64 W BUK9Y41-80E Product data sheet All information provided in this document is subject to legal disclaimers. 20 February 2013 © NXP B.V. 2013. All rights reserved 2 / 13 BUK9Y41-80E NXP Semiconductors N-channel 80 V, 45 mΩ logic level MOSFET in LFPAK56 Symbol Parameter Tstg Tj Conditions Min Max Unit storage temperature -55 175 °C junction temperature -55 175 °C Source-drain diode IS source current Tmb = 25 °C - 24 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 96 A - 25 mJ Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy ID = 24 A; Vsup ≤ 80 V; RGS = 50 Ω; [3][4] VGS = 5 V; Tj(init) = 25 °C; unclamped; Fig. 3 [1] [2] [3] [4] ID (A) Accumulated pulse duration up to 50 hours delivers zero defect ppm Significantly longer life times are achieved by lowering Tj and or VGS Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. Refer to application note AN10273 for further information. 003aaj095 25 03aa16 120 Pder (%) 20 80 15 10 40 5 0 Fig. 1. 0 30 60 90 120 150 Tj (°C) Continuous drain current as a function of mounting base temperature BUK9Y41-80E Product data sheet 0 180 Fig. 2. 0 100 150 Tmb (°C) 200 Normalized total power dissipation as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. 20 February 2013 50 © NXP B.V. 2013. All rights reserved 3 / 13 BUK9Y41-80E NXP Semiconductors N-channel 80 V, 45 mΩ logic level MOSFET in LFPAK56 IAL (A) 003aaj096 102 10 (1) (2) 1 (3) 10-1 10-2 10-3 Fig. 3. 10-2 10-1 1 tAL (ms) 10 Avalanche rating; avalanche current as a function of avalanche time ID (A) 003aaj097 102 Limit RDSon = VDS / ID tp = 10 us 10 100 us 1 DC 1 ms 10 ms 10-1 10-2 Fig. 4. 100 ms 1 102 10 VDS (V) 103 Safe operating area; continuous and peak drain currents as a function of drain-source voltage 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base Fig. 5 - - 2.33 K/W BUK9Y41-80E Product data sheet All information provided in this document is subject to legal disclaimers. 20 February 2013 © NXP B.V. 2013. All rights reserved 4 / 13 BUK9Y41-80E NXP Semiconductors N-channel 80 V, 45 mΩ logic level MOSFET in LFPAK56 003aaj098 10 Zth(j-mb) (K/W) 1 δ = 0.5 0.2 0.1 10-1 0.05 P 0.02 δ= single shot tp 10-2 10-6 Fig. 5. 10-5 10-4 10-3 10-2 10-1 tp T t T tp (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 80 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C 72 - - V gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; 1.4 1.7 2.1 V - - 2.45 V 0.5 - - V Static characteristics V(BR)DSS VGS(th) Fig. 9; Fig. 10 ID = 1 mA; VDS = VGS; Tj = -55 °C; Fig. 9 ID = 1 mA; VDS = VGS; Tj = 175 °C; Fig. 9 IDSS drain leakage current VDS = 80 V; VGS = 0 V; Tj = 25 °C - 0.1 1 µA IDSS drain leakage current VDS = 80 V; VGS = 0 V; Tj = 175 °C - - 500 µA IGSS gate leakage current VGS = 10 V; VDS = 0 V; Tj = 25 °C - 2 100 nA VGS = -10 V; VDS = 0 V; Tj = 25 °C - 2 100 nA RDSon drain-source on-state resistance VGS = 5 V; ID = 5 A; Tj = 25 °C; Fig. 11 - 35.7 45 mΩ RDSon drain-source on-state resistance VGS = 10 V; ID = 5 A; Tj = 25 °C; Fig. 11 - 32.8 41 mΩ VGS = 5 V; ID = 5 A; Tj = 175 °C; - - 113 mΩ Fig. 12; Fig. 11 Dynamic characteristics QG(tot) QGS total gate charge ID = 5 A; VDS = 64 V; VGS = 5 V; - 11.9 - nC gate-source charge Tj = 25 °C; Fig. 13; Fig. 14 - 2.5 - nC BUK9Y41-80E Product data sheet All information provided in this document is subject to legal disclaimers. 20 February 2013 © NXP B.V. 2013. All rights reserved 5 / 13 BUK9Y41-80E NXP Semiconductors N-channel 80 V, 45 mΩ logic level MOSFET in LFPAK56 Symbol Parameter Conditions Min Typ Max Unit QGD gate-drain charge - 4.3 - nC Ciss input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz; - 1180 1570 pF Tj = 25 °C; Fig. 15 Coss output capacitance - 99 119 pF Crss reverse transfer capacitance - 54 74 pF td(on) turn-on delay time VDS = 60 V; RL = 10 Ω; VGS = 5 V; - 8.6 - ns tr rise time RG(ext) = 5 Ω; Tj = 25 °C - 11.2 - ns td(off) turn-off delay time - 16.1 - ns tf fall time - 10.5 - ns Source-drain diode VSD source-drain voltage IS = 5 A; VGS = 0 V; Tj = 25 °C; Fig. 16 - 0.8 1.2 V trr reverse recovery time IS = 5 A; dIS/dt = -100 A/µs; VGS = 0 V; - 21.3 - ns Qr recovered charge VDS = 25 V; Tj = 25 °C - 22 - nC ID (A) 003aaj099 50 003aaj100 100 RDSon 10 V 4.5 V 40 80 3.5 V VGS = 3 V 30 60 2.8 V 20 40 2.6 V 10 20 2.4 V 0 0 1 2 3 VDS (V) Tj = 25 °C; tp = 300 μs Fig. 6. 0 4 Fig. 7. Output characteristics; drain current as a function of drain-source voltage; typical values BUK9Y41-80E Product data sheet 0 4 6 8 VGS (V) 10 Drain-source on-state resistance as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. 20 February 2013 2 © NXP B.V. 2013. All rights reserved 6 / 13 BUK9Y41-80E NXP Semiconductors N-channel 80 V, 45 mΩ logic level MOSFET in LFPAK56 ID (A) 003aaj102 40 32 003aah025 3 VGS(th) (V) 2.5 max 2 24 typ 1.5 16 min 1 8 0.5 175°C Tj = 25°C 0 Fig. 8. 0 0.5 1 1.5 2 2.5 3 3.5 VGS (V) 0 -60 4 Transfer characteristics; drain current as a function of gate-source voltage; typical values Fig. 9. 003aah026 10-1 10 -4 120 Tj (° C) 003aaj105 2.6 V 2.8 V 80 min typ 3V max 60 3.5 V 4.5 V 40 10-5 10-6 180 Gate-source threshold voltage as a function of junction temperature RDSon 10-2 10 60 100 ID (A) -3 0 VGS = 10 V 0 1 2 V GS (V) 20 3 Fig. 10. Sub-threshold drain current as a function of gate-source voltage BUK9Y41-80E Product data sheet 0 5 10 15 20 ID (A) 25 Tj = 25 °C; tp = 300 μs Fig. 11. Drain-source on-state resistance as a function of drain current; typical values All information provided in this document is subject to legal disclaimers. 20 February 2013 © NXP B.V. 2013. All rights reserved 7 / 13 BUK9Y41-80E NXP Semiconductors N-channel 80 V, 45 mΩ logic level MOSFET in LFPAK56 003aaj818 3 VDS a ID 2.4 VGS(pl) 1.8 VGS(th) VGS 1.2 QGS1 QGS2 QGS 0.6 QGD QG(tot) 003aaa508 0 -60 0 60 120 Tj ( °C) Fig. 13. Gate charge waveform definitions 180 Fig. 12. Normalized drain-source on-state resistance factor as a function of junction temperature VGS (V) 003aaj107 10 003aaj108 104 C (pF) 8 Ciss 103 6 VGS = 14 V 64 V 4 Coss 102 2 0 Crss 0 5 10 15 20 QG (nC) Fig. 14. Gate-source voltage as a function of gate charge; typical values BUK9Y41-80E Product data sheet 10 10-1 25 1 10 VDS (V) 102 Fig. 15. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. 20 February 2013 © NXP B.V. 2013. All rights reserved 8 / 13 BUK9Y41-80E NXP Semiconductors N-channel 80 V, 45 mΩ logic level MOSFET in LFPAK56 003aaj109 100 IS (A) 80 60 40 20 175°C Tj = 25°C 0 0 0.25 0.5 0.75 1 1.25 VSD (V) 1.5 Fig. 16. Source-drain (diode forward) current as a function of source-drain (diode forward) voltage; typical values BUK9Y41-80E Product data sheet All information provided in this document is subject to legal disclaimers. 20 February 2013 © NXP B.V. 2013. All rights reserved 9 / 13 BUK9Y41-80E NXP Semiconductors N-channel 80 V, 45 mΩ logic level MOSFET in LFPAK56 11. Package outline Plastic single-ended surface-mounted package (LFPAK; Power-SO8); 4 leads E A2 A SOT669 C c2 b2 E1 b3 L1 mounting base b4 D1 D H L2 1 2 3 e 4 w M A b X c 1/2 e A (A 3) A1 C θ L detail X 0 2.5 y C 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A A1 A2 A3 b b2 1.20 0.15 1.10 0.50 4.41 0.25 1.01 0.00 0.95 0.35 3.62 b3 b4 2.2 2.0 0.9 0.7 c D (1) c2 D1(1) E(1) E1(1) max 0.25 0.30 4.10 4.20 0.19 0.24 3.80 5.0 4.8 3.3 3.1 e H L L1 L2 w y θ 1.27 6.2 5.8 0.85 0.40 1.3 0.8 1.3 0.8 0.25 0.1 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT669 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 06-03-16 11-03-25 MO-235 Fig. 17. Package outline LFPAK; Power-SO8 (SOT669) BUK9Y41-80E Product data sheet All information provided in this document is subject to legal disclaimers. 20 February 2013 © NXP B.V. 2013. All rights reserved 10 / 13 BUK9Y41-80E NXP Semiconductors N-channel 80 V, 45 mΩ logic level MOSFET in LFPAK56 In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 12. Legal information 12.1 Data sheet status Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. 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NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. BUK9Y41-80E Product data sheet Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. 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Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. 20 February 2013 © NXP B.V. 2013. All rights reserved 11 / 13 BUK9Y41-80E NXP Semiconductors N-channel 80 V, 45 mΩ logic level MOSFET in LFPAK56 No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. BUK9Y41-80E Product data sheet All information provided in this document is subject to legal disclaimers. 20 February 2013 © NXP B.V. 2013. All rights reserved 12 / 13 BUK9Y41-80E NXP Semiconductors N-channel 80 V, 45 mΩ logic level MOSFET in LFPAK56 13. Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 2 8 Limiting values .......................................................2 9 Thermal characteristics .........................................4 10 Characteristics ....................................................... 5 11 Package outline ................................................... 10 12 12.1 12.2 12.3 12.4 Legal information .................................................11 Data sheet status ............................................... 11 Definitions ...........................................................11 Disclaimers .........................................................11 Trademarks ........................................................ 12 © NXP B.V. 2013. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 20 February 2013 BUK9Y41-80E Product data sheet All information provided in this document is subject to legal disclaimers. 20 February 2013 © NXP B.V. 2013. All rights reserved 13 / 13