NX3P191 Logic controlled high-side power switch Rev. 2 — 4 November 2011 Product data sheet 1. General description The NX3P191 is a high-side load switch which features a low ON resistance P-channel MOSFET with input inrush current reduction that supports more than 500 mA of continuous current and an integrated output discharge resistor to discharge the output capacitance when disabled. Designed for operation from 1.1 V to 3.6 V, it is used in power domain isolation applications to reduce power dissipation and extend battery life. The enable logic includes integrated logic level translation making the device compatible with lower voltage processors and controllers. The NX3P191 is ideal for portable, battery operated applications due to low ground current and ultra-low shutdown current. 2. Features and benefits Wide supply voltage range from 1.1 V to 3.6 V Very low ON resistance: 95 m (typical) at a supply voltage of 1.8 V High noise immunity Low-power mode when EN is LOW Low ground current (2 A maximum) 1.2 V control logic at a supply voltage of 3.6 V High current handling capability (500 mA continuous current) Internal output discharge resistor Turn-on slew rate limiting ESD protection: HBM JESD22-A114F Class 3A exceeds 4000 V CDM AEC-Q100-011 revision B exceeds 500 V Specified from 40 C to +85 C 3. Applications Cell phone Digital cameras and audio devices Portable and battery-powered equipment NX3P191 NXP Semiconductors Logic controlled high-side power switch 4. Ordering information Table 1. Ordering information Type number NX3P191UK Package Temperature range Name Description Version 40 C to +85 C WLCSP4 wafer level chip-size package; 4 bumps; body 0.76 0.76 0.51 mm. (Backside Coating included) NX3P190/NX3P191 5. Marking Table 2. Marking codes Type number Marking code NX3P191UK x1 6. Functional diagram VIN VOUT Rdch LEVEL SHIFT, SLEW RATE CONTROL AND LOAD DISCHARGE EN EN Rpd VIN VOUT aaa-000036 001aao342 Fig 1. Logic symbol Fig 2. Logic diagram (simplified schematic) 7. Pinning information 7.1 Pinning bump A1 index area NX3P191 1 2 A A VIN VOUT B B EN GND 1 2 001aao345 aaa-000037 Transparent top view Transparent top view Fig 3. Pin configuration for WLCSP4 NX3P191 Product data sheet Fig 4. Ball mapping for WLCSP4 All information provided in this document is subject to legal disclaimers. Rev. 2 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 2 of 15 NX3P191 NXP Semiconductors Logic controlled high-side power switch 7.2 Pin description Table 3. Pin description Symbol Pin Description VIN A1 input voltage EN B1 enable input (active HIGH) VOUT A2 output voltage GND B2 ground (0 V) 8. Functional description Table 4. Function table[1] Input EN Switch L switch OFF H switch ON [1] H = HIGH voltage level; L = LOW voltage level. 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VI input voltage input EN [1] 0.5 +4.0 V input VIN [2] 0.5 +4.0 V [2] 0.5 VI(VIN) V VSW switch voltage output VOUT IIK input clamping current input EN: VI(EN) < 0.5 V 50 - mA ISK switch clamping current input VIN: VI(VIN) < 0.5 V 50 - mA output VOUT: VO(VOUT) < 0.5 V 50 - mA output VOUT: VO(VOUT) > VI(VIN) 0.5 V - 50 mA Tamb = 25 °C - 1000 mA Tamb = 85 °C - 500 mA 40 +125 C 65 +150 C - 300 mW switch current ISW Tj(max) maximum junction temperature Tstg storage temperature VSW > 0.5 V [3] total power dissipation Ptot [1] The minimum input voltage rating may be exceeded if the input current rating is observed. [2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed. [3] The (absolute) maximum power dissipation depends on the junction temperature Tj. Higher power dissipation is allowed in conjunction with lower ambient temperatures. The conditions to determine the specified values are Tamb = 85 °C and the use of a two layer PCB. NX3P191 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 3 of 15 NX3P191 NXP Semiconductors Logic controlled high-side power switch 10. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Conditions Min Max Unit VI input voltage 1.1 3.6 V Tamb ambient temperature 40 +85 C 11. Thermal characteristics Table 7. Symbol Rth(j-a) Thermal characteristics Parameter Conditions [1][2] thermal resistance from junction to ambient Typ Unit 130 K/W [1] The overall Rth(j-a) can vary depending on the board layout. To minimize the effective Rth(j-a), all pins must have a solid connection to larger Cu layer areas e.g. to the power and ground layer. In multi-layer PCB applications, the second layer should be used to create a large heat spreader area right below the device. If this layer is either ground or power, it should be connected with several vias to the top layer connecting to the device ground or supply.Try not to use any solder-stop varnish under the chip. [2] Please rely on the measurement data given for a rough estimation of the Rth(j-a) in your application. The actual Rth(j-a) value may vary in applications using different layer stacks and layouts 12. Static characteristics Table 8. Static characteristics VI(VIN) = VI(EN) , unless otherwise specified; Voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH VIL HIGH-level input voltage LOW-level input voltage Tamb = 25 C Conditions Tamb = 40 C to +85 C Unit Min Typ Max Min Max VI(VIN) = 1.1 V to 1.3 V - - - 1.0 - V VI(VIN) = 1.3 V to 1.8 V - - - 1.2 - V VI(VIN) = 1.8 V to 3.6 V - - - 1.2 - V VI(VIN) = 1.1 V to 1.3 V - - - - 0.3 V VI(VIN) = 1.3 V to 1.8 V - - - - 0.4 V EN input EN input - - - - 0.45 Rpd pull-down resistance EN input VI(VIN) = 1.8 V to 3.6 V - 4 - - - M IGND ground current VI(VIN) = 3.6 V; VOUT open; see Figure 5 and Figure 6 - - - 2 - A IOFF power-off leakage current VI(VIN) = 3.6 V; VI(EN) = GND; VO(VOUT) = GND; see Figure 8 - 0.1 - - 2 A Rdch discharge resistance VOUT output - 280 - - - NX3P191 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 4 November 2011 V © NXP B.V. 2011. All rights reserved. 4 of 15 NX3P191 NXP Semiconductors Logic controlled high-side power switch 12.1 Graphs 001aao346 0.9 IGND (μA) 0.8 001aao347 1.0 IGND (μA) 0.8 0.7 0.6 0.6 0.5 0.4 0.4 0.3 0.2 -40 -10 20 50 0.2 1.2 80 110 Tamb (°C) 2.2 2.7 3.2 3.2 VI(VIN) (V) VI(EN) = VI(VIN); Tamb = 25 C; ILOAD = 500mA. VI(VIN) = 1.8 V; VI(EN) = 1.8 V; ILOAD = 500 mA. Fig 5. 1.7 Waveform showing the ground current versus temperature Fig 6. Waveform showing the ground current versus input voltage on pin VIN 001aao348 12 IGND (μA) VI(VIN) = 3.6 V 8 4 VI(VIN) = 1.8 V 0 Fig 7. 0 1 2 3 VI(EN) (V) 4 Waveform showing the additional ground current versus input voltage NX3P191 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 5 of 15 NX3P191 NXP Semiconductors Logic controlled high-side power switch IOFF (μA) 001aao349 0.7 0.6 0.5 (1) (2) (3) (4) 0.4 0.3 0.2 0.1 0 -40 -20 0 20 40 60 80 100 Tamb (°C) VI(EN) = GND. (1) VI(VIN) = 3.6 V. (2) VI(VIN) = 2.5 V. (3) VI(VIN) = 1.8 V. (4) VI(VIN) = 1.2 V. Fig 8. Waveforms showing the power-off leakage current versus temperature 12.2 ON resistance Table 9. ON resistance At recommended operating conditions; voltages are referenced to GND (ground = 0 V) Symbol RON Parameter ON resistance NX3P191 Product data sheet Tamb = 25 C Conditions Unit Min Typ Max VI(VIN) = 1.2 V - 150 - m VI(VIN) = 1.5 V - 110 - m VI(VIN) = 1.8 V - 95 130 m VI(VIN) = 2.5 V - 75 - m VI(VIN) = 3.6 V - 65 - m VI(EN) = 1.5 V; ILOAD = 200 mA; see Figure 9, Figure 10 and Figure 11 All information provided in this document is subject to legal disclaimers. Rev. 2 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 6 of 15 NX3P191 NXP Semiconductors Logic controlled high-side power switch 12.3 ON resistance test circuit and waveforms VSW EN VIH VIN VI VOUT ILOAD GND 001aao350 RON = VSW / ILOAD. Fig 9. Test circuit for measuring ON resistance 001aao351 200 001aao352 200 RON (mΩ) RON (mΩ) 160 (1) 160 (1) (2) (3) (4) (5) 120 120 (2) 80 80 (3) 40 -40 -10 20 50 80 110 Tamb (°C) 40 1.2 2.0 2.8 VI(VIN) (V) 3.6 VI(EN) = VI(VIN); Tamb = 25 C. ILOAD = 100 mA. (1) VI(VIN) = 1.2 V. (1) ILOAD = 10 mA. (2) VI(VIN) = 1.8 V. (2) ILOAD = 100 mA. (3) VI(VIN) = 3.6 V. (3) ILOAD = 250 mA. (4) ILOAD = 350 mA. (5) ILOAD = 500 mA. Fig 10. Waveform showing the ON resistance versus temperature NX3P191 Product data sheet Fig 11. Waveform showing the ON resistance versus input voltage All information provided in this document is subject to legal disclaimers. Rev. 2 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 7 of 15 NX3P191 NXP Semiconductors Logic controlled high-side power switch 13. Dynamic characteristics Table 10. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Figure 13. Symbol Tamb = 25 C Conditions enable time ten [1] Parameter Unit Min Typ Max VI(VIN) = 1.8 V - 80 - s VI(VIN) = 3.6 V - 40 - s EN to VOUT; see Figure 12 [1] ten is the same as tPZH. 13.1 Waveform and test circuits VI EN input VM GND tPZH tPHZ VOH VY VOUT output GND VX 001aao353 Measurement points are given in Table 11. Logic level: VOH is the typical output voltage that occurs with the output load. Fig 12. Switching times Table 11. Measurement points Supply voltage EN Input Output VI(VIN) VM VX VY 1.1 V to 3.6 V 0.5 VI(EN) 0.1 VOH 0.9 VOH NX3P191 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 8 of 15 NX3P191 NXP Semiconductors Logic controlled high-side power switch EN VOUT G VI ILOAD VIN VEXT CL 001aao354 Test data is given in Table 12. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. VEXT = External voltage for measuring switching times. Fig 13. Test circuit for measuring switching times Table 12. Test data Supply voltage Input Load VEXT VI(EN) CL ILOAD 1.1 V to 3.6 V 1.5 V 1 F 200 mA aaa-000038 VI(VIN) = 1.8 V; VI(EN) = 1.8 V; CL = 1 F; ILOAD = 200 mA. Fig 14. Waveform showing the enable time versus inrush current NX3P191 Product data sheet aaa-000039 VI(VIN) = 3.6 V; VI(EN) = 1.8 V; CL = 1.0 F; ILOAD = 200 mA. Fig 15. Waveform showing the enable time versus inrush current All information provided in this document is subject to legal disclaimers. Rev. 2 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 9 of 15 NX3P191 NXP Semiconductors Logic controlled high-side power switch aaa-000040 VI(VIN) = 1.8 V; VI(EN) = 1.8 V. VI(VIN) = 3.6 V; VI(EN) = 3.6 V. Fig 16. Waveform showing the disable time NX3P191 Product data sheet aaa-000041 Fig 17. Waveform showing the disable time All information provided in this document is subject to legal disclaimers. Rev. 2 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 10 of 15 NX3P191 NXP Semiconductors Logic controlled high-side power switch 14. Package outline WLCSP4: wafer level chip-size package. 4 bumps; body 0.76 x 0.76 x 0.51 mm. (Backside Coating included) A D NX3P190/NX3P191 B A2 ball A1 index area A E A1 detail X e C C A B C v w b y B e A 1 ball A1 index area 2 X 0 2 mm scale Dimensions Unit mm A A1 A2 b D E e v w y max 0.54 0.22 0.32 0.29 0.81 0.81 nom 0.51 0.20 0.31 0.26 0.76 0.76 0.40 0.025 0.025 0.03 min 0.48 0.18 0.30 0.23 0.71 0.71 nx3p190_191_po Outline version References IEC JEDEC JEITA European projection Issue date 11-05-24 11-06-09 NX3P190/NX3P191 Fig 18. Package outline WLCSP4 (NX3P190/NX3P191) NX3P191 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 11 of 15 NX3P191 NXP Semiconductors Logic controlled high-side power switch 15. Abbreviations Table 13. Abbreviations Acronym Description MOSFET Metal-Oxide Semiconductor Field Effect Transistor 16. Revision history Table 14. Revision history Document ID Release date Data sheet status Change notice Supersedes NX3P191 v.2 20111104 Product data sheet - NX3P191 v.1 - - Modifications: NX3P191 v.1 NX3P191 Product data sheet • Legal pages updated. 20110831 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 12 of 15 NX3P191 NXP Semiconductors Logic controlled high-side power switch 17. Legal information 17.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 17.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. 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Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 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Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. 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No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. NX3P191 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 13 of 15 NX3P191 NXP Semiconductors Logic controlled high-side power switch Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 17.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 18. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] NX3P191 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 4 November 2011 © NXP B.V. 2011. All rights reserved. 14 of 15 NX3P191 NXP Semiconductors Logic controlled high-side power switch 19. Contents 1 2 3 4 5 6 7 7.1 7.2 8 9 10 11 12 12.1 12.2 12.3 13 13.1 14 15 16 17 17.1 17.2 17.3 17.4 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 4 Thermal characteristics . . . . . . . . . . . . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ON resistance test circuit and waveforms . . . . 7 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Waveform and test circuits . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Contact information. . . . . . . . . . . . . . . . . . . . . 14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 4 November 2011 Document identifier: NX3P191