INFINEON Q67060-S7216-A001

HITFET= BTS 3118 N
Smart Lowside Power Switch
Features
Product Summary
Logic Level Input
Input Protection (ESD)
Thermal shutdown
Overload protection
Short circuit protection
Overvoltage protection
Current limitation
Analog driving possible
42
V
Drain source voltage
VDS
On-state resistance
RDS(on)
100
m
Nominal load current
I D(Nom)
2.17
A
Clamping energy
EAS
250
mJ
4
3
2
1
VPS05163
Application
All kinds of resistive, inductive and capacitive loads in switching
or linear applications
µC compatible power switch for 12 V DC applications
Replaces electromechanical relays and discrete circuits
General Description
N channel vertical power FET in Smart SIPMOS technology. Fully protected by embedded
protection functions.
Vbb
M
Drain
HITFET
Current
Limitation
In
Pin 2 and 4 (TAB)
OvervoltageProtection
Gate-Driving
Unit
Pin 1
ESD
Overload
Protection
Overtemperature
Protection
Short circuit
Protection
Pin 3
Source
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BTS 3118 N
Maximum Ratings at T j = 25°C, unless otherwise specified
Parameter
Symbol
Value
Drain source voltage
VDS
42
Drain source voltage for short circuit protection
VDS(SC)
20
Unit
V
T j = -40...150°C
Continuous input current
IIN
-0.2V VIN 10V
mA
no limit
| IIN | 2
VIN < -0.2V or VIN > 10V
°C
Operating temperature
Tj
-40 ...+150
Storage temperature
Tstg
-55 ... +150
Power dissipation
Ptot
3.8
W
Unclamped single pulse inductive energy 1)
EAS
250
mJ
Load dump protection VLoadDump2) = V A + VS
VLD
50
V
2
kV
T C = 85 °C
VIN = 0 and 10 V, t d = 400 ms, RI = 2 ,
RL = 6 , VA = 13.5 V
Electrostatic discharge voltage (Human Body Model) VESD
according to MIL STD 883D, method 3015.7 and
EOS/ESD assn. standard S5.1 - 1993
DIN humidity category, DIN 40 040
E
IEC climatic category; DIN IEC 68-1
40/150/56
Thermal resistance
junction - ambient:
K/W
RthJA
@ min. footprint
125
@ 6 cm2 cooling area 3)
72
junction-soldering point:
RthJS
17
K/W
1 Not tested, specified by design.
2VLoaddump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
3 Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for drain
connection. PCB mounted vertical without blown air.
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BTS 3118 N
Electrical Characteristics
Parameter
Symbol
at Tj = 25°C, unless otherwise specified
Values
Unit
min.
typ.
max.
42
-
55
V
-
1.5
10
µA
Characteristics
Drain source clamp voltage
VDS(AZ)
Tj = - 40 ...+ 150, ID = 10 mA
Off-state drain current Tj = -40 ... +150°C
IDSS
VDS = 32 V, VIN = 0 V
Input threshold voltage
V
VIN(th)
ID = 0.6 mA, Tj = 25 °C
1.3
1.7
2.2
ID = 0.6 mA, Tj = 150 °C
0.8
-
-
-
10
30
On state input current
IIN(on)
On-state resistance
RDS(on)
m
VIN = 5 V, ID = 2.17 A, Tj = 25 °C
-
90
120
VIN = 5 V, ID = 2.17 A, Tj = 150 °C
-
160
240
VIN = 10 V, ID = 2.17 A, Tj = 25 °C
-
70
100
VIN = 10 V, ID = 2.17 A, Tj = 150 °C
-
130
200
On-state resistance
µA
RDS(on)
Nominal load current
A
ID(Nom)
VDS = 0.5 V, Tj < 150°C, VIN = 10 V, TA = 85 °C
Current limit (active if VDS>2.5 V)1)
2.17
-
-
10
15
20
ID(lim)
VIN = 10 V, VDS = 12 V, tm = 200 µs
1Device switched on into existing short circuit (see diagram Determination of I
D(lim)). If the device is in on condition
and a short circuit occurs, these values might be exceeded for max. 50 µs.
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BTS 3118 N
Electrical Characteristics
Symbol
Parameter
at Tj = 25°C, unless otherwise specified
Values
Unit
min.
typ.
max.
t on
-
40
100
t off
-
70
100
-dV DS/dt on
-
0.4
1.5
dV DS/dt off
-
0.6
1.5
Dynamic Characteristics
Turn-on time
VIN to 90% I D:
RL = 4.7 , VIN = 0 to 10 V, Vbb = 12 V
Turn-off time
VIN to 10% ID:
RL = 4.7 , VIN = 10 to 0 V, Vbb = 12 V
Slew rate on
70 to 50% Vbb:
RL = 4.7 , VIN = 0 to 10 V, Vbb = 12 V
Slew rate off
50 to 70% Vbb:
RL = 4.7 , VIN = 10 to 0 V, Vbb = 12 V
µs
V/µs
Protection Functions1)
Thermal overload trip temperature
Tjt
150
175
-
°C
Input current protection mode
IIN(Prot)
60
120
300
µA
Input current protection mode
IIN(Prot)
-
100
300
EAS
250
-
-
mJ
VSD
-
1
-
V
Tj = 150 °C
Unclamped single pulse inductive energy 2)
ID = 2.17 A, Tj = 25 °C, Vbb = 12 V
Inverse Diode
Inverse diode forward voltage
IF = 10.9 A, tm = 250 µs, VIN = 0 V,
tP = 300 µs
1Integrated protection functions are designed to prevent IC destruction under fault conditions
described in the data sheet. Fault conditions are considered as "outside" normal operating range.
Protection functions are not designed for continuous repetitive operation.
2 Not tested, specified by design.
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BTS 3118 N
Block diagram
Inductive and overvoltage
output clamp
Terms
RL
V
I IN
1
D
IN
2
ID
VDS
D
Z
Vbb
HITFET
VIN
S
S
3
HITFET
Short circuit behaviour
Input circuit (ESD protection)
V
IN
Gate Drive
Input
I
Source/
Ground
IN
I
D
T
t
t
t
j
t
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BTS 3118 N
1 Maximum allowable power dissipation
2 On-state resistance
Ptot = f(TS) resp.
RON = f(T j); ID=2.17A; V IN=10V
Ptot = f(TA) @ R thJA=72 K/W
10
225
m
W
8
175
RDS(on)
max.
7
Ptot
max.
6
150
typ.
125
5
100
4
75
3
2 6cm2
50
1
25
0
-75
-50
-25
0
25
50
75
100 °C
0
-50
150
-25
0
25
50
75
100 125 °C
TS ;TA
Tj
3 On-state resistance
4 Typ. input threshold voltage
RON = f(Tj ); ID= 2.17A; V IN=5V
VIN(th) = f(T j); ID = 0.3 mA; V DS = 12V
250
m
2
max.
V
1.6
175
typ.
150
VGS(th)
RDS(on)
200
1.4
1.2
125
1
100
0.8
75
0.6
50
0.4
25
0.2
0
-50
175
-25
0
25
50
75
100 125 °C
0
-50
175
-25
0
25
50
75
100
°C
150
Tj
Tj
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BTS 3118 N
5 Typ. transfer characteristics
6 Typ. short circuit current
ID=f(VIN ); VDS=12V; TJstart=25°C
I D(lim) = f(Tj); VDS=12V
Parameter: VIN
16
24
A
A
20
10
ID
ID
12
18
8
16
6
4
2
0
1
2
3
4
5
6
7
V
8
14
Vin=10V
12
5V
10
-50
10
-25
0
25
50
75
100 125 °C
VIN
175
Tj
7 Typ. output characteristics
8 Typ. off-state drain current
ID=f(VDS ); TJstart =25°C
IDSS = f(Tj )
Parameter: VIN
20
11
Vin=10V
A
µA
7V
ID
14
6V
9
5V
8
I DSS
16
4V
12
max.
7
6
10
5
8
4
6
3V
3
4
2
2
0
0
typ.
1
1
2
3
4
V
0
-50
6
VDS
-25
0
25
50
75
100 125 °C
175
Tj
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BTS 3118 N
9 Typ. overload current
10 Typ. transient thermal impedance
ID(lim) = f(t), Vbb =12 V, no heatsink
Z thJA=f(tp) @ 6 cm2 cooling area
Parameter: Tjstart
Parameter: D=tp/T
10 2
25
K/W
D=0.5
A
15
10 1
25°C
0.2
0.1
ZthJA
I D(lim)
-40°C
0.05
10 0
0.02
0.01
10
+150°C
10 -1
85°C
5
Single pulse
0
0
1
2
3
10 -2 -7
-6
-5
-4
-3
-2
-1
0
1
10 10 10 10 10 10 10 10 10
5
ms
s
10
tp
t
11 Determination of ID(lim)
ID(lim) = f(t); tm = 200µs
Parameter: TJstart
25
I D(lim)
A
-40°C
15
25°C
85°C
10
150°C
5
0
0
0.1
0.2
0.3
0.4
ms
0.6
t
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3
BTS 3118 N
Package
Ordering Code
SOT-223
Q67060-S7216-A001
1.6 ±0.1
6.5 ±0.2
+0.2
acc. to
DIN 6784
1
2
3
3.5 ±0.2
4
7 ±0.3
B
15˚ max
0.1 max
3 ±0.1
0.5 min
A
0.28 ±0.04
2.3
0.7 ±0.1
4.6
0.25
M
A
0.25
M
B
GPS05560
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BTS 3118 N
Revision History :
Previous version :
Page
3
2004-02-02
2002-09-04
Subjects (major changes since last revision)
VIN(th) test conditions from ID=0.3mA to ID=0.6mA
For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany
or the Infineon Technologies Companies and Representatives worldwide: see our webpage at
http://www.infineon.com
HITFET®, SIPMOS® are registered trademarks of Infineon Technologies AG.
Edition 2004-02-02
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81541 München, Germany
© Infineon Technologies AG 2001
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as a guarantee
of characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,
regarding circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices please contact your
nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide
(see address list).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the
types in question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express
written approval of Infineon Technologies, if a failure of such components can reasonably be expected to
cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device
or system. Life support devices or systems are intended to be implanted in the human body, or to support
and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health
of the user or other persons may be endangered.
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